b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | From e41ad4213ce6742646c9dfed661289e69d5af5c1 Mon Sep 17 00:00:00 2001 |
| 2 | From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
| 3 | Date: Fri, 2 Aug 2019 16:42:53 +0800 |
| 4 | Subject: [PATCH] arm64: dts: ls1028a: Fix interrupt-map property of PCIe nodes |
| 5 | |
| 6 | The current interrupt-map entries lost the 'parent unit address', |
| 7 | it will result in fail to allocate legacy INTx interrupts. |
| 8 | |
| 9 | Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
| 10 | --- |
| 11 | arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 16 ++++++++-------- |
| 12 | 1 file changed, 8 insertions(+), 8 deletions(-) |
| 13 | |
| 14 | --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi |
| 15 | +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi |
| 16 | @@ -693,10 +693,10 @@ |
| 17 | msi-parent = <&its>; |
| 18 | #interrupt-cells = <1>; |
| 19 | interrupt-map-mask = <0 0 0 7>; |
| 20 | - interrupt-map = <0000 0 0 1 &gic GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, |
| 21 | - <0000 0 0 2 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, |
| 22 | - <0000 0 0 3 &gic GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, |
| 23 | - <0000 0 0 4 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; |
| 24 | + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, |
| 25 | + <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, |
| 26 | + <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, |
| 27 | + <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; |
| 28 | status = "disabled"; |
| 29 | }; |
| 30 | |
| 31 | @@ -718,10 +718,10 @@ |
| 32 | msi-parent = <&its>; |
| 33 | #interrupt-cells = <1>; |
| 34 | interrupt-map-mask = <0 0 0 7>; |
| 35 | - interrupt-map = <0000 0 0 1 &gic GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, |
| 36 | - <0000 0 0 2 &gic GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, |
| 37 | - <0000 0 0 3 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, |
| 38 | - <0000 0 0 4 &gic GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; |
| 39 | + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, |
| 40 | + <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, |
| 41 | + <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, |
| 42 | + <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; |
| 43 | status = "disabled"; |
| 44 | }; |
| 45 | |