b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | From 85252792bc07b398582e8dacf6ec6d09a5075195 Mon Sep 17 00:00:00 2001 |
| 2 | From: Alex Marginean <alexandru.marginean@nxp.com> |
| 3 | Date: Tue, 7 Jan 2020 15:15:29 +0200 |
| 4 | Subject: [PATCH] arm64: dts: fsl-ls1028a-rdb: fix QSGMII PHY node names |
| 5 | |
| 6 | Use ethernet-phy@ADDR, previously the numbers were wrong. |
| 7 | |
| 8 | Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> |
| 9 | --- |
| 10 | arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts | 8 ++++---- |
| 11 | 1 file changed, 4 insertions(+), 4 deletions(-) |
| 12 | |
| 13 | --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts |
| 14 | +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts |
| 15 | @@ -215,19 +215,19 @@ |
| 16 | }; |
| 17 | |
| 18 | &enetc_mdio_pf3 { |
| 19 | - qsgmii_phy1: ethernet-phy@4 { |
| 20 | + qsgmii_phy1: ethernet-phy@10 { |
| 21 | reg = <0x10>; |
| 22 | }; |
| 23 | |
| 24 | - qsgmii_phy2: ethernet-phy@5 { |
| 25 | + qsgmii_phy2: ethernet-phy@11 { |
| 26 | reg = <0x11>; |
| 27 | }; |
| 28 | |
| 29 | - qsgmii_phy3: ethernet-phy@6 { |
| 30 | + qsgmii_phy3: ethernet-phy@12 { |
| 31 | reg = <0x12>; |
| 32 | }; |
| 33 | |
| 34 | - qsgmii_phy4: ethernet-phy@7 { |
| 35 | + qsgmii_phy4: ethernet-phy@13 { |
| 36 | reg = <0x13>; |
| 37 | }; |
| 38 | }; |