blob: 887ca36e0436df73f1bd35eb11c82050a1c47a0e [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001From 774408ea6a55b9d40b7bdc4ff4e33f1464c605c9 Mon Sep 17 00:00:00 2001
2From: Alex Marginean <alexandru.marginean@nxp.com>
3Date: Wed, 8 Jan 2020 13:15:07 +0200
4Subject: [PATCH] drivers: net: dsa: felix: Handle PAUSE Rx regardless of AN
5 result
6
7Flow control is used with 2500Base-X and AQR PHYs to do rate adapation
8between line side 100/1000 links and MAC running at 2.5G. This is
9independent of the flow control configuration settled on line side though
10AN. In general allowing MAC to handle flow control even though AN did
11not enable it explicitly should not be a problem, so the patch enables
12it in all cases.
13
14Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
15---
16 drivers/net/dsa/ocelot/felix.c | 8 ++++++--
17 1 file changed, 6 insertions(+), 2 deletions(-)
18
19--- a/drivers/net/dsa/ocelot/felix.c
20+++ b/drivers/net/dsa/ocelot/felix.c
21@@ -267,8 +267,12 @@ static void felix_phylink_mac_config(str
22 * specification in incoming pause frames.
23 */
24 mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(state->speed);
25- if (state->pause & MLO_PAUSE_RX)
26- mac_fc_cfg |= SYS_MAC_FC_CFG_RX_FC_ENA;
27+
28+ /* handle Rx pause in all cases, with 2500base-X this is used for rate
29+ * adaptation.
30+ */
31+ mac_fc_cfg |= SYS_MAC_FC_CFG_RX_FC_ENA;
32+
33 if (state->pause & MLO_PAUSE_TX)
34 mac_fc_cfg |= SYS_MAC_FC_CFG_TX_FC_ENA |
35 SYS_MAC_FC_CFG_PAUSE_VAL_CFG(0xffff) |