b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | From f79915995e8fe4f2d11043fe4cab4b579e5cf1de Mon Sep 17 00:00:00 2001 |
| 2 | From: =?UTF-8?q?Horia=20Geant=C4=83?= <horia.geanta@nxp.com> |
| 3 | Date: Wed, 10 Oct 2018 16:06:11 +0300 |
| 4 | Subject: [PATCH] crypto: caam/qi2 - add (unused) dpseci API |
| 5 | MIME-Version: 1.0 |
| 6 | Content-Type: text/plain; charset=UTF-8 |
| 7 | Content-Transfer-Encoding: 8bit |
| 8 | |
| 9 | During driver upstreaming all unused dpseci API was trimmed down. |
| 10 | Add the API back to be in sync with files provided by MC f/w release. |
| 11 | |
| 12 | Signed-off-by: Horia Geantă <horia.geanta@nxp.com> |
| 13 | --- |
| 14 | drivers/crypto/caam/dpseci.c | 330 ++++++++++++++++++++++++++++++++++++++- |
| 15 | drivers/crypto/caam/dpseci.h | 50 ++++++ |
| 16 | drivers/crypto/caam/dpseci_cmd.h | 59 +++++++ |
| 17 | 3 files changed, 437 insertions(+), 2 deletions(-) |
| 18 | |
| 19 | --- a/drivers/crypto/caam/dpseci.c |
| 20 | +++ b/drivers/crypto/caam/dpseci.c |
| 21 | @@ -16,8 +16,8 @@ |
| 22 | * @token: Returned token; use in subsequent API calls |
| 23 | * |
| 24 | * This function can be used to open a control session for an already created |
| 25 | - * object; an object may have been declared statically in the DPL |
| 26 | - * or created dynamically. |
| 27 | + * object; an object may have been declared in the DPL or by calling the |
| 28 | + * dpseci_create() function. |
| 29 | * This function returns a unique authentication token, associated with the |
| 30 | * specific object ID and the specific MC portal; this token must be used in all |
| 31 | * subsequent commands for this specific object. |
| 32 | @@ -67,6 +67,85 @@ int dpseci_close(struct fsl_mc_io *mc_io |
| 33 | } |
| 34 | |
| 35 | /** |
| 36 | + * dpseci_create() - Create the DPSECI object |
| 37 | + * @mc_io: Pointer to MC portal's I/O object |
| 38 | + * @dprc_token: Parent container token; '0' for default container |
| 39 | + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' |
| 40 | + * @cfg: Configuration structure |
| 41 | + * @obj_id: returned object id |
| 42 | + * |
| 43 | + * Create the DPSECI object, allocate required resources and perform required |
| 44 | + * initialization. |
| 45 | + * |
| 46 | + * The object can be created either by declaring it in the DPL file, or by |
| 47 | + * calling this function. |
| 48 | + * |
| 49 | + * The function accepts an authentication token of a parent container that this |
| 50 | + * object should be assigned to. The token can be '0' so the object will be |
| 51 | + * assigned to the default container. |
| 52 | + * The newly created object can be opened with the returned object id and using |
| 53 | + * the container's associated tokens and MC portals. |
| 54 | + * |
| 55 | + * Return: '0' on success, error code otherwise |
| 56 | + */ |
| 57 | +int dpseci_create(struct fsl_mc_io *mc_io, u16 dprc_token, u32 cmd_flags, |
| 58 | + const struct dpseci_cfg *cfg, u32 *obj_id) |
| 59 | +{ |
| 60 | + struct fsl_mc_command cmd = { 0 }; |
| 61 | + struct dpseci_cmd_create *cmd_params; |
| 62 | + int i, err; |
| 63 | + |
| 64 | + cmd.header = mc_encode_cmd_header(DPSECI_CMDID_CREATE, |
| 65 | + cmd_flags, |
| 66 | + dprc_token); |
| 67 | + cmd_params = (struct dpseci_cmd_create *)cmd.params; |
| 68 | + for (i = 0; i < 8; i++) |
| 69 | + cmd_params->priorities[i] = cfg->priorities[i]; |
| 70 | + for (i = 0; i < 8; i++) |
| 71 | + cmd_params->priorities2[i] = cfg->priorities[8 + i]; |
| 72 | + cmd_params->num_tx_queues = cfg->num_tx_queues; |
| 73 | + cmd_params->num_rx_queues = cfg->num_rx_queues; |
| 74 | + cmd_params->options = cpu_to_le32(cfg->options); |
| 75 | + err = mc_send_command(mc_io, &cmd); |
| 76 | + if (err) |
| 77 | + return err; |
| 78 | + |
| 79 | + *obj_id = mc_cmd_read_object_id(&cmd); |
| 80 | + |
| 81 | + return 0; |
| 82 | +} |
| 83 | + |
| 84 | +/** |
| 85 | + * dpseci_destroy() - Destroy the DPSECI object and release all its resources |
| 86 | + * @mc_io: Pointer to MC portal's I/O object |
| 87 | + * @dprc_token: Parent container token; '0' for default container |
| 88 | + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' |
| 89 | + * @object_id: The object id; it must be a valid id within the container that |
| 90 | + * created this object |
| 91 | + * |
| 92 | + * The function accepts the authentication token of the parent container that |
| 93 | + * created the object (not the one that currently owns the object). The object |
| 94 | + * is searched within parent using the provided 'object_id'. |
| 95 | + * All tokens to the object must be closed before calling destroy. |
| 96 | + * |
| 97 | + * Return: '0' on success, error code otherwise |
| 98 | + */ |
| 99 | +int dpseci_destroy(struct fsl_mc_io *mc_io, u16 dprc_token, u32 cmd_flags, |
| 100 | + u32 object_id) |
| 101 | +{ |
| 102 | + struct fsl_mc_command cmd = { 0 }; |
| 103 | + struct dpseci_cmd_destroy *cmd_params; |
| 104 | + |
| 105 | + cmd.header = mc_encode_cmd_header(DPSECI_CMDID_DESTROY, |
| 106 | + cmd_flags, |
| 107 | + dprc_token); |
| 108 | + cmd_params = (struct dpseci_cmd_destroy *)cmd.params; |
| 109 | + cmd_params->object_id = cpu_to_le32(object_id); |
| 110 | + |
| 111 | + return mc_send_command(mc_io, &cmd); |
| 112 | +} |
| 113 | + |
| 114 | +/** |
| 115 | * dpseci_enable() - Enable the DPSECI, allow sending and receiving frames |
| 116 | * @mc_io: Pointer to MC portal's I/O object |
| 117 | * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' |
| 118 | @@ -133,6 +212,217 @@ int dpseci_is_enabled(struct fsl_mc_io * |
| 119 | } |
| 120 | |
| 121 | /** |
| 122 | + * dpseci_reset() - Reset the DPSECI, returns the object to initial state. |
| 123 | + * @mc_io: Pointer to MC portal's I/O object |
| 124 | + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' |
| 125 | + * @token: Token of DPSECI object |
| 126 | + * |
| 127 | + * Return: '0' on success, error code otherwise |
| 128 | + */ |
| 129 | +int dpseci_reset(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token) |
| 130 | +{ |
| 131 | + struct fsl_mc_command cmd = { 0 }; |
| 132 | + |
| 133 | + cmd.header = mc_encode_cmd_header(DPSECI_CMDID_RESET, |
| 134 | + cmd_flags, |
| 135 | + token); |
| 136 | + |
| 137 | + return mc_send_command(mc_io, &cmd); |
| 138 | +} |
| 139 | + |
| 140 | +/** |
| 141 | + * dpseci_get_irq_enable() - Get overall interrupt state |
| 142 | + * @mc_io: Pointer to MC portal's I/O object |
| 143 | + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' |
| 144 | + * @token: Token of DPSECI object |
| 145 | + * @irq_index: The interrupt index to configure |
| 146 | + * @en: Returned Interrupt state - enable = 1, disable = 0 |
| 147 | + * |
| 148 | + * Return: '0' on success, error code otherwise |
| 149 | + */ |
| 150 | +int dpseci_get_irq_enable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, |
| 151 | + u8 irq_index, u8 *en) |
| 152 | +{ |
| 153 | + struct fsl_mc_command cmd = { 0 }; |
| 154 | + struct dpseci_cmd_irq_enable *cmd_params; |
| 155 | + struct dpseci_rsp_get_irq_enable *rsp_params; |
| 156 | + int err; |
| 157 | + |
| 158 | + cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_IRQ_ENABLE, |
| 159 | + cmd_flags, |
| 160 | + token); |
| 161 | + cmd_params = (struct dpseci_cmd_irq_enable *)cmd.params; |
| 162 | + cmd_params->irq_index = irq_index; |
| 163 | + err = mc_send_command(mc_io, &cmd); |
| 164 | + if (err) |
| 165 | + return err; |
| 166 | + |
| 167 | + rsp_params = (struct dpseci_rsp_get_irq_enable *)cmd.params; |
| 168 | + *en = rsp_params->enable_state; |
| 169 | + |
| 170 | + return 0; |
| 171 | +} |
| 172 | + |
| 173 | +/** |
| 174 | + * dpseci_set_irq_enable() - Set overall interrupt state. |
| 175 | + * @mc_io: Pointer to MC portal's I/O object |
| 176 | + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' |
| 177 | + * @token: Token of DPSECI object |
| 178 | + * @irq_index: The interrupt index to configure |
| 179 | + * @en: Interrupt state - enable = 1, disable = 0 |
| 180 | + * |
| 181 | + * Allows GPP software to control when interrupts are generated. |
| 182 | + * Each interrupt can have up to 32 causes. The enable/disable control's the |
| 183 | + * overall interrupt state. If the interrupt is disabled no causes will cause |
| 184 | + * an interrupt. |
| 185 | + * |
| 186 | + * Return: '0' on success, error code otherwise |
| 187 | + */ |
| 188 | +int dpseci_set_irq_enable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, |
| 189 | + u8 irq_index, u8 en) |
| 190 | +{ |
| 191 | + struct fsl_mc_command cmd = { 0 }; |
| 192 | + struct dpseci_cmd_irq_enable *cmd_params; |
| 193 | + |
| 194 | + cmd.header = mc_encode_cmd_header(DPSECI_CMDID_SET_IRQ_ENABLE, |
| 195 | + cmd_flags, |
| 196 | + token); |
| 197 | + cmd_params = (struct dpseci_cmd_irq_enable *)cmd.params; |
| 198 | + cmd_params->irq_index = irq_index; |
| 199 | + cmd_params->enable_state = en; |
| 200 | + |
| 201 | + return mc_send_command(mc_io, &cmd); |
| 202 | +} |
| 203 | + |
| 204 | +/** |
| 205 | + * dpseci_get_irq_mask() - Get interrupt mask. |
| 206 | + * @mc_io: Pointer to MC portal's I/O object |
| 207 | + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' |
| 208 | + * @token: Token of DPSECI object |
| 209 | + * @irq_index: The interrupt index to configure |
| 210 | + * @mask: Returned event mask to trigger interrupt |
| 211 | + * |
| 212 | + * Every interrupt can have up to 32 causes and the interrupt model supports |
| 213 | + * masking/unmasking each cause independently. |
| 214 | + * |
| 215 | + * Return: '0' on success, error code otherwise |
| 216 | + */ |
| 217 | +int dpseci_get_irq_mask(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, |
| 218 | + u8 irq_index, u32 *mask) |
| 219 | +{ |
| 220 | + struct fsl_mc_command cmd = { 0 }; |
| 221 | + struct dpseci_cmd_irq_mask *cmd_params; |
| 222 | + int err; |
| 223 | + |
| 224 | + cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_IRQ_MASK, |
| 225 | + cmd_flags, |
| 226 | + token); |
| 227 | + cmd_params = (struct dpseci_cmd_irq_mask *)cmd.params; |
| 228 | + cmd_params->irq_index = irq_index; |
| 229 | + err = mc_send_command(mc_io, &cmd); |
| 230 | + if (err) |
| 231 | + return err; |
| 232 | + |
| 233 | + *mask = le32_to_cpu(cmd_params->mask); |
| 234 | + |
| 235 | + return 0; |
| 236 | +} |
| 237 | + |
| 238 | +/** |
| 239 | + * dpseci_set_irq_mask() - Set interrupt mask. |
| 240 | + * @mc_io: Pointer to MC portal's I/O object |
| 241 | + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' |
| 242 | + * @token: Token of DPSECI object |
| 243 | + * @irq_index: The interrupt index to configure |
| 244 | + * @mask: event mask to trigger interrupt; |
| 245 | + * each bit: |
| 246 | + * 0 = ignore event |
| 247 | + * 1 = consider event for asserting IRQ |
| 248 | + * |
| 249 | + * Every interrupt can have up to 32 causes and the interrupt model supports |
| 250 | + * masking/unmasking each cause independently |
| 251 | + * |
| 252 | + * Return: '0' on success, error code otherwise |
| 253 | + */ |
| 254 | +int dpseci_set_irq_mask(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, |
| 255 | + u8 irq_index, u32 mask) |
| 256 | +{ |
| 257 | + struct fsl_mc_command cmd = { 0 }; |
| 258 | + struct dpseci_cmd_irq_mask *cmd_params; |
| 259 | + |
| 260 | + cmd.header = mc_encode_cmd_header(DPSECI_CMDID_SET_IRQ_MASK, |
| 261 | + cmd_flags, |
| 262 | + token); |
| 263 | + cmd_params = (struct dpseci_cmd_irq_mask *)cmd.params; |
| 264 | + cmd_params->mask = cpu_to_le32(mask); |
| 265 | + cmd_params->irq_index = irq_index; |
| 266 | + |
| 267 | + return mc_send_command(mc_io, &cmd); |
| 268 | +} |
| 269 | + |
| 270 | +/** |
| 271 | + * dpseci_get_irq_status() - Get the current status of any pending interrupts |
| 272 | + * @mc_io: Pointer to MC portal's I/O object |
| 273 | + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' |
| 274 | + * @token: Token of DPSECI object |
| 275 | + * @irq_index: The interrupt index to configure |
| 276 | + * @status: Returned interrupts status - one bit per cause: |
| 277 | + * 0 = no interrupt pending |
| 278 | + * 1 = interrupt pending |
| 279 | + * |
| 280 | + * Return: '0' on success, error code otherwise |
| 281 | + */ |
| 282 | +int dpseci_get_irq_status(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, |
| 283 | + u8 irq_index, u32 *status) |
| 284 | +{ |
| 285 | + struct fsl_mc_command cmd = { 0 }; |
| 286 | + struct dpseci_cmd_irq_status *cmd_params; |
| 287 | + int err; |
| 288 | + |
| 289 | + cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_IRQ_STATUS, |
| 290 | + cmd_flags, |
| 291 | + token); |
| 292 | + cmd_params = (struct dpseci_cmd_irq_status *)cmd.params; |
| 293 | + cmd_params->status = cpu_to_le32(*status); |
| 294 | + cmd_params->irq_index = irq_index; |
| 295 | + err = mc_send_command(mc_io, &cmd); |
| 296 | + if (err) |
| 297 | + return err; |
| 298 | + |
| 299 | + *status = le32_to_cpu(cmd_params->status); |
| 300 | + |
| 301 | + return 0; |
| 302 | +} |
| 303 | + |
| 304 | +/** |
| 305 | + * dpseci_clear_irq_status() - Clear a pending interrupt's status |
| 306 | + * @mc_io: Pointer to MC portal's I/O object |
| 307 | + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' |
| 308 | + * @token: Token of DPSECI object |
| 309 | + * @irq_index: The interrupt index to configure |
| 310 | + * @status: bits to clear (W1C) - one bit per cause: |
| 311 | + * 0 = don't change |
| 312 | + * 1 = clear status bit |
| 313 | + * |
| 314 | + * Return: '0' on success, error code otherwise |
| 315 | + */ |
| 316 | +int dpseci_clear_irq_status(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, |
| 317 | + u8 irq_index, u32 status) |
| 318 | +{ |
| 319 | + struct fsl_mc_command cmd = { 0 }; |
| 320 | + struct dpseci_cmd_irq_status *cmd_params; |
| 321 | + |
| 322 | + cmd.header = mc_encode_cmd_header(DPSECI_CMDID_CLEAR_IRQ_STATUS, |
| 323 | + cmd_flags, |
| 324 | + token); |
| 325 | + cmd_params = (struct dpseci_cmd_irq_status *)cmd.params; |
| 326 | + cmd_params->status = cpu_to_le32(status); |
| 327 | + cmd_params->irq_index = irq_index; |
| 328 | + |
| 329 | + return mc_send_command(mc_io, &cmd); |
| 330 | +} |
| 331 | + |
| 332 | +/** |
| 333 | * dpseci_get_attributes() - Retrieve DPSECI attributes |
| 334 | * @mc_io: Pointer to MC portal's I/O object |
| 335 | * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' |
| 336 | @@ -320,6 +610,42 @@ int dpseci_get_sec_attr(struct fsl_mc_io |
| 337 | |
| 338 | return 0; |
| 339 | } |
| 340 | + |
| 341 | +/** |
| 342 | + * dpseci_get_sec_counters() - Retrieve SEC accelerator counters |
| 343 | + * @mc_io: Pointer to MC portal's I/O object |
| 344 | + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' |
| 345 | + * @token: Token of DPSECI object |
| 346 | + * @counters: Returned SEC counters |
| 347 | + * |
| 348 | + * Return: '0' on success, error code otherwise |
| 349 | + */ |
| 350 | +int dpseci_get_sec_counters(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, |
| 351 | + struct dpseci_sec_counters *counters) |
| 352 | +{ |
| 353 | + struct fsl_mc_command cmd = { 0 }; |
| 354 | + struct dpseci_rsp_get_sec_counters *rsp_params; |
| 355 | + int err; |
| 356 | + |
| 357 | + cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_SEC_COUNTERS, |
| 358 | + cmd_flags, |
| 359 | + token); |
| 360 | + err = mc_send_command(mc_io, &cmd); |
| 361 | + if (err) |
| 362 | + return err; |
| 363 | + |
| 364 | + rsp_params = (struct dpseci_rsp_get_sec_counters *)cmd.params; |
| 365 | + counters->dequeued_requests = |
| 366 | + le64_to_cpu(rsp_params->dequeued_requests); |
| 367 | + counters->ob_enc_requests = le64_to_cpu(rsp_params->ob_enc_requests); |
| 368 | + counters->ib_dec_requests = le64_to_cpu(rsp_params->ib_dec_requests); |
| 369 | + counters->ob_enc_bytes = le64_to_cpu(rsp_params->ob_enc_bytes); |
| 370 | + counters->ob_prot_bytes = le64_to_cpu(rsp_params->ob_prot_bytes); |
| 371 | + counters->ib_dec_bytes = le64_to_cpu(rsp_params->ib_dec_bytes); |
| 372 | + counters->ib_valid_bytes = le64_to_cpu(rsp_params->ib_valid_bytes); |
| 373 | + |
| 374 | + return 0; |
| 375 | +} |
| 376 | |
| 377 | /** |
| 378 | * dpseci_get_api_version() - Get Data Path SEC Interface API version |
| 379 | --- a/drivers/crypto/caam/dpseci.h |
| 380 | +++ b/drivers/crypto/caam/dpseci.h |
| 381 | @@ -55,6 +55,12 @@ struct dpseci_cfg { |
| 382 | u8 priorities[DPSECI_MAX_QUEUE_NUM]; |
| 383 | }; |
| 384 | |
| 385 | +int dpseci_create(struct fsl_mc_io *mc_io, u16 dprc_token, u32 cmd_flags, |
| 386 | + const struct dpseci_cfg *cfg, u32 *obj_id); |
| 387 | + |
| 388 | +int dpseci_destroy(struct fsl_mc_io *mc_io, u16 dprc_token, u32 cmd_flags, |
| 389 | + u32 object_id); |
| 390 | + |
| 391 | int dpseci_enable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token); |
| 392 | |
| 393 | int dpseci_disable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token); |
| 394 | @@ -62,6 +68,26 @@ int dpseci_disable(struct fsl_mc_io *mc_ |
| 395 | int dpseci_is_enabled(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, |
| 396 | int *en); |
| 397 | |
| 398 | +int dpseci_reset(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token); |
| 399 | + |
| 400 | +int dpseci_get_irq_enable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, |
| 401 | + u8 irq_index, u8 *en); |
| 402 | + |
| 403 | +int dpseci_set_irq_enable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, |
| 404 | + u8 irq_index, u8 en); |
| 405 | + |
| 406 | +int dpseci_get_irq_mask(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, |
| 407 | + u8 irq_index, u32 *mask); |
| 408 | + |
| 409 | +int dpseci_set_irq_mask(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, |
| 410 | + u8 irq_index, u32 mask); |
| 411 | + |
| 412 | +int dpseci_get_irq_status(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, |
| 413 | + u8 irq_index, u32 *status); |
| 414 | + |
| 415 | +int dpseci_clear_irq_status(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, |
| 416 | + u8 irq_index, u32 status); |
| 417 | + |
| 418 | /** |
| 419 | * struct dpseci_attr - Structure representing DPSECI attributes |
| 420 | * @id: DPSECI object ID |
| 421 | @@ -248,6 +274,30 @@ struct dpseci_sec_attr { |
| 422 | int dpseci_get_sec_attr(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, |
| 423 | struct dpseci_sec_attr *attr); |
| 424 | |
| 425 | +/** |
| 426 | + * struct dpseci_sec_counters - Structure representing global SEC counters and |
| 427 | + * not per dpseci counters |
| 428 | + * @dequeued_requests: Number of Requests Dequeued |
| 429 | + * @ob_enc_requests: Number of Outbound Encrypt Requests |
| 430 | + * @ib_dec_requests: Number of Inbound Decrypt Requests |
| 431 | + * @ob_enc_bytes: Number of Outbound Bytes Encrypted |
| 432 | + * @ob_prot_bytes: Number of Outbound Bytes Protected |
| 433 | + * @ib_dec_bytes: Number of Inbound Bytes Decrypted |
| 434 | + * @ib_valid_bytes: Number of Inbound Bytes Validated |
| 435 | + */ |
| 436 | +struct dpseci_sec_counters { |
| 437 | + u64 dequeued_requests; |
| 438 | + u64 ob_enc_requests; |
| 439 | + u64 ib_dec_requests; |
| 440 | + u64 ob_enc_bytes; |
| 441 | + u64 ob_prot_bytes; |
| 442 | + u64 ib_dec_bytes; |
| 443 | + u64 ib_valid_bytes; |
| 444 | +}; |
| 445 | + |
| 446 | +int dpseci_get_sec_counters(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, |
| 447 | + struct dpseci_sec_counters *counters); |
| 448 | + |
| 449 | int dpseci_get_api_version(struct fsl_mc_io *mc_io, u32 cmd_flags, |
| 450 | u16 *major_ver, u16 *minor_ver); |
| 451 | |
| 452 | --- a/drivers/crypto/caam/dpseci_cmd.h |
| 453 | +++ b/drivers/crypto/caam/dpseci_cmd.h |
| 454 | @@ -17,6 +17,7 @@ |
| 455 | /* Command versioning */ |
| 456 | #define DPSECI_CMD_BASE_VERSION 1 |
| 457 | #define DPSECI_CMD_BASE_VERSION_V2 2 |
| 458 | +#define DPSECI_CMD_BASE_VERSION_V3 3 |
| 459 | #define DPSECI_CMD_ID_OFFSET 4 |
| 460 | |
| 461 | #define DPSECI_CMD_V1(id) (((id) << DPSECI_CMD_ID_OFFSET) | \ |
| 462 | @@ -25,20 +26,34 @@ |
| 463 | #define DPSECI_CMD_V2(id) (((id) << DPSECI_CMD_ID_OFFSET) | \ |
| 464 | DPSECI_CMD_BASE_VERSION_V2) |
| 465 | |
| 466 | +#define DPSECI_CMD_V3(id) (((id) << DPSECI_CMD_ID_OFFSET) | \ |
| 467 | + DPSECI_CMD_BASE_VERSION_V3) |
| 468 | + |
| 469 | /* Command IDs */ |
| 470 | #define DPSECI_CMDID_CLOSE DPSECI_CMD_V1(0x800) |
| 471 | #define DPSECI_CMDID_OPEN DPSECI_CMD_V1(0x809) |
| 472 | +#define DPSECI_CMDID_CREATE DPSECI_CMD_V3(0x909) |
| 473 | +#define DPSECI_CMDID_DESTROY DPSECI_CMD_V1(0x989) |
| 474 | #define DPSECI_CMDID_GET_API_VERSION DPSECI_CMD_V1(0xa09) |
| 475 | |
| 476 | #define DPSECI_CMDID_ENABLE DPSECI_CMD_V1(0x002) |
| 477 | #define DPSECI_CMDID_DISABLE DPSECI_CMD_V1(0x003) |
| 478 | #define DPSECI_CMDID_GET_ATTR DPSECI_CMD_V1(0x004) |
| 479 | +#define DPSECI_CMDID_RESET DPSECI_CMD_V1(0x005) |
| 480 | #define DPSECI_CMDID_IS_ENABLED DPSECI_CMD_V1(0x006) |
| 481 | |
| 482 | +#define DPSECI_CMDID_SET_IRQ_ENABLE DPSECI_CMD_V1(0x012) |
| 483 | +#define DPSECI_CMDID_GET_IRQ_ENABLE DPSECI_CMD_V1(0x013) |
| 484 | +#define DPSECI_CMDID_SET_IRQ_MASK DPSECI_CMD_V1(0x014) |
| 485 | +#define DPSECI_CMDID_GET_IRQ_MASK DPSECI_CMD_V1(0x015) |
| 486 | +#define DPSECI_CMDID_GET_IRQ_STATUS DPSECI_CMD_V1(0x016) |
| 487 | +#define DPSECI_CMDID_CLEAR_IRQ_STATUS DPSECI_CMD_V1(0x017) |
| 488 | + |
| 489 | #define DPSECI_CMDID_SET_RX_QUEUE DPSECI_CMD_V1(0x194) |
| 490 | #define DPSECI_CMDID_GET_RX_QUEUE DPSECI_CMD_V1(0x196) |
| 491 | #define DPSECI_CMDID_GET_TX_QUEUE DPSECI_CMD_V1(0x197) |
| 492 | #define DPSECI_CMDID_GET_SEC_ATTR DPSECI_CMD_V2(0x198) |
| 493 | +#define DPSECI_CMDID_GET_SEC_COUNTERS DPSECI_CMD_V1(0x199) |
| 494 | #define DPSECI_CMDID_SET_CONGESTION_NOTIFICATION DPSECI_CMD_V1(0x170) |
| 495 | #define DPSECI_CMDID_GET_CONGESTION_NOTIFICATION DPSECI_CMD_V1(0x171) |
| 496 | |
| 497 | @@ -57,6 +72,20 @@ struct dpseci_cmd_open { |
| 498 | __le32 dpseci_id; |
| 499 | }; |
| 500 | |
| 501 | +struct dpseci_cmd_create { |
| 502 | + u8 priorities[8]; |
| 503 | + u8 num_tx_queues; |
| 504 | + u8 num_rx_queues; |
| 505 | + u8 pad0[6]; |
| 506 | + __le32 options; |
| 507 | + __le32 pad1; |
| 508 | + u8 priorities2[8]; |
| 509 | +}; |
| 510 | + |
| 511 | +struct dpseci_cmd_destroy { |
| 512 | + __le32 object_id; |
| 513 | +}; |
| 514 | + |
| 515 | #define DPSECI_ENABLE_SHIFT 0 |
| 516 | #define DPSECI_ENABLE_SIZE 1 |
| 517 | |
| 518 | @@ -64,6 +93,26 @@ struct dpseci_rsp_is_enabled { |
| 519 | u8 is_enabled; |
| 520 | }; |
| 521 | |
| 522 | +struct dpseci_cmd_irq_enable { |
| 523 | + u8 enable_state; |
| 524 | + u8 pad[3]; |
| 525 | + u8 irq_index; |
| 526 | +}; |
| 527 | + |
| 528 | +struct dpseci_rsp_get_irq_enable { |
| 529 | + u8 enable_state; |
| 530 | +}; |
| 531 | + |
| 532 | +struct dpseci_cmd_irq_mask { |
| 533 | + __le32 mask; |
| 534 | + u8 irq_index; |
| 535 | +}; |
| 536 | + |
| 537 | +struct dpseci_cmd_irq_status { |
| 538 | + __le32 status; |
| 539 | + u8 irq_index; |
| 540 | +}; |
| 541 | + |
| 542 | struct dpseci_rsp_get_attributes { |
| 543 | __le32 id; |
| 544 | __le32 pad0; |
| 545 | @@ -125,6 +174,16 @@ struct dpseci_rsp_get_sec_attr { |
| 546 | u8 ptha_acc_num; |
| 547 | }; |
| 548 | |
| 549 | +struct dpseci_rsp_get_sec_counters { |
| 550 | + __le64 dequeued_requests; |
| 551 | + __le64 ob_enc_requests; |
| 552 | + __le64 ib_dec_requests; |
| 553 | + __le64 ob_enc_bytes; |
| 554 | + __le64 ob_prot_bytes; |
| 555 | + __le64 ib_dec_bytes; |
| 556 | + __le64 ib_valid_bytes; |
| 557 | +}; |
| 558 | + |
| 559 | struct dpseci_rsp_get_api_version { |
| 560 | __le16 major; |
| 561 | __le16 minor; |