| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | config ARCH_ZYNQ |
| 3 | bool "Xilinx Zynq ARM Cortex A9 Platform" |
| 4 | depends on ARCH_MULTI_V7 |
| 5 | select ARCH_HAS_RESET_CONTROLLER |
| 6 | select ARCH_SUPPORTS_BIG_ENDIAN |
| 7 | select ARM_AMBA |
| 8 | select ARM_GIC |
| 9 | select ARM_GLOBAL_TIMER if !CPU_FREQ |
| 10 | select CADENCE_TTC_TIMER |
| 11 | select HAVE_ARM_SCU if SMP |
| 12 | select HAVE_ARM_TWD if SMP |
| 13 | select ICST |
| 14 | select MFD_SYSCON |
| 15 | select PINCTRL |
| 16 | select PINCTRL_ZYNQ |
| 17 | select SOC_BUS |
| 18 | help |
| 19 | Support for Xilinx Zynq ARM Cortex A9 Platform |