blob: f518b4744ff893282c45ec93746a40ffa7e9eda8 [file] [log] [blame]
xjb04a4022021-11-25 15:01:52 +08001# SPDX-License-Identifier: GPL-2.0
2
3menu "Host processor type and features"
4
5source "arch/x86/Kconfig.cpu"
6
7endmenu
8
9config UML_X86
10 def_bool y
11 select GENERIC_FIND_FIRST_BIT
12
13config 64BIT
14 bool "64-bit kernel" if "$(SUBARCH)" = "x86"
15 default "$(SUBARCH)" != "i386"
16
17config X86_32
18 def_bool !64BIT
19 select HAVE_AOUT
20 select ARCH_WANT_IPC_PARSE_VERSION
21 select MODULES_USE_ELF_REL
22 select CLONE_BACKWARDS
23 select OLD_SIGSUSPEND3
24 select OLD_SIGACTION
25
26config X86_64
27 def_bool 64BIT
28 select MODULES_USE_ELF_RELA
29
30config ARCH_DEFCONFIG
31 string
32 default "arch/um/configs/i386_defconfig" if X86_32
33 default "arch/um/configs/x86_64_defconfig" if X86_64
34
35config RWSEM_XCHGADD_ALGORITHM
36 def_bool 64BIT
37
38config RWSEM_GENERIC_SPINLOCK
39 def_bool !RWSEM_XCHGADD_ALGORITHM
40
41config 3_LEVEL_PGTABLES
42 bool "Three-level pagetables" if !64BIT
43 default 64BIT
44 help
45 Three-level pagetables will let UML have more than 4G of physical
46 memory. All the memory that can't be mapped directly will be treated
47 as high memory.
48
49 However, this it experimental on 32-bit architectures, so if unsure say
50 N (on x86-64 it's automatically enabled, instead, as it's safe there).
51
52config ARCH_HAS_SC_SIGNALS
53 def_bool !64BIT
54
55config ARCH_REUSE_HOST_VSYSCALL_AREA
56 def_bool !64BIT
57
58config GENERIC_HWEIGHT
59 def_bool y