| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * PSC clock descriptions for TI DaVinci DM644x |
| 4 | * |
| 5 | * Copyright (C) 2018 David Lechner <david@lechnology.com> |
| 6 | */ |
| 7 | |
| 8 | #include <linux/clk-provider.h> |
| 9 | #include <linux/clk/davinci.h> |
| 10 | #include <linux/clk.h> |
| 11 | #include <linux/clkdev.h> |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/types.h> |
| 15 | |
| 16 | #include "psc.h" |
| 17 | |
| 18 | LPSC_CLKDEV1(vpss_master_clkdev, "master", "vpss"); |
| 19 | LPSC_CLKDEV1(vpss_slave_clkdev, "slave", "vpss"); |
| 20 | LPSC_CLKDEV2(emac_clkdev, NULL, "davinci_emac.1", |
| 21 | "fck", "davinci_mdio.0"); |
| 22 | LPSC_CLKDEV1(usb_clkdev, "usb", NULL); |
| 23 | LPSC_CLKDEV1(ide_clkdev, NULL, "palm_bk3710"); |
| 24 | LPSC_CLKDEV2(aemif_clkdev, "aemif", NULL, |
| 25 | NULL, "ti-aemif"); |
| 26 | LPSC_CLKDEV1(mmcsd_clkdev, NULL, "dm6441-mmc.0"); |
| 27 | LPSC_CLKDEV1(asp0_clkdev, NULL, "davinci-mcbsp"); |
| 28 | LPSC_CLKDEV1(i2c_clkdev, NULL, "i2c_davinci.1"); |
| 29 | LPSC_CLKDEV1(uart0_clkdev, NULL, "serial8250.0"); |
| 30 | LPSC_CLKDEV1(uart1_clkdev, NULL, "serial8250.1"); |
| 31 | LPSC_CLKDEV1(uart2_clkdev, NULL, "serial8250.2"); |
| 32 | /* REVISIT: gpio-davinci.c should be modified to drop con_id */ |
| 33 | LPSC_CLKDEV1(gpio_clkdev, "gpio", NULL); |
| 34 | LPSC_CLKDEV1(timer0_clkdev, "timer0", NULL); |
| 35 | LPSC_CLKDEV1(timer2_clkdev, NULL, "davinci-wdt"); |
| 36 | |
| 37 | static const struct davinci_lpsc_clk_info dm644x_psc_info[] = { |
| 38 | LPSC(0, 0, vpss_master, pll1_sysclk3, vpss_master_clkdev, 0), |
| 39 | LPSC(1, 0, vpss_slave, pll1_sysclk3, vpss_slave_clkdev, 0), |
| 40 | LPSC(6, 0, emac, pll1_sysclk5, emac_clkdev, 0), |
| 41 | LPSC(9, 0, usb, pll1_sysclk5, usb_clkdev, 0), |
| 42 | LPSC(10, 0, ide, pll1_sysclk5, ide_clkdev, 0), |
| 43 | LPSC(11, 0, vlynq, pll1_sysclk5, NULL, 0), |
| 44 | LPSC(14, 0, aemif, pll1_sysclk5, aemif_clkdev, 0), |
| 45 | LPSC(15, 0, mmcsd, pll1_sysclk5, mmcsd_clkdev, 0), |
| 46 | LPSC(17, 0, asp0, pll1_sysclk5, asp0_clkdev, 0), |
| 47 | LPSC(18, 0, i2c, pll1_auxclk, i2c_clkdev, 0), |
| 48 | LPSC(19, 0, uart0, pll1_auxclk, uart0_clkdev, 0), |
| 49 | LPSC(20, 0, uart1, pll1_auxclk, uart1_clkdev, 0), |
| 50 | LPSC(21, 0, uart2, pll1_auxclk, uart2_clkdev, 0), |
| 51 | LPSC(22, 0, spi, pll1_sysclk5, NULL, 0), |
| 52 | LPSC(23, 0, pwm0, pll1_auxclk, NULL, 0), |
| 53 | LPSC(24, 0, pwm1, pll1_auxclk, NULL, 0), |
| 54 | LPSC(25, 0, pwm2, pll1_auxclk, NULL, 0), |
| 55 | LPSC(26, 0, gpio, pll1_sysclk5, gpio_clkdev, 0), |
| 56 | LPSC(27, 0, timer0, pll1_auxclk, timer0_clkdev, LPSC_ALWAYS_ENABLED), |
| 57 | LPSC(28, 0, timer1, pll1_auxclk, NULL, 0), |
| 58 | /* REVISIT: why can't this be disabled? */ |
| 59 | LPSC(29, 0, timer2, pll1_auxclk, timer2_clkdev, LPSC_ALWAYS_ENABLED), |
| 60 | LPSC(31, 0, arm, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED), |
| 61 | /* REVISIT how to disable? */ |
| 62 | LPSC(39, 1, dsp, pll1_sysclk1, NULL, LPSC_ALWAYS_ENABLED), |
| 63 | /* REVISIT how to disable? */ |
| 64 | LPSC(40, 1, vicp, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED), |
| 65 | { } |
| 66 | }; |
| 67 | |
| 68 | int dm644x_psc_init(struct device *dev, void __iomem *base) |
| 69 | { |
| 70 | return davinci_psc_register_clocks(dev, dm644x_psc_info, 41, base); |
| 71 | } |
| 72 | |
| 73 | static struct clk_bulk_data dm644x_psc_parent_clks[] = { |
| 74 | { .id = "pll1_sysclk1" }, |
| 75 | { .id = "pll1_sysclk2" }, |
| 76 | { .id = "pll1_sysclk3" }, |
| 77 | { .id = "pll1_sysclk5" }, |
| 78 | { .id = "pll1_auxclk" }, |
| 79 | }; |
| 80 | |
| 81 | const struct davinci_psc_init_data dm644x_psc_init_data = { |
| 82 | .parent_clks = dm644x_psc_parent_clks, |
| 83 | .num_parent_clks = ARRAY_SIZE(dm644x_psc_parent_clks), |
| 84 | .psc_init = &dm644x_psc_init, |
| 85 | }; |