| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Copyright (c) 2019 MediaTek Inc. |
| 4 | */ |
| 5 | |
| 6 | #ifndef __DT_BINDINGS_INTERCONNECT_MTK_MT6779_EMI_H |
| 7 | #define __DT_BINDINGS_INTERCONNECT_MTK_MT6779_EMI_H |
| 8 | |
| 9 | #define MT6779_SLAVE_DDR_EMI 0 |
| 10 | #define MT6779_MASTER_MCUSYS 1 |
| 11 | #define MT6779_MASTER_GPUSYS 2 |
| 12 | #define MT6779_MASTER_MMSYS 3 |
| 13 | #define MT6779_MASTER_MM_VPU 4 |
| 14 | #define MT6779_MASTER_MM_DISP 5 |
| 15 | #define MT6779_MASTER_MM_VDEC 6 |
| 16 | #define MT6779_MASTER_MM_VENC 7 |
| 17 | #define MT6779_MASTER_MM_CAM 8 |
| 18 | #define MT6779_MASTER_MM_IMG 9 |
| 19 | #define MT6779_MASTER_MM_MDP 10 |
| 20 | #define MT6779_MASTER_VPUSYS 11 |
| 21 | #define MT6779_MASTER_VPU_0 12 |
| 22 | #define MT6779_MASTER_VPU_1 13 |
| 23 | #define MT6779_MASTER_MDLASYS 14 |
| 24 | #define MT6779_MASTER_MDLA_0 15 |
| 25 | #define MT6779_MASTER_DEBUGSYS 16 |
| 26 | |
| 27 | #endif |