| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 - Virtual Open Systems and Columbia University |
| 3 | * Author: Christoffer Dall <c.dall@virtualopensystems.com> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License, version 2, as |
| 7 | * published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program; if not, write to the Free Software |
| 16 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
| 17 | */ |
| 18 | #include <linux/compiler.h> |
| 19 | #include <linux/errno.h> |
| 20 | #include <linux/sched.h> |
| 21 | #include <linux/kvm_host.h> |
| 22 | #include <linux/kvm.h> |
| 23 | |
| 24 | #include <asm/unified.h> |
| 25 | #include <asm/ptrace.h> |
| 26 | #include <asm/cputype.h> |
| 27 | #include <asm/kvm_arm.h> |
| 28 | #include <asm/kvm_coproc.h> |
| 29 | #include <asm/kvm_emulate.h> |
| 30 | |
| 31 | #include <kvm/arm_arch_timer.h> |
| 32 | |
| 33 | /****************************************************************************** |
| 34 | * Cortex-A15 and Cortex-A7 Reset Values |
| 35 | */ |
| 36 | |
| 37 | static struct kvm_regs cortexa_regs_reset = { |
| 38 | .usr_regs.ARM_cpsr = SVC_MODE | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT, |
| 39 | }; |
| 40 | |
| 41 | |
| 42 | /******************************************************************************* |
| 43 | * Exported reset function |
| 44 | */ |
| 45 | |
| 46 | /** |
| 47 | * kvm_reset_vcpu - sets core registers and cp15 registers to reset value |
| 48 | * @vcpu: The VCPU pointer |
| 49 | * |
| 50 | * This function finds the right table above and sets the registers on the |
| 51 | * virtual CPU struct to their architecturally defined reset values. |
| 52 | */ |
| 53 | int kvm_reset_vcpu(struct kvm_vcpu *vcpu) |
| 54 | { |
| 55 | struct kvm_regs *reset_regs; |
| 56 | |
| 57 | switch (vcpu->arch.target) { |
| 58 | case KVM_ARM_TARGET_CORTEX_A7: |
| 59 | case KVM_ARM_TARGET_CORTEX_A15: |
| 60 | reset_regs = &cortexa_regs_reset; |
| 61 | vcpu->arch.midr = read_cpuid_id(); |
| 62 | break; |
| 63 | default: |
| 64 | return -ENODEV; |
| 65 | } |
| 66 | |
| 67 | /* Reset core registers */ |
| 68 | memcpy(&vcpu->arch.ctxt.gp_regs, reset_regs, sizeof(vcpu->arch.ctxt.gp_regs)); |
| 69 | |
| 70 | /* Reset CP15 registers */ |
| 71 | kvm_reset_coprocs(vcpu); |
| 72 | |
| 73 | /* |
| 74 | * Additional reset state handling that PSCI may have imposed on us. |
| 75 | * Must be done after all the sys_reg reset. |
| 76 | */ |
| 77 | if (READ_ONCE(vcpu->arch.reset_state.reset)) { |
| 78 | unsigned long target_pc = vcpu->arch.reset_state.pc; |
| 79 | |
| 80 | /* Gracefully handle Thumb2 entry point */ |
| 81 | if (target_pc & 1) { |
| 82 | target_pc &= ~1UL; |
| 83 | vcpu_set_thumb(vcpu); |
| 84 | } |
| 85 | |
| 86 | /* Propagate caller endianness */ |
| 87 | if (vcpu->arch.reset_state.be) |
| 88 | kvm_vcpu_set_be(vcpu); |
| 89 | |
| 90 | *vcpu_pc(vcpu) = target_pc; |
| 91 | vcpu_set_reg(vcpu, 0, vcpu->arch.reset_state.r0); |
| 92 | |
| 93 | vcpu->arch.reset_state.reset = false; |
| 94 | } |
| 95 | |
| 96 | /* Reset arch_timer context */ |
| 97 | return kvm_timer_vcpu_reset(vcpu); |
| 98 | } |