| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | /* | 
 | 2 |  * Copyright (C) 2012 Freescale Semiconductor, Inc. | 
 | 3 |  * | 
 | 4 |  * This program is free software; you can redistribute it and/or modify | 
 | 5 |  * it under the terms of the GNU General Public License version 2 as | 
 | 6 |  * published by the Free Software Foundation. | 
 | 7 |  */ | 
 | 8 |  | 
 | 9 | #include <linux/cpuidle.h> | 
 | 10 | #include <linux/module.h> | 
 | 11 | #include <asm/cpuidle.h> | 
 | 12 |  | 
 | 13 | #include <soc/imx/cpuidle.h> | 
 | 14 |  | 
 | 15 | #include "common.h" | 
 | 16 | #include "cpuidle.h" | 
 | 17 | #include "hardware.h" | 
 | 18 |  | 
 | 19 | static int num_idle_cpus = 0; | 
 | 20 | static DEFINE_SPINLOCK(cpuidle_lock); | 
 | 21 |  | 
 | 22 | static int imx6q_enter_wait(struct cpuidle_device *dev, | 
 | 23 | 			    struct cpuidle_driver *drv, int index) | 
 | 24 | { | 
 | 25 | 	spin_lock(&cpuidle_lock); | 
 | 26 | 	if (++num_idle_cpus == num_online_cpus()) | 
 | 27 | 		imx6_set_lpm(WAIT_UNCLOCKED); | 
 | 28 | 	spin_unlock(&cpuidle_lock); | 
 | 29 |  | 
 | 30 | 	cpu_do_idle(); | 
 | 31 |  | 
 | 32 | 	spin_lock(&cpuidle_lock); | 
 | 33 | 	if (num_idle_cpus-- == num_online_cpus()) | 
 | 34 | 		imx6_set_lpm(WAIT_CLOCKED); | 
 | 35 | 	spin_unlock(&cpuidle_lock); | 
 | 36 |  | 
 | 37 | 	return index; | 
 | 38 | } | 
 | 39 |  | 
 | 40 | static struct cpuidle_driver imx6q_cpuidle_driver = { | 
 | 41 | 	.name = "imx6q_cpuidle", | 
 | 42 | 	.owner = THIS_MODULE, | 
 | 43 | 	.states = { | 
 | 44 | 		/* WFI */ | 
 | 45 | 		ARM_CPUIDLE_WFI_STATE, | 
 | 46 | 		/* WAIT */ | 
 | 47 | 		{ | 
 | 48 | 			.exit_latency = 50, | 
 | 49 | 			.target_residency = 75, | 
 | 50 | 			.flags = CPUIDLE_FLAG_TIMER_STOP, | 
 | 51 | 			.enter = imx6q_enter_wait, | 
 | 52 | 			.name = "WAIT", | 
 | 53 | 			.desc = "Clock off", | 
 | 54 | 		}, | 
 | 55 | 	}, | 
 | 56 | 	.state_count = 2, | 
 | 57 | 	.safe_state_index = 0, | 
 | 58 | }; | 
 | 59 |  | 
 | 60 | /* | 
 | 61 |  * i.MX6 Q/DL has an erratum (ERR006687) that prevents the FEC from waking the | 
 | 62 |  * CPUs when they are in wait(unclocked) state. As the hardware workaround isn't | 
 | 63 |  * applicable to all boards, disable the deeper idle state when the workaround | 
 | 64 |  * isn't present and the FEC is in use. | 
 | 65 |  */ | 
 | 66 | void imx6q_cpuidle_fec_irqs_used(void) | 
 | 67 | { | 
 | 68 | 	imx6q_cpuidle_driver.states[1].disabled = true; | 
 | 69 | } | 
 | 70 | EXPORT_SYMBOL_GPL(imx6q_cpuidle_fec_irqs_used); | 
 | 71 |  | 
 | 72 | void imx6q_cpuidle_fec_irqs_unused(void) | 
 | 73 | { | 
 | 74 | 	imx6q_cpuidle_driver.states[1].disabled = false; | 
 | 75 | } | 
 | 76 | EXPORT_SYMBOL_GPL(imx6q_cpuidle_fec_irqs_unused); | 
 | 77 |  | 
 | 78 | int __init imx6q_cpuidle_init(void) | 
 | 79 | { | 
 | 80 | 	/* Set INT_MEM_CLK_LPM bit to get a reliable WAIT mode support */ | 
 | 81 | 	imx6_set_int_mem_clk_lpm(true); | 
 | 82 |  | 
 | 83 | 	return cpuidle_register(&imx6q_cpuidle_driver, NULL); | 
 | 84 | } |