| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ |
| 2 | /* | ||||
| 3 | * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz> | ||||
| 4 | */ | ||||
| 5 | |||||
| 6 | #ifndef _DT_BINDINGS_RST_SUN50I_H6_R_CCU_H_ | ||||
| 7 | #define _DT_BINDINGS_RST_SUN50I_H6_R_CCU_H_ | ||||
| 8 | |||||
| 9 | #define RST_R_APB1_TIMER 0 | ||||
| 10 | #define RST_R_APB1_TWD 1 | ||||
| 11 | #define RST_R_APB1_PWM 2 | ||||
| 12 | #define RST_R_APB2_UART 3 | ||||
| 13 | #define RST_R_APB2_I2C 4 | ||||
| 14 | #define RST_R_APB1_IR 5 | ||||
| 15 | #define RST_R_APB1_W1 6 | ||||
| 16 | |||||
| 17 | #endif /* _DT_BINDINGS_RST_SUN50I_H6_R_CCU_H_ */ | ||||