| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 | 
 | 2 | // | 
 | 3 | // Copyright 2009 Simtec Electronics | 
 | 4 | //	Ben Dooks <ben@simtec.co.uk> | 
 | 5 | //	http://armlinux.simtec.co.uk/ | 
 | 6 |  | 
 | 7 | /* | 
 | 8 |  * NOTE: Code in this file is not used when booting with Device Tree support. | 
 | 9 |  */ | 
 | 10 |  | 
 | 11 | #include <linux/kernel.h> | 
 | 12 | #include <linux/types.h> | 
 | 13 | #include <linux/interrupt.h> | 
 | 14 | #include <linux/list.h> | 
 | 15 | #include <linux/timer.h> | 
 | 16 | #include <linux/init.h> | 
 | 17 | #include <linux/clk.h> | 
 | 18 | #include <linux/io.h> | 
 | 19 | #include <linux/device.h> | 
 | 20 | #include <linux/serial_core.h> | 
 | 21 | #include <linux/serial_s3c.h> | 
 | 22 | #include <linux/platform_device.h> | 
 | 23 | #include <linux/of.h> | 
 | 24 |  | 
 | 25 | #include <asm/mach/arch.h> | 
 | 26 | #include <asm/mach/map.h> | 
 | 27 | #include <asm/mach/irq.h> | 
 | 28 |  | 
 | 29 | #include <mach/hardware.h> | 
 | 30 | #include <asm/irq.h> | 
 | 31 |  | 
 | 32 | #include <plat/cpu-freq.h> | 
 | 33 | #include <mach/regs-clock.h> | 
 | 34 |  | 
 | 35 | #include <plat/cpu.h> | 
 | 36 | #include <plat/devs.h> | 
 | 37 | #include <plat/sdhci.h> | 
 | 38 | #include <plat/iic-core.h> | 
 | 39 |  | 
 | 40 | #include "common.h" | 
 | 41 | #include "onenand-core.h" | 
 | 42 |  | 
 | 43 | void __init s3c6400_map_io(void) | 
 | 44 | { | 
 | 45 | 	/* setup SDHCI */ | 
 | 46 |  | 
 | 47 | 	s3c6400_default_sdhci0(); | 
 | 48 | 	s3c6400_default_sdhci1(); | 
 | 49 | 	s3c6400_default_sdhci2(); | 
 | 50 |  | 
 | 51 | 	/* the i2c devices are directly compatible with s3c2440 */ | 
 | 52 | 	s3c_i2c0_setname("s3c2440-i2c"); | 
 | 53 |  | 
 | 54 | 	s3c_device_nand.name = "s3c6400-nand"; | 
 | 55 |  | 
 | 56 | 	s3c_onenand_setname("s3c6400-onenand"); | 
 | 57 | 	s3c64xx_onenand1_setname("s3c6400-onenand"); | 
 | 58 | } | 
 | 59 |  | 
 | 60 | void __init s3c6400_init_irq(void) | 
 | 61 | { | 
 | 62 | 	/* VIC0 does not have IRQS 5..7, | 
 | 63 | 	 * VIC1 is fully populated. */ | 
 | 64 | 	s3c64xx_init_irq(~0 & ~(0xf << 5), ~0); | 
 | 65 | } | 
 | 66 |  | 
 | 67 | static struct bus_type s3c6400_subsys = { | 
 | 68 | 	.name		= "s3c6400-core", | 
 | 69 | 	.dev_name	= "s3c6400-core", | 
 | 70 | }; | 
 | 71 |  | 
 | 72 | static struct device s3c6400_dev = { | 
 | 73 | 	.bus	= &s3c6400_subsys, | 
 | 74 | }; | 
 | 75 |  | 
 | 76 | static int __init s3c6400_core_init(void) | 
 | 77 | { | 
 | 78 | 	/* Not applicable when using DT. */ | 
 | 79 | 	if (of_have_populated_dt() || soc_is_s3c64xx()) | 
 | 80 | 		return 0; | 
 | 81 |  | 
 | 82 | 	return subsys_system_register(&s3c6400_subsys, NULL); | 
 | 83 | } | 
 | 84 |  | 
 | 85 | core_initcall(s3c6400_core_init); | 
 | 86 |  | 
 | 87 | int __init s3c6400_init(void) | 
 | 88 | { | 
 | 89 | 	printk("S3C6400: Initialising architecture\n"); | 
 | 90 |  | 
 | 91 | 	return device_register(&s3c6400_dev); | 
 | 92 | } |