blob: 27e0979b315860dbddf032d11e7826891ede1bd9 [file] [log] [blame]
xjb04a4022021-11-25 15:01:52 +08001/*
2 * TI clock support
3 *
4 * Copyright (C) 2013 Texas Instruments, Inc.
5 *
6 * Tero Kristo <t-kristo@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
13 * kind, whether express or implied; without even the implied warranty
14 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18#include <linux/clk.h>
19#include <linux/clk-provider.h>
20#include <linux/clkdev.h>
21#include <linux/clk/ti.h>
22#include <linux/of.h>
23#include <linux/of_address.h>
24#include <linux/list.h>
25#include <linux/regmap.h>
26#include <linux/bootmem.h>
27#include <linux/device.h>
28
29#include "clock.h"
30
31#undef pr_fmt
32#define pr_fmt(fmt) "%s: " fmt, __func__
33
34struct ti_clk_ll_ops *ti_clk_ll_ops;
35static struct device_node *clocks_node_ptr[CLK_MAX_MEMMAPS];
36
37static struct ti_clk_features ti_clk_features;
38
39struct clk_iomap {
40 struct regmap *regmap;
41 void __iomem *mem;
42};
43
44static struct clk_iomap *clk_memmaps[CLK_MAX_MEMMAPS];
45
46static void clk_memmap_writel(u32 val, const struct clk_omap_reg *reg)
47{
48 struct clk_iomap *io = clk_memmaps[reg->index];
49
50 if (reg->ptr)
51 writel_relaxed(val, reg->ptr);
52 else if (io->regmap)
53 regmap_write(io->regmap, reg->offset, val);
54 else
55 writel_relaxed(val, io->mem + reg->offset);
56}
57
58static void _clk_rmw(u32 val, u32 mask, void __iomem *ptr)
59{
60 u32 v;
61
62 v = readl_relaxed(ptr);
63 v &= ~mask;
64 v |= val;
65 writel_relaxed(v, ptr);
66}
67
68static void clk_memmap_rmw(u32 val, u32 mask, const struct clk_omap_reg *reg)
69{
70 struct clk_iomap *io = clk_memmaps[reg->index];
71
72 if (reg->ptr) {
73 _clk_rmw(val, mask, reg->ptr);
74 } else if (io->regmap) {
75 regmap_update_bits(io->regmap, reg->offset, mask, val);
76 } else {
77 _clk_rmw(val, mask, io->mem + reg->offset);
78 }
79}
80
81static u32 clk_memmap_readl(const struct clk_omap_reg *reg)
82{
83 u32 val;
84 struct clk_iomap *io = clk_memmaps[reg->index];
85
86 if (reg->ptr)
87 val = readl_relaxed(reg->ptr);
88 else if (io->regmap)
89 regmap_read(io->regmap, reg->offset, &val);
90 else
91 val = readl_relaxed(io->mem + reg->offset);
92
93 return val;
94}
95
96/**
97 * ti_clk_setup_ll_ops - setup low level clock operations
98 * @ops: low level clock ops descriptor
99 *
100 * Sets up low level clock operations for TI clock driver. This is used
101 * to provide various callbacks for the clock driver towards platform
102 * specific code. Returns 0 on success, -EBUSY if ll_ops have been
103 * registered already.
104 */
105int ti_clk_setup_ll_ops(struct ti_clk_ll_ops *ops)
106{
107 if (ti_clk_ll_ops) {
108 pr_err("Attempt to register ll_ops multiple times.\n");
109 return -EBUSY;
110 }
111
112 ti_clk_ll_ops = ops;
113 ops->clk_readl = clk_memmap_readl;
114 ops->clk_writel = clk_memmap_writel;
115 ops->clk_rmw = clk_memmap_rmw;
116
117 return 0;
118}
119
120/**
121 * ti_dt_clocks_register - register DT alias clocks during boot
122 * @oclks: list of clocks to register
123 *
124 * Register alias or non-standard DT clock entries during boot. By
125 * default, DT clocks are found based on their node name. If any
126 * additional con-id / dev-id -> clock mapping is required, use this
127 * function to list these.
128 */
129void __init ti_dt_clocks_register(struct ti_dt_clk oclks[])
130{
131 struct ti_dt_clk *c;
132 struct device_node *node, *parent;
133 struct clk *clk;
134 struct of_phandle_args clkspec;
135 char buf[64];
136 char *ptr;
137 char *tags[2];
138 int i;
139 int num_args;
140 int ret;
141 static bool clkctrl_nodes_missing;
142 static bool has_clkctrl_data;
143
144 for (c = oclks; c->node_name != NULL; c++) {
145 strcpy(buf, c->node_name);
146 ptr = buf;
147 for (i = 0; i < 2; i++)
148 tags[i] = NULL;
149 num_args = 0;
150 while (*ptr) {
151 if (*ptr == ':') {
152 if (num_args >= 2) {
153 pr_warn("Bad number of tags on %s\n",
154 c->node_name);
155 return;
156 }
157 tags[num_args++] = ptr + 1;
158 *ptr = 0;
159 }
160 ptr++;
161 }
162
163 if (num_args && clkctrl_nodes_missing)
164 continue;
165
166 node = of_find_node_by_name(NULL, buf);
167 if (num_args) {
168 parent = node;
169 node = of_get_child_by_name(parent, "clk");
170 of_node_put(parent);
171 }
172
173 clkspec.np = node;
174 clkspec.args_count = num_args;
175 for (i = 0; i < num_args; i++) {
176 ret = kstrtoint(tags[i], i ? 10 : 16, clkspec.args + i);
177 if (ret) {
178 pr_warn("Bad tag in %s at %d: %s\n",
179 c->node_name, i, tags[i]);
180 of_node_put(node);
181 return;
182 }
183 }
184 clk = of_clk_get_from_provider(&clkspec);
185 of_node_put(node);
186 if (!IS_ERR(clk)) {
187 c->lk.clk = clk;
188 clkdev_add(&c->lk);
189 } else {
190 if (num_args && !has_clkctrl_data) {
191 if (of_find_compatible_node(NULL, NULL,
192 "ti,clkctrl")) {
193 has_clkctrl_data = true;
194 } else {
195 clkctrl_nodes_missing = true;
196
197 pr_warn("missing clkctrl nodes, please update your dts.\n");
198 continue;
199 }
200 }
201
202 pr_warn("failed to lookup clock node %s, ret=%ld\n",
203 c->node_name, PTR_ERR(clk));
204 }
205 }
206}
207
208struct clk_init_item {
209 struct device_node *node;
210 void *user;
211 ti_of_clk_init_cb_t func;
212 struct list_head link;
213};
214
215static LIST_HEAD(retry_list);
216
217/**
218 * ti_clk_retry_init - retries a failed clock init at later phase
219 * @node: device not for the clock
220 * @user: user data pointer
221 * @func: init function to be called for the clock
222 *
223 * Adds a failed clock init to the retry list. The retry list is parsed
224 * once all the other clocks have been initialized.
225 */
226int __init ti_clk_retry_init(struct device_node *node, void *user,
227 ti_of_clk_init_cb_t func)
228{
229 struct clk_init_item *retry;
230
231 pr_debug("%s: adding to retry list...\n", node->name);
232 retry = kzalloc(sizeof(*retry), GFP_KERNEL);
233 if (!retry)
234 return -ENOMEM;
235
236 retry->node = node;
237 retry->func = func;
238 retry->user = user;
239 list_add(&retry->link, &retry_list);
240
241 return 0;
242}
243
244/**
245 * ti_clk_get_reg_addr - get register address for a clock register
246 * @node: device node for the clock
247 * @index: register index from the clock node
248 * @reg: pointer to target register struct
249 *
250 * Builds clock register address from device tree information, and returns
251 * the data via the provided output pointer @reg. Returns 0 on success,
252 * negative error value on failure.
253 */
254int ti_clk_get_reg_addr(struct device_node *node, int index,
255 struct clk_omap_reg *reg)
256{
257 u32 val;
258 int i;
259
260 for (i = 0; i < CLK_MAX_MEMMAPS; i++) {
261 if (clocks_node_ptr[i] == node->parent)
262 break;
263 }
264
265 if (i == CLK_MAX_MEMMAPS) {
266 pr_err("clk-provider not found for %s!\n", node->name);
267 return -ENOENT;
268 }
269
270 reg->index = i;
271
272 if (of_property_read_u32_index(node, "reg", index, &val)) {
273 pr_err("%s must have reg[%d]!\n", node->name, index);
274 return -EINVAL;
275 }
276
277 reg->offset = val;
278 reg->ptr = NULL;
279
280 return 0;
281}
282
283void ti_clk_latch(struct clk_omap_reg *reg, s8 shift)
284{
285 u32 latch;
286
287 if (shift < 0)
288 return;
289
290 latch = 1 << shift;
291
292 ti_clk_ll_ops->clk_rmw(latch, latch, reg);
293 ti_clk_ll_ops->clk_rmw(0, latch, reg);
294 ti_clk_ll_ops->clk_readl(reg); /* OCP barrier */
295}
296
297/**
298 * omap2_clk_provider_init - init master clock provider
299 * @parent: master node
300 * @index: internal index for clk_reg_ops
301 * @syscon: syscon regmap pointer for accessing clock registers
302 * @mem: iomem pointer for the clock provider memory area, only used if
303 * syscon is not provided
304 *
305 * Initializes a master clock IP block. This basically sets up the
306 * mapping from clocks node to the memory map index. All the clocks
307 * are then initialized through the common of_clk_init call, and the
308 * clocks will access their memory maps based on the node layout.
309 * Returns 0 in success.
310 */
311int __init omap2_clk_provider_init(struct device_node *parent, int index,
312 struct regmap *syscon, void __iomem *mem)
313{
314 struct device_node *clocks;
315 struct clk_iomap *io;
316
317 /* get clocks for this parent */
318 clocks = of_get_child_by_name(parent, "clocks");
319 if (!clocks) {
320 pr_err("%s missing 'clocks' child node.\n", parent->name);
321 return -EINVAL;
322 }
323
324 /* add clocks node info */
325 clocks_node_ptr[index] = clocks;
326
327 io = kzalloc(sizeof(*io), GFP_KERNEL);
328 if (!io)
329 return -ENOMEM;
330
331 io->regmap = syscon;
332 io->mem = mem;
333
334 clk_memmaps[index] = io;
335
336 return 0;
337}
338
339/**
340 * omap2_clk_legacy_provider_init - initialize a legacy clock provider
341 * @index: index for the clock provider
342 * @mem: iomem pointer for the clock provider memory area
343 *
344 * Initializes a legacy clock provider memory mapping.
345 */
346void __init omap2_clk_legacy_provider_init(int index, void __iomem *mem)
347{
348 struct clk_iomap *io;
349
350 io = memblock_virt_alloc(sizeof(*io), 0);
351
352 io->mem = mem;
353
354 clk_memmaps[index] = io;
355}
356
357/**
358 * ti_dt_clk_init_retry_clks - init clocks from the retry list
359 *
360 * Initializes any clocks that have failed to initialize before,
361 * reasons being missing parent node(s) during earlier init. This
362 * typically happens only for DPLLs which need to have both of their
363 * parent clocks ready during init.
364 */
365void ti_dt_clk_init_retry_clks(void)
366{
367 struct clk_init_item *retry;
368 struct clk_init_item *tmp;
369 int retries = 5;
370
371 while (!list_empty(&retry_list) && retries) {
372 list_for_each_entry_safe(retry, tmp, &retry_list, link) {
373 pr_debug("retry-init: %s\n", retry->node->name);
374 retry->func(retry->user, retry->node);
375 list_del(&retry->link);
376 kfree(retry);
377 }
378 retries--;
379 }
380}
381
382static const struct of_device_id simple_clk_match_table[] __initconst = {
383 { .compatible = "fixed-clock" },
384 { .compatible = "fixed-factor-clock" },
385 { }
386};
387
388/**
389 * ti_clk_add_aliases - setup clock aliases
390 *
391 * Sets up any missing clock aliases. No return value.
392 */
393void __init ti_clk_add_aliases(void)
394{
395 struct device_node *np;
396 struct clk *clk;
397
398 for_each_matching_node(np, simple_clk_match_table) {
399 struct of_phandle_args clkspec;
400
401 clkspec.np = np;
402 clk = of_clk_get_from_provider(&clkspec);
403
404 ti_clk_add_alias(NULL, clk, np->name);
405 }
406}
407
408/**
409 * ti_clk_setup_features - setup clock features flags
410 * @features: features definition to use
411 *
412 * Initializes the clock driver features flags based on platform
413 * provided data. No return value.
414 */
415void __init ti_clk_setup_features(struct ti_clk_features *features)
416{
417 memcpy(&ti_clk_features, features, sizeof(*features));
418}
419
420/**
421 * ti_clk_get_features - get clock driver features flags
422 *
423 * Get TI clock driver features description. Returns a pointer
424 * to the current feature setup.
425 */
426const struct ti_clk_features *ti_clk_get_features(void)
427{
428 return &ti_clk_features;
429}
430
431/**
432 * omap2_clk_enable_init_clocks - prepare & enable a list of clocks
433 * @clk_names: ptr to an array of strings of clock names to enable
434 * @num_clocks: number of clock names in @clk_names
435 *
436 * Prepare and enable a list of clocks, named by @clk_names. No
437 * return value. XXX Deprecated; only needed until these clocks are
438 * properly claimed and enabled by the drivers or core code that uses
439 * them. XXX What code disables & calls clk_put on these clocks?
440 */
441void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks)
442{
443 struct clk *init_clk;
444 int i;
445
446 for (i = 0; i < num_clocks; i++) {
447 init_clk = clk_get(NULL, clk_names[i]);
448 if (WARN(IS_ERR(init_clk), "could not find init clock %s\n",
449 clk_names[i]))
450 continue;
451 clk_prepare_enable(init_clk);
452 }
453}
454
455/**
456 * ti_clk_add_alias - add a clock alias for a TI clock
457 * @dev: device alias for this clock
458 * @clk: clock handle to create alias for
459 * @con: connection ID for this clock
460 *
461 * Creates a clock alias for a TI clock. Allocates the clock lookup entry
462 * and assigns the data to it. Returns 0 if successful, negative error
463 * value otherwise.
464 */
465int ti_clk_add_alias(struct device *dev, struct clk *clk, const char *con)
466{
467 struct clk_lookup *cl;
468
469 if (!clk)
470 return 0;
471
472 if (IS_ERR(clk))
473 return PTR_ERR(clk);
474
475 cl = kzalloc(sizeof(*cl), GFP_KERNEL);
476 if (!cl)
477 return -ENOMEM;
478
479 if (dev)
480 cl->dev_id = dev_name(dev);
481 cl->con_id = con;
482 cl->clk = clk;
483
484 clkdev_add(cl);
485
486 return 0;
487}
488
489/**
490 * ti_clk_register - register a TI clock to the common clock framework
491 * @dev: device for this clock
492 * @hw: hardware clock handle
493 * @con: connection ID for this clock
494 *
495 * Registers a TI clock to the common clock framework, and adds a clock
496 * alias for it. Returns a handle to the registered clock if successful,
497 * ERR_PTR value in failure.
498 */
499struct clk *ti_clk_register(struct device *dev, struct clk_hw *hw,
500 const char *con)
501{
502 struct clk *clk;
503 int ret;
504
505 clk = clk_register(dev, hw);
506 if (IS_ERR(clk))
507 return clk;
508
509 ret = ti_clk_add_alias(dev, clk, con);
510 if (ret) {
511 clk_unregister(clk);
512 return ERR_PTR(ret);
513 }
514
515 return clk;
516}