blob: f0977519c980f04ff76a6b50d3ecff15076f105a [file] [log] [blame]
xjb04a4022021-11-25 15:01:52 +08001/*
2 * Copyright (c) 2008-2014 Travis Geiselbrecht
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files
6 * (the "Software"), to deal in the Software without restriction,
7 * including without limitation the rights to use, copy, modify, merge,
8 * publish, distribute, sublicense, and/or sell copies of the Software,
9 * and to permit persons to whom the Software is furnished to do so,
10 * subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
18 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
19 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
20 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
21 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23#ifndef __ARCH_OPS_H
24#define __ARCH_OPS_H
25
26#ifndef ASSEMBLY
27
28#include <sys/types.h>
29#include <stddef.h>
30#include <stdbool.h>
31#include <compiler.h>
32
33__BEGIN_CDECLS
34
35/* fast routines that most arches will implement inline */
36static void arch_enable_ints(void);
37static void arch_disable_ints(void);
38static bool arch_ints_disabled(void);
39static bool arch_in_int_handler(void);
40
41static int atomic_swap(volatile int *ptr, int val);
42static int atomic_add(volatile int *ptr, int val);
43static int atomic_and(volatile int *ptr, int val);
44static int atomic_or(volatile int *ptr, int val);
45
46static uint32_t arch_cycle_count(void);
47
48static uint arch_curr_cpu_num(void);
49
50/* Use to align structures on cache lines to avoid cpu aliasing. */
51#define __CPU_ALIGN __ALIGNED(CACHE_LINE)
52
53#endif // !ASSEMBLY
54#define ICACHE 1
55#define DCACHE 2
56#define UCACHE (ICACHE|DCACHE)
57#ifndef ASSEMBLY
58
59void arch_disable_cache(uint flags);
60void arch_enable_cache(uint flags);
61
62void arch_clean_cache_range(addr_t start, size_t len);
63void arch_clean_invalidate_cache_range(addr_t start, size_t len);
64void arch_invalidate_cache_range(addr_t start, size_t len);
65void arch_sync_cache_range(addr_t start, size_t len);
66
67void arch_idle(void);
68
69__END_CDECLS
70
71#endif // !ASSEMBLY
72
73#include <arch/arch_ops.h>
74
75#endif