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192.168.1.100 / T800 / 19f421ece02e978f016bb6ceca25d3d8846eeace / . / src / kernel / linux / v4.19 / arch / m68k / 68000 / head.S
blob: 140220662e33e9932e6d8442f0346ec74b48138c [file] [log] [blame]
xjb04a4022021-11-25 15:01:52 +0800[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * head.S - Common startup code for 68000 core based CPU's
4 *
5 * 2012.10.21, Luis Alves <ljalvs@gmail.com>, Single head.S file for all
6 * 68000 core based CPU's. Based on the sources from:
7 * Coldfire by Greg Ungerer <gerg@snapgear.com>
8 * 68328 by D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>,
9 * Kenneth Albanowski <kjahds@kjahds.com>,
10 * The Silver Hammer Group, Ltd.
11 *
12 */
13
14#include <linux/linkage.h>
15#include <linux/init.h>
16#include <asm/asm-offsets.h>
17#include <asm/thread_info.h>
18
19
20/*****************************************************************************
21 * UCSIMM and UCDIMM use CONFIG_MEMORY_RESERVE to reserve some RAM
22 *****************************************************************************/
23#ifdef CONFIG_MEMORY_RESERVE
24#define RAMEND (CONFIG_RAMBASE+CONFIG_RAMSIZE)-(CONFIG_MEMORY_RESERVE*0x100000)
25#else
26#define RAMEND (CONFIG_RAMBASE+CONFIG_RAMSIZE)
27#endif
28/*****************************************************************************/
29
30.global _start
31.global _rambase
32.global _ramvec
33.global _ramstart
34.global _ramend
35
36#if defined(CONFIG_PILOT) || defined(CONFIG_INIT_LCD)
37.global bootlogo_bits
38#endif
39
40/* Defining DEBUG_HEAD_CODE, serial port in 68x328 is inited */
41/* #define DEBUG_HEAD_CODE */
42#undef DEBUG_HEAD_CODE
43
44.data
45
46/*****************************************************************************
47 * RAM setup pointers. Used by the kernel to determine RAM location and size.
48 *****************************************************************************/
49
50_rambase:
51 .long 0
52_ramvec:
53 .long 0
54_ramstart:
55 .long 0
56_ramend:
57 .long 0
58
59__HEAD
60
61/*****************************************************************************
62 * Entry point, where all begins!
63 *****************************************************************************/
64
65_start:
66
67/* Pilot need this specific signature at the start of ROM */
68#ifdef CONFIG_PILOT
69 .byte 0x4e, 0xfa, 0x00, 0x0a /* bra opcode (jmp 10 bytes) */
70 .byte 'b', 'o', 'o', 't'
71 .word 10000
72 nop
73 moveq #0, %d0
74 movew %d0, 0xfffff618 /* Watchdog off */
75 movel #0x00011f07, 0xfffff114 /* CS A1 Mask */
76#endif /* CONFIG_PILOT */
77
78 movew #0x2700, %sr /* disable all interrupts */
79
80/*****************************************************************************
81 * Setup PLL and wait for it to settle (in 68x328 cpu's).
82 * Also, if enabled, init serial port.
83 *****************************************************************************/
84#if defined(CONFIG_M68328) || \
85 defined(CONFIG_M68EZ328) || \
86 defined(CONFIG_M68VZ328)
87
88/* Serial port setup. Should only be needed if debugging this startup code. */
89#ifdef DEBUG_HEAD_CODE
90 movew #0x0800, 0xfffff906 /* Ignore CTS */
91 movew #0x010b, 0xfffff902 /* BAUD to 9600 */
92 movew #0xe100, 0xfffff900 /* enable */
93#endif /* DEBUG_HEAD */
94
95#ifdef CONFIG_PILOT
96 movew #0x2410, 0xfffff200 /* PLLCR */
97#else
98 movew #0x2400, 0xfffff200 /* PLLCR */
99#endif
100 movew #0x0123, 0xfffff202 /* PLLFSR */
101 moveq #0, %d0
102 movew #16384, %d0 /* PLL settle wait loop */
103_pll_settle:
104 subw #1, %d0
105 bne _pll_settle
106#endif /* CONFIG_M68x328 */
107
108
109/*****************************************************************************
110 * If running kernel from ROM some specific initialization has to be done.
111 * (Assuming that everything is already init'ed when running from RAM)
112 *****************************************************************************/
113#ifdef CONFIG_ROMKERNEL
114
115/*****************************************************************************
116 * Init chip registers (uCsimm specific)
117 *****************************************************************************/
118#ifdef CONFIG_UCSIMM
119 moveb #0x00, 0xfffffb0b /* Watchdog off */
120 moveb #0x10, 0xfffff000 /* SCR */
121 moveb #0x00, 0xfffff40b /* enable chip select */
122 moveb #0x00, 0xfffff423 /* enable /DWE */
123 moveb #0x08, 0xfffffd0d /* disable hardmap */
124 moveb #0x07, 0xfffffd0e /* level 7 interrupt clear */
125 movew #0x8600, 0xfffff100 /* FLASH at 0x10c00000 */
126 movew #0x018b, 0xfffff110 /* 2Meg, enable, 0ws */
127 movew #0x8f00, 0xfffffc00 /* DRAM configuration */
128 movew #0x9667, 0xfffffc02 /* DRAM control */
129 movew #0x0000, 0xfffff106 /* DRAM at 0x00000000 */
130 movew #0x068f, 0xfffff116 /* 8Meg, enable, 0ws */
131 moveb #0x40, 0xfffff300 /* IVR */
132 movel #0x007FFFFF, %d0 /* IMR */
133 movel %d0, 0xfffff304
134 moveb 0xfffff42b, %d0
135 andb #0xe0, %d0
136 moveb %d0, 0xfffff42b
137#endif
138
139/*****************************************************************************
140 * Init LCD controller.
141 * (Assuming that LCD controller is already init'ed when running from RAM)
142 *****************************************************************************/
143#ifdef CONFIG_INIT_LCD
144#ifdef CONFIG_PILOT
145 moveb #0, 0xfffffA27 /* LCKCON */
146 movel #_start, 0xfffffA00 /* LSSA */
147 moveb #0xa, 0xfffffA05 /* LVPW */
148 movew #0x9f, 0xFFFFFa08 /* LXMAX */
149 movew #0x9f, 0xFFFFFa0a /* LYMAX */
150 moveb #9, 0xfffffa29 /* LBAR */
151 moveb #0, 0xfffffa25 /* LPXCD */
152 moveb #0x04, 0xFFFFFa20 /* LPICF */
153 moveb #0x58, 0xfffffA27 /* LCKCON */
154 moveb #0x85, 0xfffff429 /* PFDATA */
155 moveb #0xd8, 0xfffffA27 /* LCKCON */
156 moveb #0xc5, 0xfffff429 /* PFDATA */
157 moveb #0xd5, 0xfffff429 /* PFDATA */
158 movel #bootlogo_bits, 0xFFFFFA00 /* LSSA */
159 moveb #10, 0xFFFFFA05 /* LVPW */
160 movew #160, 0xFFFFFA08 /* LXMAX */
161 movew #160, 0xFFFFFA0A /* LYMAX */
162#else /* CONFIG_PILOT */
163 movel #bootlogo_bits, 0xfffffA00 /* LSSA */
164 moveb #0x28, 0xfffffA05 /* LVPW */
165 movew #0x280, 0xFFFFFa08 /* LXMAX */
166 movew #0x1df, 0xFFFFFa0a /* LYMAX */
167 moveb #0, 0xfffffa29 /* LBAR */
168 moveb #0, 0xfffffa25 /* LPXCD */
169 moveb #0x08, 0xFFFFFa20 /* LPICF */
170 moveb #0x01, 0xFFFFFA21 /* -ve pol */
171 moveb #0x81, 0xfffffA27 /* LCKCON */
172 movew #0xff00, 0xfffff412 /* LCD pins */
173#endif /* CONFIG_PILOT */
174#endif /* CONFIG_INIT_LCD */
175
176/*****************************************************************************
177 * Kernel is running from FLASH/ROM (XIP)
178 * Copy init text & data to RAM
179 *****************************************************************************/
180 moveal #_etext, %a0
181 moveal #_sdata, %a1
182 moveal #__bss_start, %a2
183_copy_initmem:
184 movel %a0@+, %a1@+
185 cmpal %a1, %a2
186 bhi _copy_initmem
187#endif /* CONFIG_ROMKERNEL */
188
189/*****************************************************************************
190 * Setup basic memory information for kernel
191 *****************************************************************************/
192 movel #CONFIG_VECTORBASE,_ramvec /* set vector base location */
193 movel #CONFIG_RAMBASE,_rambase /* set the base of RAM */
194 movel #RAMEND, _ramend /* set end ram addr */
195 lea __bss_stop,%a1
196 movel %a1,_ramstart
197
198/*****************************************************************************
199 * If the kernel is in RAM, move romfs to right above bss and
200 * adjust _ramstart to where romfs ends.
201 *
202 * (Do this only if CONFIG_MTD_UCLINUX is true)
203 *****************************************************************************/
204
205#if defined(CONFIG_ROMFS_FS) && defined(CONFIG_RAMKERNEL) && \
206 defined(CONFIG_MTD_UCLINUX)
207 lea __bss_start, %a0 /* get start of bss */
208 lea __bss_stop, %a1 /* set up destination */
209 movel %a0, %a2 /* copy of bss start */
210
211 movel 8(%a0), %d0 /* get size of ROMFS */
212 addql #8, %d0 /* allow for rounding */
213 andl #0xfffffffc, %d0 /* whole words */
214
215 addl %d0, %a0 /* copy from end */
216 addl %d0, %a1 /* copy from end */
217 movel %a1, _ramstart /* set start of ram */
218_copy_romfs:
219 movel -(%a0), -(%a1) /* copy dword */
220 cmpl %a0, %a2 /* check if at end */
221 bne _copy_romfs
222#endif /* CONFIG_ROMFS_FS && CONFIG_RAMKERNEL && CONFIG_MTD_UCLINUX */
223
224/*****************************************************************************
225 * Clear bss region
226 *****************************************************************************/
227 lea __bss_start, %a0 /* get start of bss */
228 lea __bss_stop, %a1 /* get end of bss */
229_clear_bss:
230 movel #0, (%a0)+ /* clear each word */
231 cmpl %a0, %a1 /* check if at end */
232 bne _clear_bss
233
234/*****************************************************************************
235 * Load the current task pointer and stack.
236 *****************************************************************************/
237 lea init_thread_union,%a0
238 lea THREAD_SIZE(%a0),%sp
239 jsr start_kernel /* start Linux kernel */
240_exit:
241 jmp _exit /* should never get here */