| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | /* | 
|  | 2 | * cs4265.h -- CS4265 ALSA SoC audio driver | 
|  | 3 | * | 
|  | 4 | * Copyright 2014 Cirrus Logic, Inc. | 
|  | 5 | * | 
|  | 6 | * Author: Paul Handrigan <paul.handrigan@cirrus.com> | 
|  | 7 | * | 
|  | 8 | * This program is free software; you can redistribute it and/or modify | 
|  | 9 | * it under the terms of the GNU General Public License version 2 as | 
|  | 10 | * published by the Free Software Foundation. | 
|  | 11 | * | 
|  | 12 | */ | 
|  | 13 |  | 
|  | 14 | #ifndef __CS4265_H__ | 
|  | 15 | #define __CS4265_H__ | 
|  | 16 |  | 
|  | 17 | #define CS4265_CHIP_ID				0x1 | 
|  | 18 | #define CS4265_CHIP_ID_VAL			0xD0 | 
|  | 19 | #define CS4265_CHIP_ID_MASK			0xF0 | 
|  | 20 | #define CS4265_REV_ID_MASK			0x0F | 
|  | 21 |  | 
|  | 22 | #define CS4265_PWRCTL				0x02 | 
|  | 23 | #define CS4265_PWRCTL_PDN			1 | 
|  | 24 |  | 
|  | 25 | #define CS4265_DAC_CTL				0x3 | 
|  | 26 | #define CS4265_DAC_CTL_MUTE			(1 << 2) | 
|  | 27 | #define CS4265_DAC_CTL_DIF			(3 << 4) | 
|  | 28 |  | 
|  | 29 | #define CS4265_ADC_CTL				0x4 | 
|  | 30 | #define CS4265_ADC_MASTER			1 | 
|  | 31 | #define CS4265_ADC_DIF				(1 << 4) | 
|  | 32 | #define CS4265_ADC_FM				(3 << 6) | 
|  | 33 |  | 
|  | 34 | #define CS4265_MCLK_FREQ			0x5 | 
|  | 35 | #define CS4265_MCLK_FREQ_MASK			(7 << 4) | 
|  | 36 |  | 
|  | 37 | #define CS4265_SIG_SEL				0x6 | 
|  | 38 | #define CS4265_SIG_SEL_LOOP			(1 << 1) | 
|  | 39 |  | 
|  | 40 | #define CS4265_CHB_PGA_CTL			0x7 | 
|  | 41 | #define CS4265_CHA_PGA_CTL			0x8 | 
|  | 42 |  | 
|  | 43 | #define CS4265_ADC_CTL2				0x9 | 
|  | 44 |  | 
|  | 45 | #define CS4265_DAC_CHA_VOL			0xA | 
|  | 46 | #define CS4265_DAC_CHB_VOL			0xB | 
|  | 47 |  | 
|  | 48 | #define CS4265_DAC_CTL2				0xC | 
|  | 49 |  | 
|  | 50 | #define CS4265_INT_STATUS			0xD | 
|  | 51 | #define CS4265_INT_MASK				0xE | 
|  | 52 | #define CS4265_STATUS_MODE_MSB			0xF | 
|  | 53 | #define CS4265_STATUS_MODE_LSB			0x10 | 
|  | 54 |  | 
|  | 55 | #define CS4265_SPDIF_CTL1			0x11 | 
|  | 56 |  | 
|  | 57 | #define CS4265_SPDIF_CTL2			0x12 | 
|  | 58 | #define CS4265_SPDIF_CTL2_MUTE			(1 << 4) | 
|  | 59 | #define CS4265_SPDIF_CTL2_DIF			(3 << 6) | 
|  | 60 |  | 
|  | 61 | #define CS4265_C_DATA_BUFF			0x13 | 
|  | 62 | #define CS4265_MAX_REGISTER			0x2A | 
|  | 63 |  | 
|  | 64 | #endif |