| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ | 
|  | 2 | /* | 
|  | 3 | * PowerPC Memory Protection Keys management | 
|  | 4 | * | 
|  | 5 | * Copyright 2017, Ram Pai, IBM Corporation. | 
|  | 6 | */ | 
|  | 7 |  | 
|  | 8 | #include <asm/mman.h> | 
|  | 9 | #include <asm/setup.h> | 
|  | 10 | #include <linux/pkeys.h> | 
|  | 11 | #include <linux/of_device.h> | 
|  | 12 |  | 
|  | 13 | DEFINE_STATIC_KEY_TRUE(pkey_disabled); | 
|  | 14 | bool pkey_execute_disable_supported; | 
|  | 15 | int  pkeys_total;		/* Total pkeys as per device tree */ | 
|  | 16 | bool pkeys_devtree_defined;	/* pkey property exported by device tree */ | 
|  | 17 | u32  initial_allocation_mask;   /* Bits set for the initially allocated keys */ | 
|  | 18 | u32  reserved_allocation_mask;  /* Bits set for reserved keys */ | 
|  | 19 | u64  pkey_amr_mask;		/* Bits in AMR not to be touched */ | 
|  | 20 | u64  pkey_iamr_mask;		/* Bits in AMR not to be touched */ | 
|  | 21 | u64  pkey_uamor_mask;		/* Bits in UMOR not to be touched */ | 
|  | 22 | int  execute_only_key = 2; | 
|  | 23 |  | 
|  | 24 | #define AMR_BITS_PER_PKEY 2 | 
|  | 25 | #define AMR_RD_BIT 0x1UL | 
|  | 26 | #define AMR_WR_BIT 0x2UL | 
|  | 27 | #define IAMR_EX_BIT 0x1UL | 
|  | 28 | #define PKEY_REG_BITS (sizeof(u64)*8) | 
|  | 29 | #define pkeyshift(pkey) (PKEY_REG_BITS - ((pkey+1) * AMR_BITS_PER_PKEY)) | 
|  | 30 |  | 
|  | 31 | static void scan_pkey_feature(void) | 
|  | 32 | { | 
|  | 33 | u32 vals[2]; | 
|  | 34 | struct device_node *cpu; | 
|  | 35 |  | 
|  | 36 | cpu = of_find_node_by_type(NULL, "cpu"); | 
|  | 37 | if (!cpu) | 
|  | 38 | return; | 
|  | 39 |  | 
|  | 40 | if (of_property_read_u32_array(cpu, | 
|  | 41 | "ibm,processor-storage-keys", vals, 2)) | 
|  | 42 | return; | 
|  | 43 |  | 
|  | 44 | /* | 
|  | 45 | * Since any pkey can be used for data or execute, we will just treat | 
|  | 46 | * all keys as equal and track them as one entity. | 
|  | 47 | */ | 
|  | 48 | pkeys_total = vals[0]; | 
|  | 49 | pkeys_devtree_defined = true; | 
|  | 50 | } | 
|  | 51 |  | 
|  | 52 | static inline bool pkey_mmu_enabled(void) | 
|  | 53 | { | 
|  | 54 | if (firmware_has_feature(FW_FEATURE_LPAR)) | 
|  | 55 | return pkeys_total; | 
|  | 56 | else | 
|  | 57 | return cpu_has_feature(CPU_FTR_PKEY); | 
|  | 58 | } | 
|  | 59 |  | 
|  | 60 | int pkey_initialize(void) | 
|  | 61 | { | 
|  | 62 | int os_reserved, i; | 
|  | 63 |  | 
|  | 64 | /* | 
|  | 65 | * We define PKEY_DISABLE_EXECUTE in addition to the arch-neutral | 
|  | 66 | * generic defines for PKEY_DISABLE_ACCESS and PKEY_DISABLE_WRITE. | 
|  | 67 | * Ensure that the bits a distinct. | 
|  | 68 | */ | 
|  | 69 | BUILD_BUG_ON(PKEY_DISABLE_EXECUTE & | 
|  | 70 | (PKEY_DISABLE_ACCESS | PKEY_DISABLE_WRITE)); | 
|  | 71 |  | 
|  | 72 | /* | 
|  | 73 | * pkey_to_vmflag_bits() assumes that the pkey bits are contiguous | 
|  | 74 | * in the vmaflag. Make sure that is really the case. | 
|  | 75 | */ | 
|  | 76 | BUILD_BUG_ON(__builtin_clzl(ARCH_VM_PKEY_FLAGS >> VM_PKEY_SHIFT) + | 
|  | 77 | __builtin_popcountl(ARCH_VM_PKEY_FLAGS >> VM_PKEY_SHIFT) | 
|  | 78 | != (sizeof(u64) * BITS_PER_BYTE)); | 
|  | 79 |  | 
|  | 80 | /* scan the device tree for pkey feature */ | 
|  | 81 | scan_pkey_feature(); | 
|  | 82 |  | 
|  | 83 | /* | 
|  | 84 | * Let's assume 32 pkeys on P8 bare metal, if its not defined by device | 
|  | 85 | * tree. We make this exception since skiboot forgot to expose this | 
|  | 86 | * property on power8. | 
|  | 87 | */ | 
|  | 88 | if (!pkeys_devtree_defined && !firmware_has_feature(FW_FEATURE_LPAR) && | 
|  | 89 | cpu_has_feature(CPU_FTRS_POWER8)) | 
|  | 90 | pkeys_total = 32; | 
|  | 91 |  | 
|  | 92 | /* | 
|  | 93 | * Adjust the upper limit, based on the number of bits supported by | 
|  | 94 | * arch-neutral code. | 
|  | 95 | */ | 
|  | 96 | pkeys_total = min_t(int, pkeys_total, | 
|  | 97 | ((ARCH_VM_PKEY_FLAGS >> VM_PKEY_SHIFT)+1)); | 
|  | 98 |  | 
|  | 99 | if (!pkey_mmu_enabled() || radix_enabled() || !pkeys_total) | 
|  | 100 | static_branch_enable(&pkey_disabled); | 
|  | 101 | else | 
|  | 102 | static_branch_disable(&pkey_disabled); | 
|  | 103 |  | 
|  | 104 | if (static_branch_likely(&pkey_disabled)) | 
|  | 105 | return 0; | 
|  | 106 |  | 
|  | 107 | /* | 
|  | 108 | * The device tree cannot be relied to indicate support for | 
|  | 109 | * execute_disable support. Instead we use a PVR check. | 
|  | 110 | */ | 
|  | 111 | if (pvr_version_is(PVR_POWER7) || pvr_version_is(PVR_POWER7p)) | 
|  | 112 | pkey_execute_disable_supported = false; | 
|  | 113 | else | 
|  | 114 | pkey_execute_disable_supported = true; | 
|  | 115 |  | 
|  | 116 | #ifdef CONFIG_PPC_4K_PAGES | 
|  | 117 | /* | 
|  | 118 | * The OS can manage only 8 pkeys due to its inability to represent them | 
|  | 119 | * in the Linux 4K PTE. | 
|  | 120 | */ | 
|  | 121 | os_reserved = pkeys_total - 8; | 
|  | 122 | #else | 
|  | 123 | os_reserved = 0; | 
|  | 124 | #endif | 
|  | 125 | /* Bits are in LE format. */ | 
|  | 126 | reserved_allocation_mask = (0x1 << 1) | (0x1 << execute_only_key); | 
|  | 127 |  | 
|  | 128 | /* register mask is in BE format */ | 
|  | 129 | pkey_amr_mask = ~0x0ul; | 
|  | 130 | pkey_amr_mask &= ~(0x3ul << pkeyshift(0)); | 
|  | 131 |  | 
|  | 132 | pkey_iamr_mask = ~0x0ul; | 
|  | 133 | pkey_iamr_mask &= ~(0x3ul << pkeyshift(0)); | 
|  | 134 | pkey_iamr_mask &= ~(0x3ul << pkeyshift(execute_only_key)); | 
|  | 135 |  | 
|  | 136 | pkey_uamor_mask = ~0x0ul; | 
|  | 137 | pkey_uamor_mask &= ~(0x3ul << pkeyshift(0)); | 
|  | 138 | pkey_uamor_mask &= ~(0x3ul << pkeyshift(execute_only_key)); | 
|  | 139 |  | 
|  | 140 | /* mark the rest of the keys as reserved and hence unavailable */ | 
|  | 141 | for (i = (pkeys_total - os_reserved); i < pkeys_total; i++) { | 
|  | 142 | reserved_allocation_mask |= (0x1 << i); | 
|  | 143 | pkey_uamor_mask &= ~(0x3ul << pkeyshift(i)); | 
|  | 144 | } | 
|  | 145 | initial_allocation_mask = reserved_allocation_mask | (0x1 << 0); | 
|  | 146 |  | 
|  | 147 | if (unlikely((pkeys_total - os_reserved) <= execute_only_key)) { | 
|  | 148 | /* | 
|  | 149 | * Insufficient number of keys to support | 
|  | 150 | * execute only key. Mark it unavailable. | 
|  | 151 | * Any AMR, UAMOR, IAMR bit set for | 
|  | 152 | * this key is irrelevant since this key | 
|  | 153 | * can never be allocated. | 
|  | 154 | */ | 
|  | 155 | execute_only_key = -1; | 
|  | 156 | } | 
|  | 157 |  | 
|  | 158 | return 0; | 
|  | 159 | } | 
|  | 160 |  | 
|  | 161 | arch_initcall(pkey_initialize); | 
|  | 162 |  | 
|  | 163 | void pkey_mm_init(struct mm_struct *mm) | 
|  | 164 | { | 
|  | 165 | if (static_branch_likely(&pkey_disabled)) | 
|  | 166 | return; | 
|  | 167 | mm_pkey_allocation_map(mm) = initial_allocation_mask; | 
|  | 168 | mm->context.execute_only_pkey = execute_only_key; | 
|  | 169 | } | 
|  | 170 |  | 
|  | 171 | static inline u64 read_amr(void) | 
|  | 172 | { | 
|  | 173 | return mfspr(SPRN_AMR); | 
|  | 174 | } | 
|  | 175 |  | 
|  | 176 | static inline void write_amr(u64 value) | 
|  | 177 | { | 
|  | 178 | mtspr(SPRN_AMR, value); | 
|  | 179 | } | 
|  | 180 |  | 
|  | 181 | static inline u64 read_iamr(void) | 
|  | 182 | { | 
|  | 183 | if (!likely(pkey_execute_disable_supported)) | 
|  | 184 | return 0x0UL; | 
|  | 185 |  | 
|  | 186 | return mfspr(SPRN_IAMR); | 
|  | 187 | } | 
|  | 188 |  | 
|  | 189 | static inline void write_iamr(u64 value) | 
|  | 190 | { | 
|  | 191 | if (!likely(pkey_execute_disable_supported)) | 
|  | 192 | return; | 
|  | 193 |  | 
|  | 194 | mtspr(SPRN_IAMR, value); | 
|  | 195 | } | 
|  | 196 |  | 
|  | 197 | static inline u64 read_uamor(void) | 
|  | 198 | { | 
|  | 199 | return mfspr(SPRN_UAMOR); | 
|  | 200 | } | 
|  | 201 |  | 
|  | 202 | static inline void write_uamor(u64 value) | 
|  | 203 | { | 
|  | 204 | mtspr(SPRN_UAMOR, value); | 
|  | 205 | } | 
|  | 206 |  | 
|  | 207 | static bool is_pkey_enabled(int pkey) | 
|  | 208 | { | 
|  | 209 | u64 uamor = read_uamor(); | 
|  | 210 | u64 pkey_bits = 0x3ul << pkeyshift(pkey); | 
|  | 211 | u64 uamor_pkey_bits = (uamor & pkey_bits); | 
|  | 212 |  | 
|  | 213 | /* | 
|  | 214 | * Both the bits in UAMOR corresponding to the key should be set or | 
|  | 215 | * reset. | 
|  | 216 | */ | 
|  | 217 | WARN_ON(uamor_pkey_bits && (uamor_pkey_bits != pkey_bits)); | 
|  | 218 | return !!(uamor_pkey_bits); | 
|  | 219 | } | 
|  | 220 |  | 
|  | 221 | static inline void init_amr(int pkey, u8 init_bits) | 
|  | 222 | { | 
|  | 223 | u64 new_amr_bits = (((u64)init_bits & 0x3UL) << pkeyshift(pkey)); | 
|  | 224 | u64 old_amr = read_amr() & ~((u64)(0x3ul) << pkeyshift(pkey)); | 
|  | 225 |  | 
|  | 226 | write_amr(old_amr | new_amr_bits); | 
|  | 227 | } | 
|  | 228 |  | 
|  | 229 | static inline void init_iamr(int pkey, u8 init_bits) | 
|  | 230 | { | 
|  | 231 | u64 new_iamr_bits = (((u64)init_bits & 0x1UL) << pkeyshift(pkey)); | 
|  | 232 | u64 old_iamr = read_iamr() & ~((u64)(0x1ul) << pkeyshift(pkey)); | 
|  | 233 |  | 
|  | 234 | write_iamr(old_iamr | new_iamr_bits); | 
|  | 235 | } | 
|  | 236 |  | 
|  | 237 | /* | 
|  | 238 | * Set the access rights in AMR IAMR and UAMOR registers for @pkey to that | 
|  | 239 | * specified in @init_val. | 
|  | 240 | */ | 
|  | 241 | int __arch_set_user_pkey_access(struct task_struct *tsk, int pkey, | 
|  | 242 | unsigned long init_val) | 
|  | 243 | { | 
|  | 244 | u64 new_amr_bits = 0x0ul; | 
|  | 245 | u64 new_iamr_bits = 0x0ul; | 
|  | 246 |  | 
|  | 247 | if (!is_pkey_enabled(pkey)) | 
|  | 248 | return -EINVAL; | 
|  | 249 |  | 
|  | 250 | if (init_val & PKEY_DISABLE_EXECUTE) { | 
|  | 251 | if (!pkey_execute_disable_supported) | 
|  | 252 | return -EINVAL; | 
|  | 253 | new_iamr_bits |= IAMR_EX_BIT; | 
|  | 254 | } | 
|  | 255 | init_iamr(pkey, new_iamr_bits); | 
|  | 256 |  | 
|  | 257 | /* Set the bits we need in AMR: */ | 
|  | 258 | if (init_val & PKEY_DISABLE_ACCESS) | 
|  | 259 | new_amr_bits |= AMR_RD_BIT | AMR_WR_BIT; | 
|  | 260 | else if (init_val & PKEY_DISABLE_WRITE) | 
|  | 261 | new_amr_bits |= AMR_WR_BIT; | 
|  | 262 |  | 
|  | 263 | init_amr(pkey, new_amr_bits); | 
|  | 264 | return 0; | 
|  | 265 | } | 
|  | 266 |  | 
|  | 267 | void thread_pkey_regs_save(struct thread_struct *thread) | 
|  | 268 | { | 
|  | 269 | if (static_branch_likely(&pkey_disabled)) | 
|  | 270 | return; | 
|  | 271 |  | 
|  | 272 | /* | 
|  | 273 | * TODO: Skip saving registers if @thread hasn't used any keys yet. | 
|  | 274 | */ | 
|  | 275 | thread->amr = read_amr(); | 
|  | 276 | thread->iamr = read_iamr(); | 
|  | 277 | thread->uamor = read_uamor(); | 
|  | 278 | } | 
|  | 279 |  | 
|  | 280 | void thread_pkey_regs_restore(struct thread_struct *new_thread, | 
|  | 281 | struct thread_struct *old_thread) | 
|  | 282 | { | 
|  | 283 | if (static_branch_likely(&pkey_disabled)) | 
|  | 284 | return; | 
|  | 285 |  | 
|  | 286 | if (old_thread->amr != new_thread->amr) | 
|  | 287 | write_amr(new_thread->amr); | 
|  | 288 | if (old_thread->iamr != new_thread->iamr) | 
|  | 289 | write_iamr(new_thread->iamr); | 
|  | 290 | if (old_thread->uamor != new_thread->uamor) | 
|  | 291 | write_uamor(new_thread->uamor); | 
|  | 292 | } | 
|  | 293 |  | 
|  | 294 | void thread_pkey_regs_init(struct thread_struct *thread) | 
|  | 295 | { | 
|  | 296 | if (static_branch_likely(&pkey_disabled)) | 
|  | 297 | return; | 
|  | 298 |  | 
|  | 299 | thread->amr = pkey_amr_mask; | 
|  | 300 | thread->iamr = pkey_iamr_mask; | 
|  | 301 | thread->uamor = pkey_uamor_mask; | 
|  | 302 |  | 
|  | 303 | write_uamor(pkey_uamor_mask); | 
|  | 304 | write_amr(pkey_amr_mask); | 
|  | 305 | write_iamr(pkey_iamr_mask); | 
|  | 306 | } | 
|  | 307 |  | 
|  | 308 | static inline bool pkey_allows_readwrite(int pkey) | 
|  | 309 | { | 
|  | 310 | int pkey_shift = pkeyshift(pkey); | 
|  | 311 |  | 
|  | 312 | if (!is_pkey_enabled(pkey)) | 
|  | 313 | return true; | 
|  | 314 |  | 
|  | 315 | return !(read_amr() & ((AMR_RD_BIT|AMR_WR_BIT) << pkey_shift)); | 
|  | 316 | } | 
|  | 317 |  | 
|  | 318 | int __execute_only_pkey(struct mm_struct *mm) | 
|  | 319 | { | 
|  | 320 | return mm->context.execute_only_pkey; | 
|  | 321 | } | 
|  | 322 |  | 
|  | 323 | static inline bool vma_is_pkey_exec_only(struct vm_area_struct *vma) | 
|  | 324 | { | 
|  | 325 | /* Do this check first since the vm_flags should be hot */ | 
|  | 326 | if ((vma->vm_flags & (VM_READ | VM_WRITE | VM_EXEC)) != VM_EXEC) | 
|  | 327 | return false; | 
|  | 328 |  | 
|  | 329 | return (vma_pkey(vma) == vma->vm_mm->context.execute_only_pkey); | 
|  | 330 | } | 
|  | 331 |  | 
|  | 332 | /* | 
|  | 333 | * This should only be called for *plain* mprotect calls. | 
|  | 334 | */ | 
|  | 335 | int __arch_override_mprotect_pkey(struct vm_area_struct *vma, int prot, | 
|  | 336 | int pkey) | 
|  | 337 | { | 
|  | 338 | /* | 
|  | 339 | * If the currently associated pkey is execute-only, but the requested | 
|  | 340 | * protection is not execute-only, move it back to the default pkey. | 
|  | 341 | */ | 
|  | 342 | if (vma_is_pkey_exec_only(vma) && (prot != PROT_EXEC)) | 
|  | 343 | return 0; | 
|  | 344 |  | 
|  | 345 | /* | 
|  | 346 | * The requested protection is execute-only. Hence let's use an | 
|  | 347 | * execute-only pkey. | 
|  | 348 | */ | 
|  | 349 | if (prot == PROT_EXEC) { | 
|  | 350 | pkey = execute_only_pkey(vma->vm_mm); | 
|  | 351 | if (pkey > 0) | 
|  | 352 | return pkey; | 
|  | 353 | } | 
|  | 354 |  | 
|  | 355 | /* Nothing to override. */ | 
|  | 356 | return vma_pkey(vma); | 
|  | 357 | } | 
|  | 358 |  | 
|  | 359 | static bool pkey_access_permitted(int pkey, bool write, bool execute) | 
|  | 360 | { | 
|  | 361 | int pkey_shift; | 
|  | 362 | u64 amr; | 
|  | 363 |  | 
|  | 364 | if (!is_pkey_enabled(pkey)) | 
|  | 365 | return true; | 
|  | 366 |  | 
|  | 367 | pkey_shift = pkeyshift(pkey); | 
|  | 368 | if (execute && !(read_iamr() & (IAMR_EX_BIT << pkey_shift))) | 
|  | 369 | return true; | 
|  | 370 |  | 
|  | 371 | amr = read_amr(); /* Delay reading amr until absolutely needed */ | 
|  | 372 | return ((!write && !(amr & (AMR_RD_BIT << pkey_shift))) || | 
|  | 373 | (write &&  !(amr & (AMR_WR_BIT << pkey_shift)))); | 
|  | 374 | } | 
|  | 375 |  | 
|  | 376 | bool arch_pte_access_permitted(u64 pte, bool write, bool execute) | 
|  | 377 | { | 
|  | 378 | if (static_branch_likely(&pkey_disabled)) | 
|  | 379 | return true; | 
|  | 380 |  | 
|  | 381 | return pkey_access_permitted(pte_to_pkey_bits(pte), write, execute); | 
|  | 382 | } | 
|  | 383 |  | 
|  | 384 | /* | 
|  | 385 | * We only want to enforce protection keys on the current thread because we | 
|  | 386 | * effectively have no access to AMR/IAMR for other threads or any way to tell | 
|  | 387 | * which AMR/IAMR in a threaded process we could use. | 
|  | 388 | * | 
|  | 389 | * So do not enforce things if the VMA is not from the current mm, or if we are | 
|  | 390 | * in a kernel thread. | 
|  | 391 | */ | 
|  | 392 | static inline bool vma_is_foreign(struct vm_area_struct *vma) | 
|  | 393 | { | 
|  | 394 | if (!current->mm) | 
|  | 395 | return true; | 
|  | 396 |  | 
|  | 397 | /* if it is not our ->mm, it has to be foreign */ | 
|  | 398 | if (current->mm != vma->vm_mm) | 
|  | 399 | return true; | 
|  | 400 |  | 
|  | 401 | return false; | 
|  | 402 | } | 
|  | 403 |  | 
|  | 404 | bool arch_vma_access_permitted(struct vm_area_struct *vma, bool write, | 
|  | 405 | bool execute, bool foreign) | 
|  | 406 | { | 
|  | 407 | if (static_branch_likely(&pkey_disabled)) | 
|  | 408 | return true; | 
|  | 409 | /* | 
|  | 410 | * Do not enforce our key-permissions on a foreign vma. | 
|  | 411 | */ | 
|  | 412 | if (foreign || vma_is_foreign(vma)) | 
|  | 413 | return true; | 
|  | 414 |  | 
|  | 415 | return pkey_access_permitted(vma_pkey(vma), write, execute); | 
|  | 416 | } | 
|  | 417 |  | 
|  | 418 | void arch_dup_pkeys(struct mm_struct *oldmm, struct mm_struct *mm) | 
|  | 419 | { | 
|  | 420 | if (static_branch_likely(&pkey_disabled)) | 
|  | 421 | return; | 
|  | 422 |  | 
|  | 423 | /* Duplicate the oldmm pkey state in mm: */ | 
|  | 424 | mm_pkey_allocation_map(mm) = mm_pkey_allocation_map(oldmm); | 
|  | 425 | mm->context.execute_only_pkey = oldmm->context.execute_only_pkey; | 
|  | 426 | } |