| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | /* | 
 | 2 |  * Renesas R-Car Gen3 for USB2.0 PHY driver | 
 | 3 |  * | 
 | 4 |  * Copyright (C) 2015-2017 Renesas Electronics Corporation | 
 | 5 |  * | 
 | 6 |  * This is based on the phy-rcar-gen2 driver: | 
 | 7 |  * Copyright (C) 2014 Renesas Solutions Corp. | 
 | 8 |  * Copyright (C) 2014 Cogent Embedded, Inc. | 
 | 9 |  * | 
 | 10 |  * This program is free software; you can redistribute it and/or modify | 
 | 11 |  * it under the terms of the GNU General Public License version 2 as | 
 | 12 |  * published by the Free Software Foundation. | 
 | 13 |  */ | 
 | 14 |  | 
 | 15 | #include <linux/extcon-provider.h> | 
 | 16 | #include <linux/interrupt.h> | 
 | 17 | #include <linux/io.h> | 
 | 18 | #include <linux/module.h> | 
 | 19 | #include <linux/of.h> | 
 | 20 | #include <linux/of_address.h> | 
 | 21 | #include <linux/of_device.h> | 
 | 22 | #include <linux/phy/phy.h> | 
 | 23 | #include <linux/platform_device.h> | 
 | 24 | #include <linux/pm_runtime.h> | 
 | 25 | #include <linux/regulator/consumer.h> | 
 | 26 | #include <linux/string.h> | 
 | 27 | #include <linux/usb/of.h> | 
 | 28 | #include <linux/workqueue.h> | 
 | 29 |  | 
 | 30 | /******* USB2.0 Host registers (original offset is +0x200) *******/ | 
 | 31 | #define USB2_INT_ENABLE		0x000 | 
 | 32 | #define USB2_USBCTR		0x00c | 
 | 33 | #define USB2_SPD_RSM_TIMSET	0x10c | 
 | 34 | #define USB2_OC_TIMSET		0x110 | 
 | 35 | #define USB2_COMMCTRL		0x600 | 
 | 36 | #define USB2_OBINTSTA		0x604 | 
 | 37 | #define USB2_OBINTEN		0x608 | 
 | 38 | #define USB2_VBCTRL		0x60c | 
 | 39 | #define USB2_LINECTRL1		0x610 | 
 | 40 | #define USB2_ADPCTRL		0x630 | 
 | 41 |  | 
 | 42 | /* INT_ENABLE */ | 
 | 43 | #define USB2_INT_ENABLE_UCOM_INTEN	BIT(3) | 
 | 44 | #define USB2_INT_ENABLE_USBH_INTB_EN	BIT(2) | 
 | 45 | #define USB2_INT_ENABLE_USBH_INTA_EN	BIT(1) | 
 | 46 | #define USB2_INT_ENABLE_INIT		(USB2_INT_ENABLE_UCOM_INTEN | \ | 
 | 47 | 					 USB2_INT_ENABLE_USBH_INTB_EN | \ | 
 | 48 | 					 USB2_INT_ENABLE_USBH_INTA_EN) | 
 | 49 |  | 
 | 50 | /* USBCTR */ | 
 | 51 | #define USB2_USBCTR_DIRPD	BIT(2) | 
 | 52 | #define USB2_USBCTR_PLL_RST	BIT(1) | 
 | 53 |  | 
 | 54 | /* SPD_RSM_TIMSET */ | 
 | 55 | #define USB2_SPD_RSM_TIMSET_INIT	0x014e029b | 
 | 56 |  | 
 | 57 | /* OC_TIMSET */ | 
 | 58 | #define USB2_OC_TIMSET_INIT		0x000209ab | 
 | 59 |  | 
 | 60 | /* COMMCTRL */ | 
 | 61 | #define USB2_COMMCTRL_OTG_PERI		BIT(31)	/* 1 = Peripheral mode */ | 
 | 62 |  | 
 | 63 | /* OBINTSTA and OBINTEN */ | 
 | 64 | #define USB2_OBINT_SESSVLDCHG		BIT(12) | 
 | 65 | #define USB2_OBINT_IDDIGCHG		BIT(11) | 
 | 66 | #define USB2_OBINT_BITS			(USB2_OBINT_SESSVLDCHG | \ | 
 | 67 | 					 USB2_OBINT_IDDIGCHG) | 
 | 68 |  | 
 | 69 | /* VBCTRL */ | 
 | 70 | #define USB2_VBCTRL_OCCLREN		BIT(16) | 
 | 71 | #define USB2_VBCTRL_DRVVBUSSEL		BIT(8) | 
 | 72 |  | 
 | 73 | /* LINECTRL1 */ | 
 | 74 | #define USB2_LINECTRL1_DPRPD_EN		BIT(19) | 
 | 75 | #define USB2_LINECTRL1_DP_RPD		BIT(18) | 
 | 76 | #define USB2_LINECTRL1_DMRPD_EN		BIT(17) | 
 | 77 | #define USB2_LINECTRL1_DM_RPD		BIT(16) | 
 | 78 | #define USB2_LINECTRL1_OPMODE_NODRV	BIT(6) | 
 | 79 |  | 
 | 80 | /* ADPCTRL */ | 
 | 81 | #define USB2_ADPCTRL_OTGSESSVLD		BIT(20) | 
 | 82 | #define USB2_ADPCTRL_IDDIG		BIT(19) | 
 | 83 | #define USB2_ADPCTRL_IDPULLUP		BIT(5)	/* 1 = ID sampling is enabled */ | 
 | 84 | #define USB2_ADPCTRL_DRVVBUS		BIT(4) | 
 | 85 |  | 
 | 86 | #define RCAR_GEN3_PHY_HAS_DEDICATED_PINS	1 | 
 | 87 |  | 
 | 88 | struct rcar_gen3_chan { | 
 | 89 | 	void __iomem *base; | 
 | 90 | 	struct extcon_dev *extcon; | 
 | 91 | 	struct phy *phy; | 
 | 92 | 	struct regulator *vbus; | 
 | 93 | 	struct work_struct work; | 
 | 94 | 	bool extcon_host; | 
 | 95 | 	bool has_otg_pins; | 
 | 96 | }; | 
 | 97 |  | 
 | 98 | static void rcar_gen3_phy_usb2_work(struct work_struct *work) | 
 | 99 | { | 
 | 100 | 	struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan, | 
 | 101 | 						 work); | 
 | 102 |  | 
 | 103 | 	if (ch->extcon_host) { | 
 | 104 | 		extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true); | 
 | 105 | 		extcon_set_state_sync(ch->extcon, EXTCON_USB, false); | 
 | 106 | 	} else { | 
 | 107 | 		extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false); | 
 | 108 | 		extcon_set_state_sync(ch->extcon, EXTCON_USB, true); | 
 | 109 | 	} | 
 | 110 | } | 
 | 111 |  | 
 | 112 | static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host) | 
 | 113 | { | 
 | 114 | 	void __iomem *usb2_base = ch->base; | 
 | 115 | 	u32 val = readl(usb2_base + USB2_COMMCTRL); | 
 | 116 |  | 
 | 117 | 	dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, host); | 
 | 118 | 	if (host) | 
 | 119 | 		val &= ~USB2_COMMCTRL_OTG_PERI; | 
 | 120 | 	else | 
 | 121 | 		val |= USB2_COMMCTRL_OTG_PERI; | 
 | 122 | 	writel(val, usb2_base + USB2_COMMCTRL); | 
 | 123 | } | 
 | 124 |  | 
 | 125 | static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm) | 
 | 126 | { | 
 | 127 | 	void __iomem *usb2_base = ch->base; | 
 | 128 | 	u32 val = readl(usb2_base + USB2_LINECTRL1); | 
 | 129 |  | 
 | 130 | 	dev_vdbg(&ch->phy->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm); | 
 | 131 | 	val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD); | 
 | 132 | 	if (dp) | 
 | 133 | 		val |= USB2_LINECTRL1_DP_RPD; | 
 | 134 | 	if (dm) | 
 | 135 | 		val |= USB2_LINECTRL1_DM_RPD; | 
 | 136 | 	writel(val, usb2_base + USB2_LINECTRL1); | 
 | 137 | } | 
 | 138 |  | 
 | 139 | static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus) | 
 | 140 | { | 
 | 141 | 	void __iomem *usb2_base = ch->base; | 
 | 142 | 	u32 val = readl(usb2_base + USB2_ADPCTRL); | 
 | 143 |  | 
 | 144 | 	dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, vbus); | 
 | 145 | 	if (vbus) | 
 | 146 | 		val |= USB2_ADPCTRL_DRVVBUS; | 
 | 147 | 	else | 
 | 148 | 		val &= ~USB2_ADPCTRL_DRVVBUS; | 
 | 149 | 	writel(val, usb2_base + USB2_ADPCTRL); | 
 | 150 | } | 
 | 151 |  | 
 | 152 | static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch) | 
 | 153 | { | 
 | 154 | 	rcar_gen3_set_linectrl(ch, 1, 1); | 
 | 155 | 	rcar_gen3_set_host_mode(ch, 1); | 
 | 156 | 	rcar_gen3_enable_vbus_ctrl(ch, 1); | 
 | 157 |  | 
 | 158 | 	ch->extcon_host = true; | 
 | 159 | 	schedule_work(&ch->work); | 
 | 160 | } | 
 | 161 |  | 
 | 162 | static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch) | 
 | 163 | { | 
 | 164 | 	rcar_gen3_set_linectrl(ch, 0, 1); | 
 | 165 | 	rcar_gen3_set_host_mode(ch, 0); | 
 | 166 | 	rcar_gen3_enable_vbus_ctrl(ch, 0); | 
 | 167 |  | 
 | 168 | 	ch->extcon_host = false; | 
 | 169 | 	schedule_work(&ch->work); | 
 | 170 | } | 
 | 171 |  | 
 | 172 | static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch) | 
 | 173 | { | 
 | 174 | 	void __iomem *usb2_base = ch->base; | 
 | 175 | 	u32 val; | 
 | 176 |  | 
 | 177 | 	val = readl(usb2_base + USB2_LINECTRL1); | 
 | 178 | 	writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1); | 
 | 179 |  | 
 | 180 | 	rcar_gen3_set_linectrl(ch, 1, 1); | 
 | 181 | 	rcar_gen3_set_host_mode(ch, 1); | 
 | 182 | 	rcar_gen3_enable_vbus_ctrl(ch, 0); | 
 | 183 |  | 
 | 184 | 	val = readl(usb2_base + USB2_LINECTRL1); | 
 | 185 | 	writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1); | 
 | 186 | } | 
 | 187 |  | 
 | 188 | static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch) | 
 | 189 | { | 
 | 190 | 	rcar_gen3_set_linectrl(ch, 0, 1); | 
 | 191 | 	rcar_gen3_set_host_mode(ch, 0); | 
 | 192 | 	rcar_gen3_enable_vbus_ctrl(ch, 1); | 
 | 193 | } | 
 | 194 |  | 
 | 195 | static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch) | 
 | 196 | { | 
 | 197 | 	void __iomem *usb2_base = ch->base; | 
 | 198 | 	u32 val; | 
 | 199 |  | 
 | 200 | 	val = readl(usb2_base + USB2_OBINTEN); | 
 | 201 | 	writel(val & ~USB2_OBINT_BITS, usb2_base + USB2_OBINTEN); | 
 | 202 |  | 
 | 203 | 	rcar_gen3_enable_vbus_ctrl(ch, 1); | 
 | 204 | 	rcar_gen3_init_for_host(ch); | 
 | 205 |  | 
 | 206 | 	writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN); | 
 | 207 | } | 
 | 208 |  | 
 | 209 | static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch) | 
 | 210 | { | 
 | 211 | 	return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG); | 
 | 212 | } | 
 | 213 |  | 
 | 214 | static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch) | 
 | 215 | { | 
 | 216 | 	if (!rcar_gen3_check_id(ch)) | 
 | 217 | 		rcar_gen3_init_for_host(ch); | 
 | 218 | 	else | 
 | 219 | 		rcar_gen3_init_for_peri(ch); | 
 | 220 | } | 
 | 221 |  | 
 | 222 | static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch) | 
 | 223 | { | 
 | 224 | 	return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI); | 
 | 225 | } | 
 | 226 |  | 
 | 227 | static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch) | 
 | 228 | { | 
 | 229 | 	if (rcar_gen3_is_host(ch)) | 
 | 230 | 		return PHY_MODE_USB_HOST; | 
 | 231 |  | 
 | 232 | 	return PHY_MODE_USB_DEVICE; | 
 | 233 | } | 
 | 234 |  | 
 | 235 | static ssize_t role_store(struct device *dev, struct device_attribute *attr, | 
 | 236 | 			  const char *buf, size_t count) | 
 | 237 | { | 
 | 238 | 	struct rcar_gen3_chan *ch = dev_get_drvdata(dev); | 
 | 239 | 	bool is_b_device; | 
 | 240 | 	enum phy_mode cur_mode, new_mode; | 
 | 241 |  | 
 | 242 | 	if (!ch->has_otg_pins || !ch->phy->init_count) | 
 | 243 | 		return -EIO; | 
 | 244 |  | 
 | 245 | 	if (sysfs_streq(buf, "host")) | 
 | 246 | 		new_mode = PHY_MODE_USB_HOST; | 
 | 247 | 	else if (sysfs_streq(buf, "peripheral")) | 
 | 248 | 		new_mode = PHY_MODE_USB_DEVICE; | 
 | 249 | 	else | 
 | 250 | 		return -EINVAL; | 
 | 251 |  | 
 | 252 | 	/* is_b_device: true is B-Device. false is A-Device. */ | 
 | 253 | 	is_b_device = rcar_gen3_check_id(ch); | 
 | 254 | 	cur_mode = rcar_gen3_get_phy_mode(ch); | 
 | 255 |  | 
 | 256 | 	/* If current and new mode is the same, this returns the error */ | 
 | 257 | 	if (cur_mode == new_mode) | 
 | 258 | 		return -EINVAL; | 
 | 259 |  | 
 | 260 | 	if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */ | 
 | 261 | 		if (!is_b_device)	/* A-Peripheral */ | 
 | 262 | 			rcar_gen3_init_from_a_peri_to_a_host(ch); | 
 | 263 | 		else			/* B-Peripheral */ | 
 | 264 | 			rcar_gen3_init_for_b_host(ch); | 
 | 265 | 	} else {			/* And is_host must be true */ | 
 | 266 | 		if (!is_b_device)	/* A-Host */ | 
 | 267 | 			rcar_gen3_init_for_a_peri(ch); | 
 | 268 | 		else			/* B-Host */ | 
 | 269 | 			rcar_gen3_init_for_peri(ch); | 
 | 270 | 	} | 
 | 271 |  | 
 | 272 | 	return count; | 
 | 273 | } | 
 | 274 |  | 
 | 275 | static ssize_t role_show(struct device *dev, struct device_attribute *attr, | 
 | 276 | 			 char *buf) | 
 | 277 | { | 
 | 278 | 	struct rcar_gen3_chan *ch = dev_get_drvdata(dev); | 
 | 279 |  | 
 | 280 | 	if (!ch->has_otg_pins || !ch->phy->init_count) | 
 | 281 | 		return -EIO; | 
 | 282 |  | 
 | 283 | 	return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" : | 
 | 284 | 							    "peripheral"); | 
 | 285 | } | 
 | 286 | static DEVICE_ATTR_RW(role); | 
 | 287 |  | 
 | 288 | static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch) | 
 | 289 | { | 
 | 290 | 	void __iomem *usb2_base = ch->base; | 
 | 291 | 	u32 val; | 
 | 292 |  | 
 | 293 | 	val = readl(usb2_base + USB2_VBCTRL); | 
 | 294 | 	val &= ~USB2_VBCTRL_OCCLREN; | 
 | 295 | 	writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL); | 
 | 296 | 	writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA); | 
 | 297 | 	val = readl(usb2_base + USB2_OBINTEN); | 
 | 298 | 	writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN); | 
 | 299 | 	val = readl(usb2_base + USB2_ADPCTRL); | 
 | 300 | 	writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL); | 
 | 301 | 	val = readl(usb2_base + USB2_LINECTRL1); | 
 | 302 | 	rcar_gen3_set_linectrl(ch, 0, 0); | 
 | 303 | 	writel(val | USB2_LINECTRL1_DPRPD_EN | USB2_LINECTRL1_DMRPD_EN, | 
 | 304 | 	       usb2_base + USB2_LINECTRL1); | 
 | 305 |  | 
 | 306 | 	rcar_gen3_device_recognition(ch); | 
 | 307 | } | 
 | 308 |  | 
 | 309 | static int rcar_gen3_phy_usb2_init(struct phy *p) | 
 | 310 | { | 
 | 311 | 	struct rcar_gen3_chan *channel = phy_get_drvdata(p); | 
 | 312 | 	void __iomem *usb2_base = channel->base; | 
 | 313 |  | 
 | 314 | 	/* Initialize USB2 part */ | 
 | 315 | 	writel(USB2_INT_ENABLE_INIT, usb2_base + USB2_INT_ENABLE); | 
 | 316 | 	writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET); | 
 | 317 | 	writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET); | 
 | 318 |  | 
 | 319 | 	/* Initialize otg part */ | 
 | 320 | 	if (channel->has_otg_pins) | 
 | 321 | 		rcar_gen3_init_otg(channel); | 
 | 322 |  | 
 | 323 | 	return 0; | 
 | 324 | } | 
 | 325 |  | 
 | 326 | static int rcar_gen3_phy_usb2_exit(struct phy *p) | 
 | 327 | { | 
 | 328 | 	struct rcar_gen3_chan *channel = phy_get_drvdata(p); | 
 | 329 |  | 
 | 330 | 	writel(0, channel->base + USB2_INT_ENABLE); | 
 | 331 |  | 
 | 332 | 	return 0; | 
 | 333 | } | 
 | 334 |  | 
 | 335 | static int rcar_gen3_phy_usb2_power_on(struct phy *p) | 
 | 336 | { | 
 | 337 | 	struct rcar_gen3_chan *channel = phy_get_drvdata(p); | 
 | 338 | 	void __iomem *usb2_base = channel->base; | 
 | 339 | 	u32 val; | 
 | 340 | 	int ret; | 
 | 341 |  | 
 | 342 | 	if (channel->vbus) { | 
 | 343 | 		ret = regulator_enable(channel->vbus); | 
 | 344 | 		if (ret) | 
 | 345 | 			return ret; | 
 | 346 | 	} | 
 | 347 |  | 
 | 348 | 	val = readl(usb2_base + USB2_USBCTR); | 
 | 349 | 	val |= USB2_USBCTR_PLL_RST; | 
 | 350 | 	writel(val, usb2_base + USB2_USBCTR); | 
 | 351 | 	val &= ~USB2_USBCTR_PLL_RST; | 
 | 352 | 	writel(val, usb2_base + USB2_USBCTR); | 
 | 353 |  | 
 | 354 | 	return 0; | 
 | 355 | } | 
 | 356 |  | 
 | 357 | static int rcar_gen3_phy_usb2_power_off(struct phy *p) | 
 | 358 | { | 
 | 359 | 	struct rcar_gen3_chan *channel = phy_get_drvdata(p); | 
 | 360 | 	int ret = 0; | 
 | 361 |  | 
 | 362 | 	if (channel->vbus) | 
 | 363 | 		ret = regulator_disable(channel->vbus); | 
 | 364 |  | 
 | 365 | 	return ret; | 
 | 366 | } | 
 | 367 |  | 
 | 368 | static const struct phy_ops rcar_gen3_phy_usb2_ops = { | 
 | 369 | 	.init		= rcar_gen3_phy_usb2_init, | 
 | 370 | 	.exit		= rcar_gen3_phy_usb2_exit, | 
 | 371 | 	.power_on	= rcar_gen3_phy_usb2_power_on, | 
 | 372 | 	.power_off	= rcar_gen3_phy_usb2_power_off, | 
 | 373 | 	.owner		= THIS_MODULE, | 
 | 374 | }; | 
 | 375 |  | 
 | 376 | static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch) | 
 | 377 | { | 
 | 378 | 	struct rcar_gen3_chan *ch = _ch; | 
 | 379 | 	void __iomem *usb2_base = ch->base; | 
 | 380 | 	u32 status = readl(usb2_base + USB2_OBINTSTA); | 
 | 381 | 	irqreturn_t ret = IRQ_NONE; | 
 | 382 |  | 
 | 383 | 	if (status & USB2_OBINT_BITS) { | 
 | 384 | 		dev_vdbg(&ch->phy->dev, "%s: %08x\n", __func__, status); | 
 | 385 | 		writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA); | 
 | 386 | 		rcar_gen3_device_recognition(ch); | 
 | 387 | 		ret = IRQ_HANDLED; | 
 | 388 | 	} | 
 | 389 |  | 
 | 390 | 	return ret; | 
 | 391 | } | 
 | 392 |  | 
 | 393 | static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = { | 
 | 394 | 	{ | 
 | 395 | 		.compatible = "renesas,usb2-phy-r8a7795", | 
 | 396 | 		.data = (void *)RCAR_GEN3_PHY_HAS_DEDICATED_PINS, | 
 | 397 | 	}, | 
 | 398 | 	{ | 
 | 399 | 		.compatible = "renesas,usb2-phy-r8a7796", | 
 | 400 | 		.data = (void *)RCAR_GEN3_PHY_HAS_DEDICATED_PINS, | 
 | 401 | 	}, | 
 | 402 | 	{ | 
 | 403 | 		.compatible = "renesas,usb2-phy-r8a77965", | 
 | 404 | 		.data = (void *)RCAR_GEN3_PHY_HAS_DEDICATED_PINS, | 
 | 405 | 	}, | 
 | 406 | 	{ | 
 | 407 | 		.compatible = "renesas,rcar-gen3-usb2-phy", | 
 | 408 | 	}, | 
 | 409 | 	{ } | 
 | 410 | }; | 
 | 411 | MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table); | 
 | 412 |  | 
 | 413 | static const unsigned int rcar_gen3_phy_cable[] = { | 
 | 414 | 	EXTCON_USB, | 
 | 415 | 	EXTCON_USB_HOST, | 
 | 416 | 	EXTCON_NONE, | 
 | 417 | }; | 
 | 418 |  | 
 | 419 | static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev) | 
 | 420 | { | 
 | 421 | 	struct device *dev = &pdev->dev; | 
 | 422 | 	struct rcar_gen3_chan *channel; | 
 | 423 | 	struct phy_provider *provider; | 
 | 424 | 	struct resource *res; | 
 | 425 | 	int irq, ret = 0; | 
 | 426 |  | 
 | 427 | 	if (!dev->of_node) { | 
 | 428 | 		dev_err(dev, "This driver needs device tree\n"); | 
 | 429 | 		return -EINVAL; | 
 | 430 | 	} | 
 | 431 |  | 
 | 432 | 	channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL); | 
 | 433 | 	if (!channel) | 
 | 434 | 		return -ENOMEM; | 
 | 435 |  | 
 | 436 | 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 
 | 437 | 	channel->base = devm_ioremap_resource(dev, res); | 
 | 438 | 	if (IS_ERR(channel->base)) | 
 | 439 | 		return PTR_ERR(channel->base); | 
 | 440 |  | 
 | 441 | 	/* call request_irq for OTG */ | 
 | 442 | 	irq = platform_get_irq(pdev, 0); | 
 | 443 | 	if (irq >= 0) { | 
 | 444 | 		INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work); | 
 | 445 | 		irq = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq, | 
 | 446 | 				       IRQF_SHARED, dev_name(dev), channel); | 
 | 447 | 		if (irq < 0) | 
 | 448 | 			dev_err(dev, "No irq handler (%d)\n", irq); | 
 | 449 | 	} | 
 | 450 |  | 
 | 451 | 	if (of_usb_get_dr_mode_by_phy(dev->of_node, 0) == USB_DR_MODE_OTG) { | 
 | 452 | 		int ret; | 
 | 453 |  | 
 | 454 | 		channel->has_otg_pins = (uintptr_t)of_device_get_match_data(dev); | 
 | 455 | 		channel->extcon = devm_extcon_dev_allocate(dev, | 
 | 456 | 							rcar_gen3_phy_cable); | 
 | 457 | 		if (IS_ERR(channel->extcon)) | 
 | 458 | 			return PTR_ERR(channel->extcon); | 
 | 459 |  | 
 | 460 | 		ret = devm_extcon_dev_register(dev, channel->extcon); | 
 | 461 | 		if (ret < 0) { | 
 | 462 | 			dev_err(dev, "Failed to register extcon\n"); | 
 | 463 | 			return ret; | 
 | 464 | 		} | 
 | 465 | 	} | 
 | 466 |  | 
 | 467 | 	/* | 
 | 468 | 	 * devm_phy_create() will call pm_runtime_enable(&phy->dev); | 
 | 469 | 	 * And then, phy-core will manage runtime pm for this device. | 
 | 470 | 	 */ | 
 | 471 | 	pm_runtime_enable(dev); | 
 | 472 | 	channel->phy = devm_phy_create(dev, NULL, &rcar_gen3_phy_usb2_ops); | 
 | 473 | 	if (IS_ERR(channel->phy)) { | 
 | 474 | 		dev_err(dev, "Failed to create USB2 PHY\n"); | 
 | 475 | 		ret = PTR_ERR(channel->phy); | 
 | 476 | 		goto error; | 
 | 477 | 	} | 
 | 478 |  | 
 | 479 | 	channel->vbus = devm_regulator_get_optional(dev, "vbus"); | 
 | 480 | 	if (IS_ERR(channel->vbus)) { | 
 | 481 | 		if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) { | 
 | 482 | 			ret = PTR_ERR(channel->vbus); | 
 | 483 | 			goto error; | 
 | 484 | 		} | 
 | 485 | 		channel->vbus = NULL; | 
 | 486 | 	} | 
 | 487 |  | 
 | 488 | 	platform_set_drvdata(pdev, channel); | 
 | 489 | 	phy_set_drvdata(channel->phy, channel); | 
 | 490 |  | 
 | 491 | 	provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); | 
 | 492 | 	if (IS_ERR(provider)) { | 
 | 493 | 		dev_err(dev, "Failed to register PHY provider\n"); | 
 | 494 | 		ret = PTR_ERR(provider); | 
 | 495 | 		goto error; | 
 | 496 | 	} else if (channel->has_otg_pins) { | 
 | 497 | 		int ret; | 
 | 498 |  | 
 | 499 | 		ret = device_create_file(dev, &dev_attr_role); | 
 | 500 | 		if (ret < 0) | 
 | 501 | 			goto error; | 
 | 502 | 	} | 
 | 503 |  | 
 | 504 | 	return 0; | 
 | 505 |  | 
 | 506 | error: | 
 | 507 | 	pm_runtime_disable(dev); | 
 | 508 |  | 
 | 509 | 	return ret; | 
 | 510 | } | 
 | 511 |  | 
 | 512 | static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev) | 
 | 513 | { | 
 | 514 | 	struct rcar_gen3_chan *channel = platform_get_drvdata(pdev); | 
 | 515 |  | 
 | 516 | 	if (channel->has_otg_pins) | 
 | 517 | 		device_remove_file(&pdev->dev, &dev_attr_role); | 
 | 518 |  | 
 | 519 | 	pm_runtime_disable(&pdev->dev); | 
 | 520 |  | 
 | 521 | 	return 0; | 
 | 522 | }; | 
 | 523 |  | 
 | 524 | static struct platform_driver rcar_gen3_phy_usb2_driver = { | 
 | 525 | 	.driver = { | 
 | 526 | 		.name		= "phy_rcar_gen3_usb2", | 
 | 527 | 		.of_match_table	= rcar_gen3_phy_usb2_match_table, | 
 | 528 | 	}, | 
 | 529 | 	.probe	= rcar_gen3_phy_usb2_probe, | 
 | 530 | 	.remove = rcar_gen3_phy_usb2_remove, | 
 | 531 | }; | 
 | 532 | module_platform_driver(rcar_gen3_phy_usb2_driver); | 
 | 533 |  | 
 | 534 | MODULE_LICENSE("GPL v2"); | 
 | 535 | MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY"); | 
 | 536 | MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>"); |