| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /** |
| 3 | * xhci-dbgcap.h - xHCI debug capability support |
| 4 | * |
| 5 | * Copyright (C) 2017 Intel Corporation |
| 6 | * |
| 7 | * Author: Lu Baolu <baolu.lu@linux.intel.com> |
| 8 | */ |
| 9 | #ifndef __LINUX_XHCI_DBGCAP_H |
| 10 | #define __LINUX_XHCI_DBGCAP_H |
| 11 | |
| 12 | #include <linux/tty.h> |
| 13 | #include <linux/kfifo.h> |
| 14 | |
| 15 | struct dbc_regs { |
| 16 | __le32 capability; |
| 17 | __le32 doorbell; |
| 18 | __le32 ersts; /* Event Ring Segment Table Size*/ |
| 19 | __le32 __reserved_0; /* 0c~0f reserved bits */ |
| 20 | __le64 erstba; /* Event Ring Segment Table Base Address */ |
| 21 | __le64 erdp; /* Event Ring Dequeue Pointer */ |
| 22 | __le32 control; |
| 23 | __le32 status; |
| 24 | __le32 portsc; /* Port status and control */ |
| 25 | __le32 __reserved_1; /* 2b~28 reserved bits */ |
| 26 | __le64 dccp; /* Debug Capability Context Pointer */ |
| 27 | __le32 devinfo1; /* Device Descriptor Info Register 1 */ |
| 28 | __le32 devinfo2; /* Device Descriptor Info Register 2 */ |
| 29 | }; |
| 30 | |
| 31 | struct dbc_info_context { |
| 32 | __le64 string0; |
| 33 | __le64 manufacturer; |
| 34 | __le64 product; |
| 35 | __le64 serial; |
| 36 | __le32 length; |
| 37 | __le32 __reserved_0[7]; |
| 38 | }; |
| 39 | |
| 40 | #define DBC_CTRL_DBC_RUN BIT(0) |
| 41 | #define DBC_CTRL_PORT_ENABLE BIT(1) |
| 42 | #define DBC_CTRL_HALT_OUT_TR BIT(2) |
| 43 | #define DBC_CTRL_HALT_IN_TR BIT(3) |
| 44 | #define DBC_CTRL_DBC_RUN_CHANGE BIT(4) |
| 45 | #define DBC_CTRL_DBC_ENABLE BIT(31) |
| 46 | #define DBC_CTRL_MAXBURST(p) (((p) >> 16) & 0xff) |
| 47 | #define DBC_DOOR_BELL_TARGET(p) (((p) & 0xff) << 8) |
| 48 | |
| 49 | #define DBC_MAX_PACKET 1024 |
| 50 | #define DBC_MAX_STRING_LENGTH 64 |
| 51 | #define DBC_STRING_MANUFACTURER "Linux Foundation" |
| 52 | #define DBC_STRING_PRODUCT "Linux USB Debug Target" |
| 53 | #define DBC_STRING_SERIAL "0001" |
| 54 | #define DBC_CONTEXT_SIZE 64 |
| 55 | |
| 56 | /* |
| 57 | * Port status: |
| 58 | */ |
| 59 | #define DBC_PORTSC_CONN_STATUS BIT(0) |
| 60 | #define DBC_PORTSC_PORT_ENABLED BIT(1) |
| 61 | #define DBC_PORTSC_CONN_CHANGE BIT(17) |
| 62 | #define DBC_PORTSC_RESET_CHANGE BIT(21) |
| 63 | #define DBC_PORTSC_LINK_CHANGE BIT(22) |
| 64 | #define DBC_PORTSC_CONFIG_CHANGE BIT(23) |
| 65 | |
| 66 | struct dbc_str_descs { |
| 67 | char string0[DBC_MAX_STRING_LENGTH]; |
| 68 | char manufacturer[DBC_MAX_STRING_LENGTH]; |
| 69 | char product[DBC_MAX_STRING_LENGTH]; |
| 70 | char serial[DBC_MAX_STRING_LENGTH]; |
| 71 | }; |
| 72 | |
| 73 | #define DBC_PROTOCOL 1 /* GNU Remote Debug Command */ |
| 74 | #define DBC_VENDOR_ID 0x1d6b /* Linux Foundation 0x1d6b */ |
| 75 | #define DBC_PRODUCT_ID 0x0010 /* device 0010 */ |
| 76 | #define DBC_DEVICE_REV 0x0010 /* 0.10 */ |
| 77 | |
| 78 | enum dbc_state { |
| 79 | DS_DISABLED = 0, |
| 80 | DS_INITIALIZED, |
| 81 | DS_ENABLED, |
| 82 | DS_CONNECTED, |
| 83 | DS_CONFIGURED, |
| 84 | DS_STALLED, |
| 85 | }; |
| 86 | |
| 87 | struct dbc_request { |
| 88 | void *buf; |
| 89 | unsigned int length; |
| 90 | dma_addr_t dma; |
| 91 | void (*complete)(struct xhci_hcd *xhci, |
| 92 | struct dbc_request *req); |
| 93 | struct list_head list_pool; |
| 94 | int status; |
| 95 | unsigned int actual; |
| 96 | |
| 97 | struct dbc_ep *dep; |
| 98 | struct list_head list_pending; |
| 99 | dma_addr_t trb_dma; |
| 100 | union xhci_trb *trb; |
| 101 | unsigned direction:1; |
| 102 | }; |
| 103 | |
| 104 | struct dbc_ep { |
| 105 | struct xhci_dbc *dbc; |
| 106 | struct list_head list_pending; |
| 107 | struct xhci_ring *ring; |
| 108 | unsigned direction:1; |
| 109 | }; |
| 110 | |
| 111 | #define DBC_QUEUE_SIZE 16 |
| 112 | #define DBC_WRITE_BUF_SIZE 8192 |
| 113 | |
| 114 | /* |
| 115 | * Private structure for DbC hardware state: |
| 116 | */ |
| 117 | struct dbc_port { |
| 118 | struct tty_port port; |
| 119 | spinlock_t port_lock; /* port access */ |
| 120 | |
| 121 | struct list_head read_pool; |
| 122 | struct list_head read_queue; |
| 123 | unsigned int n_read; |
| 124 | struct tasklet_struct push; |
| 125 | |
| 126 | struct list_head write_pool; |
| 127 | struct kfifo write_fifo; |
| 128 | |
| 129 | bool registered; |
| 130 | struct dbc_ep *in; |
| 131 | struct dbc_ep *out; |
| 132 | }; |
| 133 | |
| 134 | struct xhci_dbc { |
| 135 | spinlock_t lock; /* device access */ |
| 136 | struct xhci_hcd *xhci; |
| 137 | struct dbc_regs __iomem *regs; |
| 138 | struct xhci_ring *ring_evt; |
| 139 | struct xhci_ring *ring_in; |
| 140 | struct xhci_ring *ring_out; |
| 141 | struct xhci_erst erst; |
| 142 | struct xhci_container_ctx *ctx; |
| 143 | |
| 144 | struct dbc_str_descs *string; |
| 145 | dma_addr_t string_dma; |
| 146 | size_t string_size; |
| 147 | |
| 148 | enum dbc_state state; |
| 149 | struct delayed_work event_work; |
| 150 | unsigned resume_required:1; |
| 151 | struct dbc_ep eps[2]; |
| 152 | |
| 153 | struct dbc_port port; |
| 154 | }; |
| 155 | |
| 156 | #define dbc_bulkout_ctx(d) \ |
| 157 | ((struct xhci_ep_ctx *)((d)->ctx->bytes + DBC_CONTEXT_SIZE)) |
| 158 | #define dbc_bulkin_ctx(d) \ |
| 159 | ((struct xhci_ep_ctx *)((d)->ctx->bytes + DBC_CONTEXT_SIZE * 2)) |
| 160 | #define dbc_bulkout_enq(d) \ |
| 161 | xhci_trb_virt_to_dma((d)->ring_out->enq_seg, (d)->ring_out->enqueue) |
| 162 | #define dbc_bulkin_enq(d) \ |
| 163 | xhci_trb_virt_to_dma((d)->ring_in->enq_seg, (d)->ring_in->enqueue) |
| 164 | #define dbc_epctx_info2(t, p, b) \ |
| 165 | cpu_to_le32(EP_TYPE(t) | MAX_PACKET(p) | MAX_BURST(b)) |
| 166 | #define dbc_ep_dma_direction(d) \ |
| 167 | ((d)->direction ? DMA_FROM_DEVICE : DMA_TO_DEVICE) |
| 168 | |
| 169 | #define BULK_OUT 0 |
| 170 | #define BULK_IN 1 |
| 171 | #define EPID_OUT 2 |
| 172 | #define EPID_IN 3 |
| 173 | |
| 174 | enum evtreturn { |
| 175 | EVT_ERR = -1, |
| 176 | EVT_DONE, |
| 177 | EVT_GSER, |
| 178 | EVT_DISC, |
| 179 | }; |
| 180 | |
| 181 | static inline struct dbc_ep *get_in_ep(struct xhci_hcd *xhci) |
| 182 | { |
| 183 | struct xhci_dbc *dbc = xhci->dbc; |
| 184 | |
| 185 | return &dbc->eps[BULK_IN]; |
| 186 | } |
| 187 | |
| 188 | static inline struct dbc_ep *get_out_ep(struct xhci_hcd *xhci) |
| 189 | { |
| 190 | struct xhci_dbc *dbc = xhci->dbc; |
| 191 | |
| 192 | return &dbc->eps[BULK_OUT]; |
| 193 | } |
| 194 | |
| 195 | #ifdef CONFIG_USB_XHCI_DBGCAP |
| 196 | int xhci_dbc_init(struct xhci_hcd *xhci); |
| 197 | void xhci_dbc_exit(struct xhci_hcd *xhci); |
| 198 | int xhci_dbc_tty_register_driver(struct xhci_hcd *xhci); |
| 199 | void xhci_dbc_tty_unregister_driver(void); |
| 200 | int xhci_dbc_tty_register_device(struct xhci_hcd *xhci); |
| 201 | void xhci_dbc_tty_unregister_device(struct xhci_hcd *xhci); |
| 202 | struct dbc_request *dbc_alloc_request(struct dbc_ep *dep, gfp_t gfp_flags); |
| 203 | void dbc_free_request(struct dbc_ep *dep, struct dbc_request *req); |
| 204 | int dbc_ep_queue(struct dbc_ep *dep, struct dbc_request *req, gfp_t gfp_flags); |
| 205 | #ifdef CONFIG_PM |
| 206 | int xhci_dbc_suspend(struct xhci_hcd *xhci); |
| 207 | int xhci_dbc_resume(struct xhci_hcd *xhci); |
| 208 | #endif /* CONFIG_PM */ |
| 209 | #else |
| 210 | static inline int xhci_dbc_init(struct xhci_hcd *xhci) |
| 211 | { |
| 212 | return 0; |
| 213 | } |
| 214 | |
| 215 | static inline void xhci_dbc_exit(struct xhci_hcd *xhci) |
| 216 | { |
| 217 | } |
| 218 | |
| 219 | static inline int xhci_dbc_suspend(struct xhci_hcd *xhci) |
| 220 | { |
| 221 | return 0; |
| 222 | } |
| 223 | |
| 224 | static inline int xhci_dbc_resume(struct xhci_hcd *xhci) |
| 225 | { |
| 226 | return 0; |
| 227 | } |
| 228 | #endif /* CONFIG_USB_XHCI_DBGCAP */ |
| 229 | #endif /* __LINUX_XHCI_DBGCAP_H */ |