blob: 48c24d0e9e75c746ae6c46e520b9aac9b3c8f8de [file] [log] [blame]
xjb04a4022021-11-25 15:01:52 +08001/*
2 * Kernel-based Virtual Machine driver for Linux
3 * cpuid support routines
4 *
5 * derived from arch/x86/kvm/x86.c
6 *
7 * Copyright 2011 Red Hat, Inc. and/or its affiliates.
8 * Copyright IBM Corporation, 2008
9 *
10 * This work is licensed under the terms of the GNU GPL, version 2. See
11 * the COPYING file in the top-level directory.
12 *
13 */
14
15#include <linux/kvm_host.h>
16#include <linux/export.h>
17#include <linux/vmalloc.h>
18#include <linux/uaccess.h>
19#include <linux/sched/stat.h>
20
21#include <asm/processor.h>
22#include <asm/user.h>
23#include <asm/fpu/xstate.h>
24#include "cpuid.h"
25#include "lapic.h"
26#include "mmu.h"
27#include "trace.h"
28#include "pmu.h"
29
30static u32 xstate_required_size(u64 xstate_bv, bool compacted)
31{
32 int feature_bit = 0;
33 u32 ret = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
34
35 xstate_bv &= XFEATURE_MASK_EXTEND;
36 while (xstate_bv) {
37 if (xstate_bv & 0x1) {
38 u32 eax, ebx, ecx, edx, offset;
39 cpuid_count(0xD, feature_bit, &eax, &ebx, &ecx, &edx);
40 offset = compacted ? ret : ebx;
41 ret = max(ret, offset + eax);
42 }
43
44 xstate_bv >>= 1;
45 feature_bit++;
46 }
47
48 return ret;
49}
50
51bool kvm_mpx_supported(void)
52{
53 return ((host_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR))
54 && kvm_x86_ops->mpx_supported());
55}
56EXPORT_SYMBOL_GPL(kvm_mpx_supported);
57
58u64 kvm_supported_xcr0(void)
59{
60 u64 xcr0 = KVM_SUPPORTED_XCR0 & host_xcr0;
61
62 if (!kvm_mpx_supported())
63 xcr0 &= ~(XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR);
64
65 return xcr0;
66}
67
68#define F(x) bit(X86_FEATURE_##x)
69
70/* For scattered features from cpufeatures.h; we currently expose none */
71#define KF(x) bit(KVM_CPUID_BIT_##x)
72
73int kvm_update_cpuid(struct kvm_vcpu *vcpu)
74{
75 struct kvm_cpuid_entry2 *best;
76 struct kvm_lapic *apic = vcpu->arch.apic;
77
78 best = kvm_find_cpuid_entry(vcpu, 1, 0);
79 if (!best)
80 return 0;
81
82 /* Update OSXSAVE bit */
83 if (boot_cpu_has(X86_FEATURE_XSAVE) && best->function == 0x1) {
84 best->ecx &= ~F(OSXSAVE);
85 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
86 best->ecx |= F(OSXSAVE);
87 }
88
89 best->edx &= ~F(APIC);
90 if (vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE)
91 best->edx |= F(APIC);
92
93 if (apic) {
94 if (best->ecx & F(TSC_DEADLINE_TIMER))
95 apic->lapic_timer.timer_mode_mask = 3 << 17;
96 else
97 apic->lapic_timer.timer_mode_mask = 1 << 17;
98 }
99
100 best = kvm_find_cpuid_entry(vcpu, 7, 0);
101 if (best) {
102 /* Update OSPKE bit */
103 if (boot_cpu_has(X86_FEATURE_PKU) && best->function == 0x7) {
104 best->ecx &= ~F(OSPKE);
105 if (kvm_read_cr4_bits(vcpu, X86_CR4_PKE))
106 best->ecx |= F(OSPKE);
107 }
108 }
109
110 best = kvm_find_cpuid_entry(vcpu, 0xD, 0);
111 if (!best) {
112 vcpu->arch.guest_supported_xcr0 = 0;
113 vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
114 } else {
115 vcpu->arch.guest_supported_xcr0 =
116 (best->eax | ((u64)best->edx << 32)) &
117 kvm_supported_xcr0();
118 vcpu->arch.guest_xstate_size = best->ebx =
119 xstate_required_size(vcpu->arch.xcr0, false);
120 }
121
122 best = kvm_find_cpuid_entry(vcpu, 0xD, 1);
123 if (best && (best->eax & (F(XSAVES) | F(XSAVEC))))
124 best->ebx = xstate_required_size(vcpu->arch.xcr0, true);
125
126 /*
127 * The existing code assumes virtual address is 48-bit or 57-bit in the
128 * canonical address checks; exit if it is ever changed.
129 */
130 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
131 if (best) {
132 int vaddr_bits = (best->eax & 0xff00) >> 8;
133
134 if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0)
135 return -EINVAL;
136 }
137
138 best = kvm_find_cpuid_entry(vcpu, KVM_CPUID_FEATURES, 0);
139 if (kvm_hlt_in_guest(vcpu->kvm) && best &&
140 (best->eax & (1 << KVM_FEATURE_PV_UNHALT)))
141 best->eax &= ~(1 << KVM_FEATURE_PV_UNHALT);
142
143 /* Update physical-address width */
144 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
145 kvm_mmu_reset_context(vcpu);
146
147 kvm_pmu_refresh(vcpu);
148 return 0;
149}
150
151static int is_efer_nx(void)
152{
153 unsigned long long efer = 0;
154
155 rdmsrl_safe(MSR_EFER, &efer);
156 return efer & EFER_NX;
157}
158
159static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
160{
161 int i;
162 struct kvm_cpuid_entry2 *e, *entry;
163
164 entry = NULL;
165 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
166 e = &vcpu->arch.cpuid_entries[i];
167 if (e->function == 0x80000001) {
168 entry = e;
169 break;
170 }
171 }
172 if (entry && (entry->edx & F(NX)) && !is_efer_nx()) {
173 entry->edx &= ~F(NX);
174 printk(KERN_INFO "kvm: guest NX capability removed\n");
175 }
176}
177
178int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu)
179{
180 struct kvm_cpuid_entry2 *best;
181
182 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
183 if (!best || best->eax < 0x80000008)
184 goto not_found;
185 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
186 if (best)
187 return best->eax & 0xff;
188not_found:
189 return 36;
190}
191EXPORT_SYMBOL_GPL(cpuid_query_maxphyaddr);
192
193/* when an old userspace process fills a new kernel module */
194int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
195 struct kvm_cpuid *cpuid,
196 struct kvm_cpuid_entry __user *entries)
197{
198 int r, i;
199 struct kvm_cpuid_entry *cpuid_entries = NULL;
200
201 r = -E2BIG;
202 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
203 goto out;
204 r = -ENOMEM;
205 if (cpuid->nent) {
206 cpuid_entries =
207 vmalloc(array_size(sizeof(struct kvm_cpuid_entry),
208 cpuid->nent));
209 if (!cpuid_entries)
210 goto out;
211 r = -EFAULT;
212 if (copy_from_user(cpuid_entries, entries,
213 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
214 goto out;
215 }
216 for (i = 0; i < cpuid->nent; i++) {
217 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
218 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
219 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
220 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
221 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
222 vcpu->arch.cpuid_entries[i].index = 0;
223 vcpu->arch.cpuid_entries[i].flags = 0;
224 vcpu->arch.cpuid_entries[i].padding[0] = 0;
225 vcpu->arch.cpuid_entries[i].padding[1] = 0;
226 vcpu->arch.cpuid_entries[i].padding[2] = 0;
227 }
228 vcpu->arch.cpuid_nent = cpuid->nent;
229 cpuid_fix_nx_cap(vcpu);
230 kvm_apic_set_version(vcpu);
231 kvm_x86_ops->cpuid_update(vcpu);
232 r = kvm_update_cpuid(vcpu);
233
234out:
235 vfree(cpuid_entries);
236 return r;
237}
238
239int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
240 struct kvm_cpuid2 *cpuid,
241 struct kvm_cpuid_entry2 __user *entries)
242{
243 int r;
244
245 r = -E2BIG;
246 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
247 goto out;
248 r = -EFAULT;
249 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
250 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
251 goto out;
252 vcpu->arch.cpuid_nent = cpuid->nent;
253 kvm_apic_set_version(vcpu);
254 kvm_x86_ops->cpuid_update(vcpu);
255 r = kvm_update_cpuid(vcpu);
256out:
257 return r;
258}
259
260int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
261 struct kvm_cpuid2 *cpuid,
262 struct kvm_cpuid_entry2 __user *entries)
263{
264 int r;
265
266 r = -E2BIG;
267 if (cpuid->nent < vcpu->arch.cpuid_nent)
268 goto out;
269 r = -EFAULT;
270 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
271 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
272 goto out;
273 return 0;
274
275out:
276 cpuid->nent = vcpu->arch.cpuid_nent;
277 return r;
278}
279
280static void cpuid_mask(u32 *word, int wordnum)
281{
282 *word &= boot_cpu_data.x86_capability[wordnum];
283}
284
285static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
286 u32 index)
287{
288 entry->function = function;
289 entry->index = index;
290 cpuid_count(entry->function, entry->index,
291 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
292 entry->flags = 0;
293}
294
295static int __do_cpuid_ent_emulated(struct kvm_cpuid_entry2 *entry,
296 u32 func, u32 index, int *nent, int maxnent)
297{
298 switch (func) {
299 case 0:
300 entry->eax = 7;
301 ++*nent;
302 break;
303 case 1:
304 entry->ecx = F(MOVBE);
305 ++*nent;
306 break;
307 case 7:
308 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
309 if (index == 0)
310 entry->ecx = F(RDPID);
311 ++*nent;
312 default:
313 break;
314 }
315
316 entry->function = func;
317 entry->index = index;
318
319 return 0;
320}
321
322static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
323 u32 index, int *nent, int maxnent)
324{
325 int r;
326 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
327#ifdef CONFIG_X86_64
328 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
329 ? F(GBPAGES) : 0;
330 unsigned f_lm = F(LM);
331#else
332 unsigned f_gbpages = 0;
333 unsigned f_lm = 0;
334#endif
335 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
336 unsigned f_invpcid = kvm_x86_ops->invpcid_supported() ? F(INVPCID) : 0;
337 unsigned f_mpx = kvm_mpx_supported() ? F(MPX) : 0;
338 unsigned f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0;
339 unsigned f_umip = kvm_x86_ops->umip_emulated() ? F(UMIP) : 0;
340 unsigned f_la57 = 0;
341
342 /* cpuid 1.edx */
343 const u32 kvm_cpuid_1_edx_x86_features =
344 F(FPU) | F(VME) | F(DE) | F(PSE) |
345 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
346 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
347 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
348 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLUSH) |
349 0 /* Reserved, DS, ACPI */ | F(MMX) |
350 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
351 0 /* HTT, TM, Reserved, PBE */;
352 /* cpuid 0x80000001.edx */
353 const u32 kvm_cpuid_8000_0001_edx_x86_features =
354 F(FPU) | F(VME) | F(DE) | F(PSE) |
355 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
356 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
357 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
358 F(PAT) | F(PSE36) | 0 /* Reserved */ |
359 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
360 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
361 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
362 /* cpuid 1.ecx */
363 const u32 kvm_cpuid_1_ecx_x86_features =
364 /* NOTE: MONITOR (and MWAIT) are emulated as NOP,
365 * but *not* advertised to guests via CPUID ! */
366 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
367 0 /* DS-CPL, VMX, SMX, EST */ |
368 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
369 F(FMA) | F(CX16) | 0 /* xTPR Update, PDCM */ |
370 F(PCID) | 0 /* Reserved, DCA */ | F(XMM4_1) |
371 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
372 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
373 F(F16C) | F(RDRAND);
374 /* cpuid 0x80000001.ecx */
375 const u32 kvm_cpuid_8000_0001_ecx_x86_features =
376 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
377 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
378 F(3DNOWPREFETCH) | F(OSVW) | 0 /* IBS */ | F(XOP) |
379 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM) |
380 F(TOPOEXT) | F(PERFCTR_CORE);
381
382 /* cpuid 0x80000008.ebx */
383 const u32 kvm_cpuid_8000_0008_ebx_x86_features =
384 F(AMD_IBPB) | F(AMD_IBRS) | F(AMD_SSBD) | F(VIRT_SSBD) |
385 F(AMD_SSB_NO) | F(AMD_STIBP);
386
387 /* cpuid 0xC0000001.edx */
388 const u32 kvm_cpuid_C000_0001_edx_x86_features =
389 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
390 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
391 F(PMM) | F(PMM_EN);
392
393 /* cpuid 7.0.ebx */
394 const u32 kvm_cpuid_7_0_ebx_x86_features =
395 F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
396 F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) |
397 F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) |
398 F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) |
399 F(SHA_NI) | F(AVX512BW) | F(AVX512VL);
400
401 /* cpuid 0xD.1.eax */
402 const u32 kvm_cpuid_D_1_eax_x86_features =
403 F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves;
404
405 /* cpuid 7.0.ecx*/
406 const u32 kvm_cpuid_7_0_ecx_x86_features =
407 F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ |
408 F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) |
409 F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) |
410 F(CLDEMOTE);
411
412 /* cpuid 7.0.edx*/
413 const u32 kvm_cpuid_7_0_edx_x86_features =
414 F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
415 F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
416 F(MD_CLEAR);
417
418 /* all calls to cpuid_count() should be made on the same cpu */
419 get_cpu();
420
421 r = -E2BIG;
422
423 if (WARN_ON(*nent >= maxnent))
424 goto out;
425
426 do_cpuid_1_ent(entry, function, index);
427 ++*nent;
428
429 switch (function) {
430 case 0:
431 entry->eax = min(entry->eax, (u32)0xd);
432 break;
433 case 1:
434 entry->edx &= kvm_cpuid_1_edx_x86_features;
435 cpuid_mask(&entry->edx, CPUID_1_EDX);
436 entry->ecx &= kvm_cpuid_1_ecx_x86_features;
437 cpuid_mask(&entry->ecx, CPUID_1_ECX);
438 /* we support x2apic emulation even if host does not support
439 * it since we emulate x2apic in software */
440 entry->ecx |= F(X2APIC);
441 break;
442 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
443 * may return different values. This forces us to get_cpu() before
444 * issuing the first command, and also to emulate this annoying behavior
445 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
446 case 2: {
447 int t, times = entry->eax & 0xff;
448
449 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
450 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
451 for (t = 1; t < times; ++t) {
452 if (*nent >= maxnent)
453 goto out;
454
455 do_cpuid_1_ent(&entry[t], function, 0);
456 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
457 ++*nent;
458 }
459 break;
460 }
461 /* function 4 has additional index. */
462 case 4: {
463 int i, cache_type;
464
465 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
466 /* read more entries until cache_type is zero */
467 for (i = 1; ; ++i) {
468 if (*nent >= maxnent)
469 goto out;
470
471 cache_type = entry[i - 1].eax & 0x1f;
472 if (!cache_type)
473 break;
474 do_cpuid_1_ent(&entry[i], function, i);
475 entry[i].flags |=
476 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
477 ++*nent;
478 }
479 break;
480 }
481 case 6: /* Thermal management */
482 entry->eax = 0x4; /* allow ARAT */
483 entry->ebx = 0;
484 entry->ecx = 0;
485 entry->edx = 0;
486 break;
487 case 7: {
488 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
489 /* Mask ebx against host capability word 9 */
490 if (index == 0) {
491 entry->ebx &= kvm_cpuid_7_0_ebx_x86_features;
492 cpuid_mask(&entry->ebx, CPUID_7_0_EBX);
493 // TSC_ADJUST is emulated
494 entry->ebx |= F(TSC_ADJUST);
495 entry->ecx &= kvm_cpuid_7_0_ecx_x86_features;
496 f_la57 = entry->ecx & F(LA57);
497 cpuid_mask(&entry->ecx, CPUID_7_ECX);
498 /* Set LA57 based on hardware capability. */
499 entry->ecx |= f_la57;
500 entry->ecx |= f_umip;
501 /* PKU is not yet implemented for shadow paging. */
502 if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE))
503 entry->ecx &= ~F(PKU);
504
505 entry->edx &= kvm_cpuid_7_0_edx_x86_features;
506 cpuid_mask(&entry->edx, CPUID_7_EDX);
507 if (boot_cpu_has(X86_FEATURE_IBPB) &&
508 boot_cpu_has(X86_FEATURE_IBRS))
509 entry->edx |= F(SPEC_CTRL);
510 if (boot_cpu_has(X86_FEATURE_STIBP))
511 entry->edx |= F(INTEL_STIBP);
512 if (boot_cpu_has(X86_FEATURE_SSBD))
513 entry->edx |= F(SPEC_CTRL_SSBD);
514 /*
515 * We emulate ARCH_CAPABILITIES in software even
516 * if the host doesn't support it.
517 */
518 entry->edx |= F(ARCH_CAPABILITIES);
519 } else {
520 entry->ebx = 0;
521 entry->ecx = 0;
522 entry->edx = 0;
523 }
524 entry->eax = 0;
525 break;
526 }
527 case 9:
528 break;
529 case 0xa: { /* Architectural Performance Monitoring */
530 struct x86_pmu_capability cap;
531 union cpuid10_eax eax;
532 union cpuid10_edx edx;
533
534 perf_get_x86_pmu_capability(&cap);
535
536 /*
537 * Only support guest architectural pmu on a host
538 * with architectural pmu.
539 */
540 if (!cap.version)
541 memset(&cap, 0, sizeof(cap));
542
543 eax.split.version_id = min(cap.version, 2);
544 eax.split.num_counters = cap.num_counters_gp;
545 eax.split.bit_width = cap.bit_width_gp;
546 eax.split.mask_length = cap.events_mask_len;
547
548 edx.split.num_counters_fixed = cap.num_counters_fixed;
549 edx.split.bit_width_fixed = cap.bit_width_fixed;
550 edx.split.reserved = 0;
551
552 entry->eax = eax.full;
553 entry->ebx = cap.events_mask;
554 entry->ecx = 0;
555 entry->edx = edx.full;
556 break;
557 }
558 /* function 0xb has additional index. */
559 case 0xb: {
560 int i, level_type;
561
562 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
563 /* read more entries until level_type is zero */
564 for (i = 1; ; ++i) {
565 if (*nent >= maxnent)
566 goto out;
567
568 level_type = entry[i - 1].ecx & 0xff00;
569 if (!level_type)
570 break;
571 do_cpuid_1_ent(&entry[i], function, i);
572 entry[i].flags |=
573 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
574 ++*nent;
575 }
576 break;
577 }
578 case 0xd: {
579 int idx, i;
580 u64 supported = kvm_supported_xcr0();
581
582 entry->eax &= supported;
583 entry->ebx = xstate_required_size(supported, false);
584 entry->ecx = entry->ebx;
585 entry->edx &= supported >> 32;
586 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
587 if (!supported)
588 break;
589
590 for (idx = 1, i = 1; idx < 64; ++idx) {
591 u64 mask = ((u64)1 << idx);
592 if (*nent >= maxnent)
593 goto out;
594
595 do_cpuid_1_ent(&entry[i], function, idx);
596 if (idx == 1) {
597 entry[i].eax &= kvm_cpuid_D_1_eax_x86_features;
598 cpuid_mask(&entry[i].eax, CPUID_D_1_EAX);
599 entry[i].ebx = 0;
600 if (entry[i].eax & (F(XSAVES)|F(XSAVEC)))
601 entry[i].ebx =
602 xstate_required_size(supported,
603 true);
604 } else {
605 if (entry[i].eax == 0 || !(supported & mask))
606 continue;
607 if (WARN_ON_ONCE(entry[i].ecx & 1))
608 continue;
609 }
610 entry[i].ecx = 0;
611 entry[i].edx = 0;
612 entry[i].flags |=
613 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
614 ++*nent;
615 ++i;
616 }
617 break;
618 }
619 case KVM_CPUID_SIGNATURE: {
620 static const char signature[12] = "KVMKVMKVM\0\0";
621 const u32 *sigptr = (const u32 *)signature;
622 entry->eax = KVM_CPUID_FEATURES;
623 entry->ebx = sigptr[0];
624 entry->ecx = sigptr[1];
625 entry->edx = sigptr[2];
626 break;
627 }
628 case KVM_CPUID_FEATURES:
629 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
630 (1 << KVM_FEATURE_NOP_IO_DELAY) |
631 (1 << KVM_FEATURE_CLOCKSOURCE2) |
632 (1 << KVM_FEATURE_ASYNC_PF) |
633 (1 << KVM_FEATURE_PV_EOI) |
634 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT) |
635 (1 << KVM_FEATURE_PV_UNHALT) |
636 (1 << KVM_FEATURE_PV_TLB_FLUSH) |
637 (1 << KVM_FEATURE_ASYNC_PF_VMEXIT) |
638 (1 << KVM_FEATURE_PV_SEND_IPI);
639
640 if (sched_info_on())
641 entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
642
643 entry->ebx = 0;
644 entry->ecx = 0;
645 entry->edx = 0;
646 break;
647 case 0x80000000:
648 entry->eax = min(entry->eax, 0x8000001f);
649 break;
650 case 0x80000001:
651 entry->edx &= kvm_cpuid_8000_0001_edx_x86_features;
652 cpuid_mask(&entry->edx, CPUID_8000_0001_EDX);
653 entry->ecx &= kvm_cpuid_8000_0001_ecx_x86_features;
654 cpuid_mask(&entry->ecx, CPUID_8000_0001_ECX);
655 break;
656 case 0x80000007: /* Advanced power management */
657 /* invariant TSC is CPUID.80000007H:EDX[8] */
658 entry->edx &= (1 << 8);
659 /* mask against host */
660 entry->edx &= boot_cpu_data.x86_power;
661 entry->eax = entry->ebx = entry->ecx = 0;
662 break;
663 case 0x80000008: {
664 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
665 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
666 unsigned phys_as = entry->eax & 0xff;
667
668 if (!g_phys_as)
669 g_phys_as = phys_as;
670 entry->eax = g_phys_as | (virt_as << 8);
671 entry->edx = 0;
672 /*
673 * IBRS, IBPB and VIRT_SSBD aren't necessarily present in
674 * hardware cpuid
675 */
676 if (boot_cpu_has(X86_FEATURE_AMD_IBPB))
677 entry->ebx |= F(AMD_IBPB);
678 if (boot_cpu_has(X86_FEATURE_AMD_IBRS))
679 entry->ebx |= F(AMD_IBRS);
680 if (boot_cpu_has(X86_FEATURE_VIRT_SSBD))
681 entry->ebx |= F(VIRT_SSBD);
682 entry->ebx &= kvm_cpuid_8000_0008_ebx_x86_features;
683 cpuid_mask(&entry->ebx, CPUID_8000_0008_EBX);
684 /*
685 * The preference is to use SPEC CTRL MSR instead of the
686 * VIRT_SPEC MSR.
687 */
688 if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD) &&
689 !boot_cpu_has(X86_FEATURE_AMD_SSBD))
690 entry->ebx |= F(VIRT_SSBD);
691 break;
692 }
693 case 0x80000019:
694 entry->ecx = entry->edx = 0;
695 break;
696 case 0x8000001a:
697 break;
698 case 0x8000001d:
699 break;
700 /*Add support for Centaur's CPUID instruction*/
701 case 0xC0000000:
702 /*Just support up to 0xC0000004 now*/
703 entry->eax = min(entry->eax, 0xC0000004);
704 break;
705 case 0xC0000001:
706 entry->edx &= kvm_cpuid_C000_0001_edx_x86_features;
707 cpuid_mask(&entry->edx, CPUID_C000_0001_EDX);
708 break;
709 case 3: /* Processor serial number */
710 case 5: /* MONITOR/MWAIT */
711 case 0xC0000002:
712 case 0xC0000003:
713 case 0xC0000004:
714 default:
715 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
716 break;
717 }
718
719 kvm_x86_ops->set_supported_cpuid(function, entry);
720
721 r = 0;
722
723out:
724 put_cpu();
725
726 return r;
727}
728
729static int do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 func,
730 u32 idx, int *nent, int maxnent, unsigned int type)
731{
732 if (*nent >= maxnent)
733 return -E2BIG;
734
735 if (type == KVM_GET_EMULATED_CPUID)
736 return __do_cpuid_ent_emulated(entry, func, idx, nent, maxnent);
737
738 return __do_cpuid_ent(entry, func, idx, nent, maxnent);
739}
740
741#undef F
742
743struct kvm_cpuid_param {
744 u32 func;
745 u32 idx;
746 bool has_leaf_count;
747 bool (*qualifier)(const struct kvm_cpuid_param *param);
748};
749
750static bool is_centaur_cpu(const struct kvm_cpuid_param *param)
751{
752 return boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR;
753}
754
755static bool sanity_check_entries(struct kvm_cpuid_entry2 __user *entries,
756 __u32 num_entries, unsigned int ioctl_type)
757{
758 int i;
759 __u32 pad[3];
760
761 if (ioctl_type != KVM_GET_EMULATED_CPUID)
762 return false;
763
764 /*
765 * We want to make sure that ->padding is being passed clean from
766 * userspace in case we want to use it for something in the future.
767 *
768 * Sadly, this wasn't enforced for KVM_GET_SUPPORTED_CPUID and so we
769 * have to give ourselves satisfied only with the emulated side. /me
770 * sheds a tear.
771 */
772 for (i = 0; i < num_entries; i++) {
773 if (copy_from_user(pad, entries[i].padding, sizeof(pad)))
774 return true;
775
776 if (pad[0] || pad[1] || pad[2])
777 return true;
778 }
779 return false;
780}
781
782int kvm_dev_ioctl_get_cpuid(struct kvm_cpuid2 *cpuid,
783 struct kvm_cpuid_entry2 __user *entries,
784 unsigned int type)
785{
786 struct kvm_cpuid_entry2 *cpuid_entries;
787 int limit, nent = 0, r = -E2BIG, i;
788 u32 func;
789 static const struct kvm_cpuid_param param[] = {
790 { .func = 0, .has_leaf_count = true },
791 { .func = 0x80000000, .has_leaf_count = true },
792 { .func = 0xC0000000, .qualifier = is_centaur_cpu, .has_leaf_count = true },
793 { .func = KVM_CPUID_SIGNATURE },
794 { .func = KVM_CPUID_FEATURES },
795 };
796
797 if (cpuid->nent < 1)
798 goto out;
799 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
800 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
801
802 if (sanity_check_entries(entries, cpuid->nent, type))
803 return -EINVAL;
804
805 r = -ENOMEM;
806 cpuid_entries = vzalloc(array_size(sizeof(struct kvm_cpuid_entry2),
807 cpuid->nent));
808 if (!cpuid_entries)
809 goto out;
810
811 r = 0;
812 for (i = 0; i < ARRAY_SIZE(param); i++) {
813 const struct kvm_cpuid_param *ent = &param[i];
814
815 if (ent->qualifier && !ent->qualifier(ent))
816 continue;
817
818 r = do_cpuid_ent(&cpuid_entries[nent], ent->func, ent->idx,
819 &nent, cpuid->nent, type);
820
821 if (r)
822 goto out_free;
823
824 if (!ent->has_leaf_count)
825 continue;
826
827 limit = cpuid_entries[nent - 1].eax;
828 for (func = ent->func + 1; func <= limit && nent < cpuid->nent && r == 0; ++func)
829 r = do_cpuid_ent(&cpuid_entries[nent], func, ent->idx,
830 &nent, cpuid->nent, type);
831
832 if (r)
833 goto out_free;
834 }
835
836 r = -EFAULT;
837 if (copy_to_user(entries, cpuid_entries,
838 nent * sizeof(struct kvm_cpuid_entry2)))
839 goto out_free;
840 cpuid->nent = nent;
841 r = 0;
842
843out_free:
844 vfree(cpuid_entries);
845out:
846 return r;
847}
848
849static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
850{
851 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
852 struct kvm_cpuid_entry2 *ej;
853 int j = i;
854 int nent = vcpu->arch.cpuid_nent;
855
856 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
857 /* when no next entry is found, the current entry[i] is reselected */
858 do {
859 j = (j + 1) % nent;
860 ej = &vcpu->arch.cpuid_entries[j];
861 } while (ej->function != e->function);
862
863 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
864
865 return j;
866}
867
868/* find an entry with matching function, matching index (if needed), and that
869 * should be read next (if it's stateful) */
870static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
871 u32 function, u32 index)
872{
873 if (e->function != function)
874 return 0;
875 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
876 return 0;
877 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
878 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
879 return 0;
880 return 1;
881}
882
883struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
884 u32 function, u32 index)
885{
886 int i;
887 struct kvm_cpuid_entry2 *best = NULL;
888
889 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
890 struct kvm_cpuid_entry2 *e;
891
892 e = &vcpu->arch.cpuid_entries[i];
893 if (is_matching_cpuid_entry(e, function, index)) {
894 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
895 move_to_next_stateful_cpuid_entry(vcpu, i);
896 best = e;
897 break;
898 }
899 }
900 return best;
901}
902EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
903
904/*
905 * If no match is found, check whether we exceed the vCPU's limit
906 * and return the content of the highest valid _standard_ leaf instead.
907 * This is to satisfy the CPUID specification.
908 */
909static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
910 u32 function, u32 index)
911{
912 struct kvm_cpuid_entry2 *maxlevel;
913
914 maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
915 if (!maxlevel || maxlevel->eax >= function)
916 return NULL;
917 if (function & 0x80000000) {
918 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
919 if (!maxlevel)
920 return NULL;
921 }
922 return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
923}
924
925bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx,
926 u32 *ecx, u32 *edx, bool check_limit)
927{
928 u32 function = *eax, index = *ecx;
929 struct kvm_cpuid_entry2 *best;
930 bool entry_found = true;
931
932 best = kvm_find_cpuid_entry(vcpu, function, index);
933
934 if (!best) {
935 entry_found = false;
936 if (!check_limit)
937 goto out;
938
939 best = check_cpuid_limit(vcpu, function, index);
940 }
941
942out:
943 if (best) {
944 *eax = best->eax;
945 *ebx = best->ebx;
946 *ecx = best->ecx;
947 *edx = best->edx;
948 } else
949 *eax = *ebx = *ecx = *edx = 0;
950 trace_kvm_cpuid(function, *eax, *ebx, *ecx, *edx, entry_found);
951 return entry_found;
952}
953EXPORT_SYMBOL_GPL(kvm_cpuid);
954
955int kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
956{
957 u32 eax, ebx, ecx, edx;
958
959 if (cpuid_fault_enabled(vcpu) && !kvm_require_cpl(vcpu, 0))
960 return 1;
961
962 eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
963 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
964 kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, true);
965 kvm_register_write(vcpu, VCPU_REGS_RAX, eax);
966 kvm_register_write(vcpu, VCPU_REGS_RBX, ebx);
967 kvm_register_write(vcpu, VCPU_REGS_RCX, ecx);
968 kvm_register_write(vcpu, VCPU_REGS_RDX, edx);
969 return kvm_skip_emulated_instruction(vcpu);
970}
971EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);