blob: efa7f9fb73ffc355d8bb5dd4e2f5dd00242eaffc [file] [log] [blame]
xjb04a4022021-11-25 15:01:52 +08001/*
2 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst
10 */
11
12#include <linux/clk.h>
13#include <linux/clk-provider.h>
14#include <linux/clk/clk-conf.h>
15#include <linux/module.h>
16#include <linux/mutex.h>
17#include <linux/spinlock.h>
18#include <linux/err.h>
19#include <linux/list.h>
20#include <linux/slab.h>
21#include <linux/of.h>
22#include <linux/device.h>
23#include <linux/init.h>
24#include <linux/pm_runtime.h>
25#include <linux/sched.h>
26#include <linux/clkdev.h>
27
28#include "clk.h"
29
30static DEFINE_SPINLOCK(enable_lock);
31static DEFINE_MUTEX(prepare_lock);
32
33static struct task_struct *prepare_owner;
34static struct task_struct *enable_owner;
35
36static int prepare_refcnt;
37static int enable_refcnt;
38
39static HLIST_HEAD(clk_root_list);
40static HLIST_HEAD(clk_orphan_list);
41static LIST_HEAD(clk_notifier_list);
42
43/*** private data structures ***/
44
45struct clk_core {
46 const char *name;
47 const struct clk_ops *ops;
48 struct clk_hw *hw;
49 struct module *owner;
50 struct device *dev;
51 struct clk_core *parent;
52 const char **parent_names;
53 struct clk_core **parents;
54 u8 num_parents;
55 u8 new_parent_index;
56 unsigned long rate;
57 unsigned long req_rate;
58 unsigned long new_rate;
59 struct clk_core *new_parent;
60 struct clk_core *new_child;
61 unsigned long flags;
62 bool orphan;
63 bool need_sync;
64 bool boot_enabled;
65 unsigned int enable_count;
66 unsigned int prepare_count;
67 unsigned int protect_count;
68 unsigned long min_rate;
69 unsigned long max_rate;
70 unsigned long accuracy;
71 int phase;
72 struct clk_duty duty;
73 struct hlist_head children;
74 struct hlist_node child_node;
75 struct hlist_head clks;
76 unsigned int notifier_count;
77#ifdef CONFIG_DEBUG_FS
78 struct dentry *dentry;
79 struct hlist_node debug_node;
80#endif
81 struct kref ref;
82};
83
84#define CREATE_TRACE_POINTS
85#include <trace/events/clk.h>
86
87struct clk {
88 struct clk_core *core;
89 const char *dev_id;
90 const char *con_id;
91 unsigned long min_rate;
92 unsigned long max_rate;
93 unsigned int exclusive_count;
94 struct hlist_node clks_node;
95};
96
97/*** runtime pm ***/
98static int clk_pm_runtime_get(struct clk_core *core)
99{
100 int ret = 0;
101
102 if (!core->dev)
103 return 0;
104
105 ret = pm_runtime_get_sync(core->dev);
106 return ret < 0 ? ret : 0;
107}
108
109static void clk_pm_runtime_put(struct clk_core *core)
110{
111 if (!core->dev)
112 return;
113
114 pm_runtime_put_sync(core->dev);
115}
116
117/*** locking ***/
118static void clk_prepare_lock(void)
119{
120 if (!mutex_trylock(&prepare_lock)) {
121 if (prepare_owner == current) {
122 prepare_refcnt++;
123 return;
124 }
125 mutex_lock(&prepare_lock);
126 }
127 WARN_ON_ONCE(prepare_owner != NULL);
128 WARN_ON_ONCE(prepare_refcnt != 0);
129 prepare_owner = current;
130 prepare_refcnt = 1;
131}
132
133static void clk_prepare_unlock(void)
134{
135 WARN_ON_ONCE(prepare_owner != current);
136 WARN_ON_ONCE(prepare_refcnt == 0);
137
138 if (--prepare_refcnt)
139 return;
140 prepare_owner = NULL;
141 mutex_unlock(&prepare_lock);
142}
143
144static unsigned long clk_enable_lock(void)
145 __acquires(enable_lock)
146{
147 unsigned long flags;
148
149 /*
150 * On UP systems, spin_trylock_irqsave() always returns true, even if
151 * we already hold the lock. So, in that case, we rely only on
152 * reference counting.
153 */
154 if (!IS_ENABLED(CONFIG_SMP) ||
155 !spin_trylock_irqsave(&enable_lock, flags)) {
156 if (enable_owner == current) {
157 enable_refcnt++;
158 __acquire(enable_lock);
159 if (!IS_ENABLED(CONFIG_SMP))
160 local_save_flags(flags);
161 return flags;
162 }
163 spin_lock_irqsave(&enable_lock, flags);
164 }
165 WARN_ON_ONCE(enable_owner != NULL);
166 WARN_ON_ONCE(enable_refcnt != 0);
167 enable_owner = current;
168 enable_refcnt = 1;
169 return flags;
170}
171
172static void clk_enable_unlock(unsigned long flags)
173 __releases(enable_lock)
174{
175 WARN_ON_ONCE(enable_owner != current);
176 WARN_ON_ONCE(enable_refcnt == 0);
177
178 if (--enable_refcnt) {
179 __release(enable_lock);
180 return;
181 }
182 enable_owner = NULL;
183 spin_unlock_irqrestore(&enable_lock, flags);
184}
185
186static bool clk_core_rate_is_protected(struct clk_core *core)
187{
188 return core->protect_count;
189}
190
191static bool clk_core_is_prepared(struct clk_core *core)
192{
193 bool ret = false;
194
195 /*
196 * .is_prepared is optional for clocks that can prepare
197 * fall back to software usage counter if it is missing
198 */
199 if (!core->ops->is_prepared)
200 return core->prepare_count;
201
202 if (!clk_pm_runtime_get(core)) {
203 ret = core->ops->is_prepared(core->hw);
204 clk_pm_runtime_put(core);
205 }
206
207 return ret;
208}
209
210static bool clk_core_is_enabled(struct clk_core *core)
211{
212 bool ret = false;
213
214 /*
215 * .is_enabled is only mandatory for clocks that gate
216 * fall back to software usage counter if .is_enabled is missing
217 */
218 if (!core->ops->is_enabled)
219 return core->enable_count;
220
221 /*
222 * Check if clock controller's device is runtime active before
223 * calling .is_enabled callback. If not, assume that clock is
224 * disabled, because we might be called from atomic context, from
225 * which pm_runtime_get() is not allowed.
226 * This function is called mainly from clk_disable_unused_subtree,
227 * which ensures proper runtime pm activation of controller before
228 * taking enable spinlock, but the below check is needed if one tries
229 * to call it from other places.
230 */
231 if (core->dev) {
232 pm_runtime_get_noresume(core->dev);
233 if (!pm_runtime_active(core->dev)) {
234 ret = false;
235 goto done;
236 }
237 }
238
239 ret = core->ops->is_enabled(core->hw);
240done:
241 if (core->dev)
242 pm_runtime_put(core->dev);
243
244 return ret;
245}
246
247/*** helper functions ***/
248
249const char *__clk_get_name(const struct clk *clk)
250{
251 return !clk ? NULL : clk->core->name;
252}
253EXPORT_SYMBOL_GPL(__clk_get_name);
254
255const char *clk_hw_get_name(const struct clk_hw *hw)
256{
257 return hw->core->name;
258}
259EXPORT_SYMBOL_GPL(clk_hw_get_name);
260
261struct clk_hw *__clk_get_hw(struct clk *clk)
262{
263 return !clk ? NULL : clk->core->hw;
264}
265EXPORT_SYMBOL_GPL(__clk_get_hw);
266
267unsigned int clk_hw_get_num_parents(const struct clk_hw *hw)
268{
269 return hw->core->num_parents;
270}
271EXPORT_SYMBOL_GPL(clk_hw_get_num_parents);
272
273struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw)
274{
275 return hw->core->parent ? hw->core->parent->hw : NULL;
276}
277EXPORT_SYMBOL_GPL(clk_hw_get_parent);
278
279static struct clk_core *__clk_lookup_subtree(const char *name,
280 struct clk_core *core)
281{
282 struct clk_core *child;
283 struct clk_core *ret;
284
285 if (!strcmp(core->name, name))
286 return core;
287
288 hlist_for_each_entry(child, &core->children, child_node) {
289 ret = __clk_lookup_subtree(name, child);
290 if (ret)
291 return ret;
292 }
293
294 return NULL;
295}
296
297static struct clk_core *clk_core_lookup(const char *name)
298{
299 struct clk_core *root_clk;
300 struct clk_core *ret;
301
302 if (!name)
303 return NULL;
304
305 /* search the 'proper' clk tree first */
306 hlist_for_each_entry(root_clk, &clk_root_list, child_node) {
307 ret = __clk_lookup_subtree(name, root_clk);
308 if (ret)
309 return ret;
310 }
311
312 /* if not found, then search the orphan tree */
313 hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) {
314 ret = __clk_lookup_subtree(name, root_clk);
315 if (ret)
316 return ret;
317 }
318
319 return NULL;
320}
321
322static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core,
323 u8 index)
324{
325 if (!core || index >= core->num_parents)
326 return NULL;
327
328 if (!core->parents[index])
329 core->parents[index] =
330 clk_core_lookup(core->parent_names[index]);
331
332 return core->parents[index];
333}
334
335struct clk_hw *
336clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index)
337{
338 struct clk_core *parent;
339
340 parent = clk_core_get_parent_by_index(hw->core, index);
341
342 return !parent ? NULL : parent->hw;
343}
344EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index);
345
346unsigned int __clk_get_enable_count(struct clk *clk)
347{
348 return !clk ? 0 : clk->core->enable_count;
349}
350
351static unsigned long clk_core_get_rate_nolock(struct clk_core *core)
352{
353 unsigned long ret;
354
355 if (!core) {
356 ret = 0;
357 goto out;
358 }
359
360 ret = core->rate;
361
362 if (!core->num_parents)
363 goto out;
364
365 if (!core->parent)
366 ret = 0;
367
368out:
369 return ret;
370}
371
372unsigned long clk_hw_get_rate(const struct clk_hw *hw)
373{
374 return clk_core_get_rate_nolock(hw->core);
375}
376EXPORT_SYMBOL_GPL(clk_hw_get_rate);
377
378static unsigned long __clk_get_accuracy(struct clk_core *core)
379{
380 if (!core)
381 return 0;
382
383 return core->accuracy;
384}
385
386unsigned long __clk_get_flags(struct clk *clk)
387{
388 return !clk ? 0 : clk->core->flags;
389}
390EXPORT_SYMBOL_GPL(__clk_get_flags);
391
392unsigned long clk_hw_get_flags(const struct clk_hw *hw)
393{
394 return hw->core->flags;
395}
396EXPORT_SYMBOL_GPL(clk_hw_get_flags);
397
398bool clk_hw_is_prepared(const struct clk_hw *hw)
399{
400 return clk_core_is_prepared(hw->core);
401}
402
403bool clk_hw_rate_is_protected(const struct clk_hw *hw)
404{
405 return clk_core_rate_is_protected(hw->core);
406}
407
408bool clk_hw_is_enabled(const struct clk_hw *hw)
409{
410 return clk_core_is_enabled(hw->core);
411}
412
413bool __clk_is_enabled(struct clk *clk)
414{
415 if (!clk)
416 return false;
417
418 return clk_core_is_enabled(clk->core);
419}
420EXPORT_SYMBOL_GPL(__clk_is_enabled);
421
422static bool mux_is_better_rate(unsigned long rate, unsigned long now,
423 unsigned long best, unsigned long flags)
424{
425 if (flags & CLK_MUX_ROUND_CLOSEST)
426 return abs(now - rate) < abs(best - rate);
427
428 return now <= rate && now > best;
429}
430
431int clk_mux_determine_rate_flags(struct clk_hw *hw,
432 struct clk_rate_request *req,
433 unsigned long flags)
434{
435 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
436 int i, num_parents, ret;
437 unsigned long best = 0;
438 struct clk_rate_request parent_req = *req;
439
440 /* if NO_REPARENT flag set, pass through to current parent */
441 if (core->flags & CLK_SET_RATE_NO_REPARENT) {
442 parent = core->parent;
443 if (core->flags & CLK_SET_RATE_PARENT) {
444 ret = __clk_determine_rate(parent ? parent->hw : NULL,
445 &parent_req);
446 if (ret)
447 return ret;
448
449 best = parent_req.rate;
450 } else if (parent) {
451 best = clk_core_get_rate_nolock(parent);
452 } else {
453 best = clk_core_get_rate_nolock(core);
454 }
455
456 goto out;
457 }
458
459 /* find the parent that can provide the fastest rate <= rate */
460 num_parents = core->num_parents;
461 for (i = 0; i < num_parents; i++) {
462 parent = clk_core_get_parent_by_index(core, i);
463 if (!parent)
464 continue;
465
466 if (core->flags & CLK_SET_RATE_PARENT) {
467 parent_req = *req;
468 ret = __clk_determine_rate(parent->hw, &parent_req);
469 if (ret)
470 continue;
471 } else {
472 parent_req.rate = clk_core_get_rate_nolock(parent);
473 }
474
475 if (mux_is_better_rate(req->rate, parent_req.rate,
476 best, flags)) {
477 best_parent = parent;
478 best = parent_req.rate;
479 }
480 }
481
482 if (!best_parent)
483 return -EINVAL;
484
485out:
486 if (best_parent)
487 req->best_parent_hw = best_parent->hw;
488 req->best_parent_rate = best;
489 req->rate = best;
490
491 return 0;
492}
493EXPORT_SYMBOL_GPL(clk_mux_determine_rate_flags);
494
495struct clk *__clk_lookup(const char *name)
496{
497 struct clk_core *core = clk_core_lookup(name);
498
499 return !core ? NULL : core->hw->clk;
500}
501
502static void clk_core_get_boundaries(struct clk_core *core,
503 unsigned long *min_rate,
504 unsigned long *max_rate)
505{
506 struct clk *clk_user;
507
508 *min_rate = core->min_rate;
509 *max_rate = core->max_rate;
510
511 hlist_for_each_entry(clk_user, &core->clks, clks_node)
512 *min_rate = max(*min_rate, clk_user->min_rate);
513
514 hlist_for_each_entry(clk_user, &core->clks, clks_node)
515 *max_rate = min(*max_rate, clk_user->max_rate);
516}
517
518void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate,
519 unsigned long max_rate)
520{
521 hw->core->min_rate = min_rate;
522 hw->core->max_rate = max_rate;
523}
524EXPORT_SYMBOL_GPL(clk_hw_set_rate_range);
525
526/*
527 * Helper for finding best parent to provide a given frequency. This can be used
528 * directly as a determine_rate callback (e.g. for a mux), or from a more
529 * complex clock that may combine a mux with other operations.
530 */
531int __clk_mux_determine_rate(struct clk_hw *hw,
532 struct clk_rate_request *req)
533{
534 return clk_mux_determine_rate_flags(hw, req, 0);
535}
536EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
537
538int __clk_mux_determine_rate_closest(struct clk_hw *hw,
539 struct clk_rate_request *req)
540{
541 return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST);
542}
543EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest);
544
545/*** clk api ***/
546
547static void clk_core_rate_unprotect(struct clk_core *core)
548{
549 lockdep_assert_held(&prepare_lock);
550
551 if (!core)
552 return;
553
554 if (WARN(core->protect_count == 0,
555 "%s already unprotected\n", core->name))
556 return;
557
558 if (--core->protect_count > 0)
559 return;
560
561 clk_core_rate_unprotect(core->parent);
562}
563
564static int clk_core_rate_nuke_protect(struct clk_core *core)
565{
566 int ret;
567
568 lockdep_assert_held(&prepare_lock);
569
570 if (!core)
571 return -EINVAL;
572
573 if (core->protect_count == 0)
574 return 0;
575
576 ret = core->protect_count;
577 core->protect_count = 1;
578 clk_core_rate_unprotect(core);
579
580 return ret;
581}
582
583/**
584 * clk_rate_exclusive_put - release exclusivity over clock rate control
585 * @clk: the clk over which the exclusivity is released
586 *
587 * clk_rate_exclusive_put() completes a critical section during which a clock
588 * consumer cannot tolerate any other consumer making any operation on the
589 * clock which could result in a rate change or rate glitch. Exclusive clocks
590 * cannot have their rate changed, either directly or indirectly due to changes
591 * further up the parent chain of clocks. As a result, clocks up parent chain
592 * also get under exclusive control of the calling consumer.
593 *
594 * If exlusivity is claimed more than once on clock, even by the same consumer,
595 * the rate effectively gets locked as exclusivity can't be preempted.
596 *
597 * Calls to clk_rate_exclusive_put() must be balanced with calls to
598 * clk_rate_exclusive_get(). Calls to this function may sleep, and do not return
599 * error status.
600 */
601void clk_rate_exclusive_put(struct clk *clk)
602{
603 if (!clk)
604 return;
605
606 clk_prepare_lock();
607
608 /*
609 * if there is something wrong with this consumer protect count, stop
610 * here before messing with the provider
611 */
612 if (WARN_ON(clk->exclusive_count <= 0))
613 goto out;
614
615 clk_core_rate_unprotect(clk->core);
616 clk->exclusive_count--;
617out:
618 clk_prepare_unlock();
619}
620EXPORT_SYMBOL_GPL(clk_rate_exclusive_put);
621
622static void clk_core_rate_protect(struct clk_core *core)
623{
624 lockdep_assert_held(&prepare_lock);
625
626 if (!core)
627 return;
628
629 if (core->protect_count == 0)
630 clk_core_rate_protect(core->parent);
631
632 core->protect_count++;
633}
634
635static void clk_core_rate_restore_protect(struct clk_core *core, int count)
636{
637 lockdep_assert_held(&prepare_lock);
638
639 if (!core)
640 return;
641
642 if (count == 0)
643 return;
644
645 clk_core_rate_protect(core);
646 core->protect_count = count;
647}
648
649/**
650 * clk_rate_exclusive_get - get exclusivity over the clk rate control
651 * @clk: the clk over which the exclusity of rate control is requested
652 *
653 * clk_rate_exlusive_get() begins a critical section during which a clock
654 * consumer cannot tolerate any other consumer making any operation on the
655 * clock which could result in a rate change or rate glitch. Exclusive clocks
656 * cannot have their rate changed, either directly or indirectly due to changes
657 * further up the parent chain of clocks. As a result, clocks up parent chain
658 * also get under exclusive control of the calling consumer.
659 *
660 * If exlusivity is claimed more than once on clock, even by the same consumer,
661 * the rate effectively gets locked as exclusivity can't be preempted.
662 *
663 * Calls to clk_rate_exclusive_get() should be balanced with calls to
664 * clk_rate_exclusive_put(). Calls to this function may sleep.
665 * Returns 0 on success, -EERROR otherwise
666 */
667int clk_rate_exclusive_get(struct clk *clk)
668{
669 if (!clk)
670 return 0;
671
672 clk_prepare_lock();
673 clk_core_rate_protect(clk->core);
674 clk->exclusive_count++;
675 clk_prepare_unlock();
676
677 return 0;
678}
679EXPORT_SYMBOL_GPL(clk_rate_exclusive_get);
680
681static void clk_core_unprepare(struct clk_core *core)
682{
683 lockdep_assert_held(&prepare_lock);
684
685 if (!core)
686 return;
687
688 if (WARN(core->prepare_count == 0,
689 "%s already unprepared\n", core->name))
690 return;
691
692 if (WARN(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL,
693 "Unpreparing critical %s\n", core->name))
694 return;
695
696 if (core->flags & CLK_SET_RATE_GATE)
697 clk_core_rate_unprotect(core);
698
699 if (--core->prepare_count > 0)
700 return;
701
702 WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name);
703
704 trace_clk_unprepare(core);
705
706 if (core->ops->unprepare)
707 core->ops->unprepare(core->hw);
708
709 clk_pm_runtime_put(core);
710
711 trace_clk_unprepare_complete(core);
712 clk_core_unprepare(core->parent);
713}
714
715static void clk_core_unprepare_lock(struct clk_core *core)
716{
717 clk_prepare_lock();
718 clk_core_unprepare(core);
719 clk_prepare_unlock();
720}
721
722/**
723 * clk_unprepare - undo preparation of a clock source
724 * @clk: the clk being unprepared
725 *
726 * clk_unprepare may sleep, which differentiates it from clk_disable. In a
727 * simple case, clk_unprepare can be used instead of clk_disable to gate a clk
728 * if the operation may sleep. One example is a clk which is accessed over
729 * I2c. In the complex case a clk gate operation may require a fast and a slow
730 * part. It is this reason that clk_unprepare and clk_disable are not mutually
731 * exclusive. In fact clk_disable must be called before clk_unprepare.
732 */
733void clk_unprepare(struct clk *clk)
734{
735 if (IS_ERR_OR_NULL(clk))
736 return;
737
738 clk_core_unprepare_lock(clk->core);
739}
740EXPORT_SYMBOL_GPL(clk_unprepare);
741
742static int clk_core_prepare(struct clk_core *core)
743{
744 int ret = 0;
745
746 lockdep_assert_held(&prepare_lock);
747
748 if (!core)
749 return 0;
750
751 if (core->prepare_count == 0) {
752 ret = clk_pm_runtime_get(core);
753 if (ret)
754 return ret;
755
756 ret = clk_core_prepare(core->parent);
757 if (ret)
758 goto runtime_put;
759
760 trace_clk_prepare(core);
761
762 if (core->ops->prepare)
763 ret = core->ops->prepare(core->hw);
764
765 trace_clk_prepare_complete(core);
766
767 if (ret)
768 goto unprepare;
769 }
770
771 core->prepare_count++;
772
773 /*
774 * CLK_SET_RATE_GATE is a special case of clock protection
775 * Instead of a consumer claiming exclusive rate control, it is
776 * actually the provider which prevents any consumer from making any
777 * operation which could result in a rate change or rate glitch while
778 * the clock is prepared.
779 */
780 if (core->flags & CLK_SET_RATE_GATE)
781 clk_core_rate_protect(core);
782
783 return 0;
784unprepare:
785 clk_core_unprepare(core->parent);
786runtime_put:
787 clk_pm_runtime_put(core);
788 return ret;
789}
790
791static int clk_core_prepare_lock(struct clk_core *core)
792{
793 int ret;
794
795 clk_prepare_lock();
796 ret = clk_core_prepare(core);
797 clk_prepare_unlock();
798
799 return ret;
800}
801
802/**
803 * clk_prepare - prepare a clock source
804 * @clk: the clk being prepared
805 *
806 * clk_prepare may sleep, which differentiates it from clk_enable. In a simple
807 * case, clk_prepare can be used instead of clk_enable to ungate a clk if the
808 * operation may sleep. One example is a clk which is accessed over I2c. In
809 * the complex case a clk ungate operation may require a fast and a slow part.
810 * It is this reason that clk_prepare and clk_enable are not mutually
811 * exclusive. In fact clk_prepare must be called before clk_enable.
812 * Returns 0 on success, -EERROR otherwise.
813 */
814int clk_prepare(struct clk *clk)
815{
816 if (!clk)
817 return 0;
818
819 return clk_core_prepare_lock(clk->core);
820}
821EXPORT_SYMBOL_GPL(clk_prepare);
822
823static void clk_core_disable(struct clk_core *core)
824{
825 lockdep_assert_held(&enable_lock);
826
827 if (!core)
828 return;
829
830 if (WARN(core->enable_count == 0, "%s already disabled\n", core->name))
831 return;
832
833 if (WARN(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL,
834 "Disabling critical %s\n", core->name))
835 return;
836
837 if (--core->enable_count > 0)
838 return;
839
840 trace_clk_disable_rcuidle(core);
841
842 if (core->ops->disable)
843 core->ops->disable(core->hw);
844
845 trace_clk_disable_complete_rcuidle(core);
846
847 clk_core_disable(core->parent);
848}
849
850static void clk_core_disable_lock(struct clk_core *core)
851{
852 unsigned long flags;
853
854 flags = clk_enable_lock();
855 clk_core_disable(core);
856 clk_enable_unlock(flags);
857}
858
859/**
860 * clk_disable - gate a clock
861 * @clk: the clk being gated
862 *
863 * clk_disable must not sleep, which differentiates it from clk_unprepare. In
864 * a simple case, clk_disable can be used instead of clk_unprepare to gate a
865 * clk if the operation is fast and will never sleep. One example is a
866 * SoC-internal clk which is controlled via simple register writes. In the
867 * complex case a clk gate operation may require a fast and a slow part. It is
868 * this reason that clk_unprepare and clk_disable are not mutually exclusive.
869 * In fact clk_disable must be called before clk_unprepare.
870 */
871void clk_disable(struct clk *clk)
872{
873 if (IS_ERR_OR_NULL(clk))
874 return;
875
876 clk_core_disable_lock(clk->core);
877}
878EXPORT_SYMBOL_GPL(clk_disable);
879
880static int clk_core_enable(struct clk_core *core)
881{
882 int ret = 0;
883
884 lockdep_assert_held(&enable_lock);
885
886 if (!core)
887 return 0;
888
889 if (WARN(core->prepare_count == 0,
890 "Enabling unprepared %s\n", core->name))
891 return -ESHUTDOWN;
892
893 if (core->enable_count == 0) {
894 ret = clk_core_enable(core->parent);
895
896 if (ret)
897 return ret;
898
899 trace_clk_enable_rcuidle(core);
900
901 if (core->ops->enable)
902 ret = core->ops->enable(core->hw);
903
904 trace_clk_enable_complete_rcuidle(core);
905
906 if (ret) {
907 clk_core_disable(core->parent);
908 return ret;
909 }
910 }
911
912 core->enable_count++;
913 return 0;
914}
915
916static int clk_core_enable_lock(struct clk_core *core)
917{
918 unsigned long flags;
919 int ret;
920
921 flags = clk_enable_lock();
922 ret = clk_core_enable(core);
923 clk_enable_unlock(flags);
924
925 return ret;
926}
927
928/**
929 * clk_enable - ungate a clock
930 * @clk: the clk being ungated
931 *
932 * clk_enable must not sleep, which differentiates it from clk_prepare. In a
933 * simple case, clk_enable can be used instead of clk_prepare to ungate a clk
934 * if the operation will never sleep. One example is a SoC-internal clk which
935 * is controlled via simple register writes. In the complex case a clk ungate
936 * operation may require a fast and a slow part. It is this reason that
937 * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare
938 * must be called before clk_enable. Returns 0 on success, -EERROR
939 * otherwise.
940 */
941int clk_enable(struct clk *clk)
942{
943 if (!clk)
944 return 0;
945
946 return clk_core_enable_lock(clk->core);
947}
948EXPORT_SYMBOL_GPL(clk_enable);
949
950static int clk_core_prepare_enable(struct clk_core *core)
951{
952 int ret;
953
954 ret = clk_core_prepare_lock(core);
955 if (ret)
956 return ret;
957
958 ret = clk_core_enable_lock(core);
959 if (ret)
960 clk_core_unprepare_lock(core);
961
962 return ret;
963}
964
965static void clk_core_disable_unprepare(struct clk_core *core)
966{
967 clk_core_disable_lock(core);
968 clk_core_unprepare_lock(core);
969}
970
971static void clk_unprepare_unused_subtree(struct clk_core *core)
972{
973 struct clk_core *child;
974
975 lockdep_assert_held(&prepare_lock);
976
977 hlist_for_each_entry(child, &core->children, child_node)
978 clk_unprepare_unused_subtree(child);
979
980 if (dev_has_sync_state(core->dev) &&
981 !(core->flags & CLK_DONT_HOLD_STATE))
982 return;
983
984 if (core->prepare_count)
985 return;
986
987 if (core->flags & CLK_IGNORE_UNUSED)
988 return;
989
990 if (clk_pm_runtime_get(core))
991 return;
992
993 if (clk_core_is_prepared(core)) {
994 trace_clk_unprepare(core);
995 if (core->ops->unprepare_unused)
996 core->ops->unprepare_unused(core->hw);
997 else if (core->ops->unprepare)
998 core->ops->unprepare(core->hw);
999 trace_clk_unprepare_complete(core);
1000 }
1001
1002 clk_pm_runtime_put(core);
1003}
1004
1005static void clk_disable_unused_subtree(struct clk_core *core)
1006{
1007 struct clk_core *child;
1008 unsigned long flags;
1009
1010 lockdep_assert_held(&prepare_lock);
1011
1012 hlist_for_each_entry(child, &core->children, child_node)
1013 clk_disable_unused_subtree(child);
1014
1015 if (dev_has_sync_state(core->dev) &&
1016 !(core->flags & CLK_DONT_HOLD_STATE))
1017 return;
1018
1019 if (core->flags & CLK_OPS_PARENT_ENABLE)
1020 clk_core_prepare_enable(core->parent);
1021
1022 if (clk_pm_runtime_get(core))
1023 goto unprepare_out;
1024
1025 flags = clk_enable_lock();
1026
1027 if (core->enable_count)
1028 goto unlock_out;
1029
1030 if (core->flags & CLK_IGNORE_UNUSED)
1031 goto unlock_out;
1032
1033 /*
1034 * some gate clocks have special needs during the disable-unused
1035 * sequence. call .disable_unused if available, otherwise fall
1036 * back to .disable
1037 */
1038 if (clk_core_is_enabled(core)) {
1039 trace_clk_disable(core);
1040 if (core->ops->disable_unused)
1041 core->ops->disable_unused(core->hw);
1042 else if (core->ops->disable)
1043 core->ops->disable(core->hw);
1044 trace_clk_disable_complete(core);
1045 }
1046
1047unlock_out:
1048 clk_enable_unlock(flags);
1049 clk_pm_runtime_put(core);
1050unprepare_out:
1051 if (core->flags & CLK_OPS_PARENT_ENABLE)
1052 clk_core_disable_unprepare(core->parent);
1053}
1054
1055static bool clk_ignore_unused;
1056static int __init clk_ignore_unused_setup(char *__unused)
1057{
1058 clk_ignore_unused = true;
1059 return 1;
1060}
1061__setup("clk_ignore_unused", clk_ignore_unused_setup);
1062
1063static int clk_disable_unused(void)
1064{
1065 struct clk_core *core;
1066
1067 if (clk_ignore_unused) {
1068 pr_warn("clk: Not disabling unused clocks\n");
1069 return 0;
1070 }
1071
1072 clk_prepare_lock();
1073
1074 hlist_for_each_entry(core, &clk_root_list, child_node)
1075 clk_disable_unused_subtree(core);
1076
1077 hlist_for_each_entry(core, &clk_orphan_list, child_node)
1078 clk_disable_unused_subtree(core);
1079
1080 hlist_for_each_entry(core, &clk_root_list, child_node)
1081 clk_unprepare_unused_subtree(core);
1082
1083 hlist_for_each_entry(core, &clk_orphan_list, child_node)
1084 clk_unprepare_unused_subtree(core);
1085
1086 clk_prepare_unlock();
1087
1088 return 0;
1089}
1090late_initcall_sync(clk_disable_unused);
1091
1092static void clk_unprepare_disable_dev_subtree(struct clk_core *core,
1093 struct device *dev)
1094{
1095 struct clk_core *child;
1096
1097 lockdep_assert_held(&prepare_lock);
1098
1099 hlist_for_each_entry(child, &core->children, child_node)
1100 clk_unprepare_disable_dev_subtree(child, dev);
1101
1102 if (core->dev != dev || !core->need_sync)
1103 return;
1104
1105 clk_core_disable_unprepare(core);
1106}
1107
1108void clk_sync_state(struct device *dev)
1109{
1110 struct clk_core *core;
1111
1112 clk_prepare_lock();
1113
1114 hlist_for_each_entry(core, &clk_root_list, child_node)
1115 clk_unprepare_disable_dev_subtree(core, dev);
1116
1117 hlist_for_each_entry(core, &clk_orphan_list, child_node)
1118 clk_unprepare_disable_dev_subtree(core, dev);
1119
1120 clk_prepare_unlock();
1121}
1122EXPORT_SYMBOL_GPL(clk_sync_state);
1123
1124static int clk_core_determine_round_nolock(struct clk_core *core,
1125 struct clk_rate_request *req)
1126{
1127 long rate;
1128
1129 lockdep_assert_held(&prepare_lock);
1130
1131 if (!core)
1132 return 0;
1133
1134 /*
1135 * At this point, core protection will be disabled if
1136 * - if the provider is not protected at all
1137 * - if the calling consumer is the only one which has exclusivity
1138 * over the provider
1139 */
1140 if (clk_core_rate_is_protected(core)) {
1141 req->rate = core->rate;
1142 } else if (core->ops->determine_rate) {
1143 return core->ops->determine_rate(core->hw, req);
1144 } else if (core->ops->round_rate) {
1145 rate = core->ops->round_rate(core->hw, req->rate,
1146 &req->best_parent_rate);
1147 if (rate < 0)
1148 return rate;
1149
1150 req->rate = rate;
1151 } else {
1152 return -EINVAL;
1153 }
1154
1155 return 0;
1156}
1157
1158static void clk_core_init_rate_req(struct clk_core * const core,
1159 struct clk_rate_request *req)
1160{
1161 struct clk_core *parent;
1162
1163 if (WARN_ON(!core || !req))
1164 return;
1165
1166 parent = core->parent;
1167 if (parent) {
1168 req->best_parent_hw = parent->hw;
1169 req->best_parent_rate = parent->rate;
1170 } else {
1171 req->best_parent_hw = NULL;
1172 req->best_parent_rate = 0;
1173 }
1174}
1175
1176static bool clk_core_can_round(struct clk_core * const core)
1177{
1178 if (core->ops->determine_rate || core->ops->round_rate)
1179 return true;
1180
1181 return false;
1182}
1183
1184static int clk_core_round_rate_nolock(struct clk_core *core,
1185 struct clk_rate_request *req)
1186{
1187 lockdep_assert_held(&prepare_lock);
1188
1189 if (!core) {
1190 req->rate = 0;
1191 return 0;
1192 }
1193
1194 clk_core_init_rate_req(core, req);
1195
1196 if (clk_core_can_round(core))
1197 return clk_core_determine_round_nolock(core, req);
1198 else if (core->flags & CLK_SET_RATE_PARENT)
1199 return clk_core_round_rate_nolock(core->parent, req);
1200
1201 req->rate = core->rate;
1202 return 0;
1203}
1204
1205/**
1206 * __clk_determine_rate - get the closest rate actually supported by a clock
1207 * @hw: determine the rate of this clock
1208 * @req: target rate request
1209 *
1210 * Useful for clk_ops such as .set_rate and .determine_rate.
1211 */
1212int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
1213{
1214 if (!hw) {
1215 req->rate = 0;
1216 return 0;
1217 }
1218
1219 return clk_core_round_rate_nolock(hw->core, req);
1220}
1221EXPORT_SYMBOL_GPL(__clk_determine_rate);
1222
1223unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate)
1224{
1225 int ret;
1226 struct clk_rate_request req;
1227
1228 clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate);
1229 req.rate = rate;
1230
1231 ret = clk_core_round_rate_nolock(hw->core, &req);
1232 if (ret)
1233 return 0;
1234
1235 return req.rate;
1236}
1237EXPORT_SYMBOL_GPL(clk_hw_round_rate);
1238
1239/**
1240 * clk_round_rate - round the given rate for a clk
1241 * @clk: the clk for which we are rounding a rate
1242 * @rate: the rate which is to be rounded
1243 *
1244 * Takes in a rate as input and rounds it to a rate that the clk can actually
1245 * use which is then returned. If clk doesn't support round_rate operation
1246 * then the parent rate is returned.
1247 */
1248long clk_round_rate(struct clk *clk, unsigned long rate)
1249{
1250 struct clk_rate_request req;
1251 int ret;
1252
1253 if (!clk)
1254 return 0;
1255
1256 clk_prepare_lock();
1257
1258 if (clk->exclusive_count)
1259 clk_core_rate_unprotect(clk->core);
1260
1261 clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate);
1262 req.rate = rate;
1263
1264 ret = clk_core_round_rate_nolock(clk->core, &req);
1265
1266 if (clk->exclusive_count)
1267 clk_core_rate_protect(clk->core);
1268
1269 clk_prepare_unlock();
1270
1271 if (ret)
1272 return ret;
1273
1274 return req.rate;
1275}
1276EXPORT_SYMBOL_GPL(clk_round_rate);
1277
1278/**
1279 * __clk_notify - call clk notifier chain
1280 * @core: clk that is changing rate
1281 * @msg: clk notifier type (see include/linux/clk.h)
1282 * @old_rate: old clk rate
1283 * @new_rate: new clk rate
1284 *
1285 * Triggers a notifier call chain on the clk rate-change notification
1286 * for 'clk'. Passes a pointer to the struct clk and the previous
1287 * and current rates to the notifier callback. Intended to be called by
1288 * internal clock code only. Returns NOTIFY_DONE from the last driver
1289 * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if
1290 * a driver returns that.
1291 */
1292static int __clk_notify(struct clk_core *core, unsigned long msg,
1293 unsigned long old_rate, unsigned long new_rate)
1294{
1295 struct clk_notifier *cn;
1296 struct clk_notifier_data cnd;
1297 int ret = NOTIFY_DONE;
1298
1299 cnd.old_rate = old_rate;
1300 cnd.new_rate = new_rate;
1301
1302 list_for_each_entry(cn, &clk_notifier_list, node) {
1303 if (cn->clk->core == core) {
1304 cnd.clk = cn->clk;
1305 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
1306 &cnd);
1307 if (ret & NOTIFY_STOP_MASK)
1308 return ret;
1309 }
1310 }
1311
1312 return ret;
1313}
1314
1315/**
1316 * __clk_recalc_accuracies
1317 * @core: first clk in the subtree
1318 *
1319 * Walks the subtree of clks starting with clk and recalculates accuracies as
1320 * it goes. Note that if a clk does not implement the .recalc_accuracy
1321 * callback then it is assumed that the clock will take on the accuracy of its
1322 * parent.
1323 */
1324static void __clk_recalc_accuracies(struct clk_core *core)
1325{
1326 unsigned long parent_accuracy = 0;
1327 struct clk_core *child;
1328
1329 lockdep_assert_held(&prepare_lock);
1330
1331 if (core->parent)
1332 parent_accuracy = core->parent->accuracy;
1333
1334 if (core->ops->recalc_accuracy)
1335 core->accuracy = core->ops->recalc_accuracy(core->hw,
1336 parent_accuracy);
1337 else
1338 core->accuracy = parent_accuracy;
1339
1340 hlist_for_each_entry(child, &core->children, child_node)
1341 __clk_recalc_accuracies(child);
1342}
1343
1344static long clk_core_get_accuracy(struct clk_core *core)
1345{
1346 unsigned long accuracy;
1347
1348 clk_prepare_lock();
1349 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
1350 __clk_recalc_accuracies(core);
1351
1352 accuracy = __clk_get_accuracy(core);
1353 clk_prepare_unlock();
1354
1355 return accuracy;
1356}
1357
1358/**
1359 * clk_get_accuracy - return the accuracy of clk
1360 * @clk: the clk whose accuracy is being returned
1361 *
1362 * Simply returns the cached accuracy of the clk, unless
1363 * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be
1364 * issued.
1365 * If clk is NULL then returns 0.
1366 */
1367long clk_get_accuracy(struct clk *clk)
1368{
1369 if (!clk)
1370 return 0;
1371
1372 return clk_core_get_accuracy(clk->core);
1373}
1374EXPORT_SYMBOL_GPL(clk_get_accuracy);
1375
1376static unsigned long clk_recalc(struct clk_core *core,
1377 unsigned long parent_rate)
1378{
1379 unsigned long rate = parent_rate;
1380
1381 if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) {
1382 rate = core->ops->recalc_rate(core->hw, parent_rate);
1383 clk_pm_runtime_put(core);
1384 }
1385 return rate;
1386}
1387
1388/**
1389 * __clk_recalc_rates
1390 * @core: first clk in the subtree
1391 * @msg: notification type (see include/linux/clk.h)
1392 *
1393 * Walks the subtree of clks starting with clk and recalculates rates as it
1394 * goes. Note that if a clk does not implement the .recalc_rate callback then
1395 * it is assumed that the clock will take on the rate of its parent.
1396 *
1397 * clk_recalc_rates also propagates the POST_RATE_CHANGE notification,
1398 * if necessary.
1399 */
1400static void __clk_recalc_rates(struct clk_core *core, unsigned long msg)
1401{
1402 unsigned long old_rate;
1403 unsigned long parent_rate = 0;
1404 struct clk_core *child;
1405
1406 lockdep_assert_held(&prepare_lock);
1407
1408 old_rate = core->rate;
1409
1410 if (core->parent)
1411 parent_rate = core->parent->rate;
1412
1413 core->rate = clk_recalc(core, parent_rate);
1414
1415 /*
1416 * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE
1417 * & ABORT_RATE_CHANGE notifiers
1418 */
1419 if (core->notifier_count && msg)
1420 __clk_notify(core, msg, old_rate, core->rate);
1421
1422 hlist_for_each_entry(child, &core->children, child_node)
1423 __clk_recalc_rates(child, msg);
1424}
1425
1426static unsigned long clk_core_get_rate(struct clk_core *core)
1427{
1428 unsigned long rate;
1429
1430 clk_prepare_lock();
1431
1432 if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1433 __clk_recalc_rates(core, 0);
1434
1435 rate = clk_core_get_rate_nolock(core);
1436 clk_prepare_unlock();
1437
1438 return rate;
1439}
1440
1441/**
1442 * clk_get_rate - return the rate of clk
1443 * @clk: the clk whose rate is being returned
1444 *
1445 * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
1446 * is set, which means a recalc_rate will be issued.
1447 * If clk is NULL then returns 0.
1448 */
1449unsigned long clk_get_rate(struct clk *clk)
1450{
1451 if (!clk)
1452 return 0;
1453
1454 return clk_core_get_rate(clk->core);
1455}
1456EXPORT_SYMBOL_GPL(clk_get_rate);
1457
1458static int clk_fetch_parent_index(struct clk_core *core,
1459 struct clk_core *parent)
1460{
1461 int i;
1462
1463 if (!parent)
1464 return -EINVAL;
1465
1466 for (i = 0; i < core->num_parents; i++)
1467 if (clk_core_get_parent_by_index(core, i) == parent)
1468 return i;
1469
1470 return -EINVAL;
1471}
1472
1473static void clk_core_hold_state(struct clk_core *core)
1474{
1475 if (core->need_sync || !core->boot_enabled)
1476 return;
1477
1478 if (core->orphan || !dev_has_sync_state(core->dev))
1479 return;
1480
1481 if (core->flags & CLK_DONT_HOLD_STATE)
1482 return;
1483
1484 core->need_sync = !clk_core_prepare_enable(core);
1485}
1486
1487static void __clk_core_update_orphan_hold_state(struct clk_core *core)
1488{
1489 struct clk_core *child;
1490
1491 if (core->orphan)
1492 return;
1493
1494 clk_core_hold_state(core);
1495
1496 hlist_for_each_entry(child, &core->children, child_node)
1497 __clk_core_update_orphan_hold_state(child);
1498}
1499
1500/*
1501 * Update the orphan status of @core and all its children.
1502 */
1503static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan)
1504{
1505 struct clk_core *child;
1506
1507 core->orphan = is_orphan;
1508
1509 hlist_for_each_entry(child, &core->children, child_node)
1510 clk_core_update_orphan_status(child, is_orphan);
1511}
1512
1513static void clk_reparent(struct clk_core *core, struct clk_core *new_parent)
1514{
1515 bool was_orphan = core->orphan;
1516
1517 hlist_del(&core->child_node);
1518
1519 if (new_parent) {
1520 bool becomes_orphan = new_parent->orphan;
1521
1522 /* avoid duplicate POST_RATE_CHANGE notifications */
1523 if (new_parent->new_child == core)
1524 new_parent->new_child = NULL;
1525
1526 hlist_add_head(&core->child_node, &new_parent->children);
1527
1528 if (was_orphan != becomes_orphan)
1529 clk_core_update_orphan_status(core, becomes_orphan);
1530 } else {
1531 hlist_add_head(&core->child_node, &clk_orphan_list);
1532 if (!was_orphan)
1533 clk_core_update_orphan_status(core, true);
1534 }
1535
1536 core->parent = new_parent;
1537}
1538
1539static struct clk_core *__clk_set_parent_before(struct clk_core *core,
1540 struct clk_core *parent)
1541{
1542 unsigned long flags;
1543 struct clk_core *old_parent = core->parent;
1544
1545 /*
1546 * 1. enable parents for CLK_OPS_PARENT_ENABLE clock
1547 *
1548 * 2. Migrate prepare state between parents and prevent race with
1549 * clk_enable().
1550 *
1551 * If the clock is not prepared, then a race with
1552 * clk_enable/disable() is impossible since we already have the
1553 * prepare lock (future calls to clk_enable() need to be preceded by
1554 * a clk_prepare()).
1555 *
1556 * If the clock is prepared, migrate the prepared state to the new
1557 * parent and also protect against a race with clk_enable() by
1558 * forcing the clock and the new parent on. This ensures that all
1559 * future calls to clk_enable() are practically NOPs with respect to
1560 * hardware and software states.
1561 *
1562 * See also: Comment for clk_set_parent() below.
1563 */
1564
1565 /* enable old_parent & parent if CLK_OPS_PARENT_ENABLE is set */
1566 if (core->flags & CLK_OPS_PARENT_ENABLE) {
1567 clk_core_prepare_enable(old_parent);
1568 clk_core_prepare_enable(parent);
1569 }
1570
1571 /* migrate prepare count if > 0 */
1572 if (core->prepare_count) {
1573 clk_core_prepare_enable(parent);
1574 clk_core_enable_lock(core);
1575 }
1576
1577 /* update the clk tree topology */
1578 flags = clk_enable_lock();
1579 clk_reparent(core, parent);
1580 clk_enable_unlock(flags);
1581
1582 return old_parent;
1583}
1584
1585static void __clk_set_parent_after(struct clk_core *core,
1586 struct clk_core *parent,
1587 struct clk_core *old_parent)
1588{
1589 /*
1590 * Finish the migration of prepare state and undo the changes done
1591 * for preventing a race with clk_enable().
1592 */
1593 if (core->prepare_count) {
1594 clk_core_disable_lock(core);
1595 clk_core_disable_unprepare(old_parent);
1596 }
1597
1598 /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */
1599 if (core->flags & CLK_OPS_PARENT_ENABLE) {
1600 clk_core_disable_unprepare(parent);
1601 clk_core_disable_unprepare(old_parent);
1602 }
1603}
1604
1605static int __clk_set_parent(struct clk_core *core, struct clk_core *parent,
1606 u8 p_index)
1607{
1608 unsigned long flags;
1609 int ret = 0;
1610 struct clk_core *old_parent;
1611
1612 old_parent = __clk_set_parent_before(core, parent);
1613
1614 trace_clk_set_parent(core, parent);
1615
1616 /* change clock input source */
1617 if (parent && core->ops->set_parent)
1618 ret = core->ops->set_parent(core->hw, p_index);
1619
1620 trace_clk_set_parent_complete(core, parent);
1621
1622 if (ret) {
1623 flags = clk_enable_lock();
1624 clk_reparent(core, old_parent);
1625 clk_enable_unlock(flags);
1626 __clk_set_parent_after(core, old_parent, parent);
1627
1628 return ret;
1629 }
1630
1631 __clk_set_parent_after(core, parent, old_parent);
1632
1633 return 0;
1634}
1635
1636/**
1637 * __clk_speculate_rates
1638 * @core: first clk in the subtree
1639 * @parent_rate: the "future" rate of clk's parent
1640 *
1641 * Walks the subtree of clks starting with clk, speculating rates as it
1642 * goes and firing off PRE_RATE_CHANGE notifications as necessary.
1643 *
1644 * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending
1645 * pre-rate change notifications and returns early if no clks in the
1646 * subtree have subscribed to the notifications. Note that if a clk does not
1647 * implement the .recalc_rate callback then it is assumed that the clock will
1648 * take on the rate of its parent.
1649 */
1650static int __clk_speculate_rates(struct clk_core *core,
1651 unsigned long parent_rate)
1652{
1653 struct clk_core *child;
1654 unsigned long new_rate;
1655 int ret = NOTIFY_DONE;
1656
1657 lockdep_assert_held(&prepare_lock);
1658
1659 new_rate = clk_recalc(core, parent_rate);
1660
1661 /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */
1662 if (core->notifier_count)
1663 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
1664
1665 if (ret & NOTIFY_STOP_MASK) {
1666 pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n",
1667 __func__, core->name, ret);
1668 goto out;
1669 }
1670
1671 hlist_for_each_entry(child, &core->children, child_node) {
1672 ret = __clk_speculate_rates(child, new_rate);
1673 if (ret & NOTIFY_STOP_MASK)
1674 break;
1675 }
1676
1677out:
1678 return ret;
1679}
1680
1681static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate,
1682 struct clk_core *new_parent, u8 p_index)
1683{
1684 struct clk_core *child;
1685
1686 core->new_rate = new_rate;
1687 core->new_parent = new_parent;
1688 core->new_parent_index = p_index;
1689 /* include clk in new parent's PRE_RATE_CHANGE notifications */
1690 core->new_child = NULL;
1691 if (new_parent && new_parent != core->parent)
1692 new_parent->new_child = core;
1693
1694 hlist_for_each_entry(child, &core->children, child_node) {
1695 child->new_rate = clk_recalc(child, new_rate);
1696 clk_calc_subtree(child, child->new_rate, NULL, 0);
1697 }
1698}
1699
1700/*
1701 * calculate the new rates returning the topmost clock that has to be
1702 * changed.
1703 */
1704static struct clk_core *clk_calc_new_rates(struct clk_core *core,
1705 unsigned long rate)
1706{
1707 struct clk_core *top = core;
1708 struct clk_core *old_parent, *parent;
1709 unsigned long best_parent_rate = 0;
1710 unsigned long new_rate;
1711 unsigned long min_rate;
1712 unsigned long max_rate;
1713 int p_index = 0;
1714 long ret;
1715
1716 /* sanity */
1717 if (IS_ERR_OR_NULL(core))
1718 return NULL;
1719
1720 /* save parent rate, if it exists */
1721 parent = old_parent = core->parent;
1722 if (parent)
1723 best_parent_rate = parent->rate;
1724
1725 clk_core_get_boundaries(core, &min_rate, &max_rate);
1726
1727 /* find the closest rate and parent clk/rate */
1728 if (clk_core_can_round(core)) {
1729 struct clk_rate_request req;
1730
1731 req.rate = rate;
1732 req.min_rate = min_rate;
1733 req.max_rate = max_rate;
1734
1735 clk_core_init_rate_req(core, &req);
1736
1737 ret = clk_core_determine_round_nolock(core, &req);
1738 if (ret < 0)
1739 return NULL;
1740
1741 best_parent_rate = req.best_parent_rate;
1742 new_rate = req.rate;
1743 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
1744
1745 if (new_rate < min_rate || new_rate > max_rate)
1746 return NULL;
1747 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
1748 /* pass-through clock without adjustable parent */
1749 core->new_rate = core->rate;
1750 return NULL;
1751 } else {
1752 /* pass-through clock with adjustable parent */
1753 top = clk_calc_new_rates(parent, rate);
1754 new_rate = parent->new_rate;
1755 goto out;
1756 }
1757
1758 /* some clocks must be gated to change parent */
1759 if (parent != old_parent &&
1760 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1761 pr_debug("%s: %s not gated but wants to reparent\n",
1762 __func__, core->name);
1763 return NULL;
1764 }
1765
1766 /* try finding the new parent index */
1767 if (parent && core->num_parents > 1) {
1768 p_index = clk_fetch_parent_index(core, parent);
1769 if (p_index < 0) {
1770 pr_debug("%s: clk %s can not be parent of clk %s\n",
1771 __func__, parent->name, core->name);
1772 return NULL;
1773 }
1774 }
1775
1776 if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
1777 best_parent_rate != parent->rate)
1778 top = clk_calc_new_rates(parent, best_parent_rate);
1779
1780out:
1781 clk_calc_subtree(core, new_rate, parent, p_index);
1782
1783 return top;
1784}
1785
1786/*
1787 * Notify about rate changes in a subtree. Always walk down the whole tree
1788 * so that in case of an error we can walk down the whole tree again and
1789 * abort the change.
1790 */
1791static struct clk_core *clk_propagate_rate_change(struct clk_core *core,
1792 unsigned long event)
1793{
1794 struct clk_core *child, *tmp_clk, *fail_clk = NULL;
1795 int ret = NOTIFY_DONE;
1796
1797 if (core->rate == core->new_rate)
1798 return NULL;
1799
1800 if (core->notifier_count) {
1801 ret = __clk_notify(core, event, core->rate, core->new_rate);
1802 if (ret & NOTIFY_STOP_MASK)
1803 fail_clk = core;
1804 }
1805
1806 hlist_for_each_entry(child, &core->children, child_node) {
1807 /* Skip children who will be reparented to another clock */
1808 if (child->new_parent && child->new_parent != core)
1809 continue;
1810 tmp_clk = clk_propagate_rate_change(child, event);
1811 if (tmp_clk)
1812 fail_clk = tmp_clk;
1813 }
1814
1815 /* handle the new child who might not be in core->children yet */
1816 if (core->new_child) {
1817 tmp_clk = clk_propagate_rate_change(core->new_child, event);
1818 if (tmp_clk)
1819 fail_clk = tmp_clk;
1820 }
1821
1822 return fail_clk;
1823}
1824
1825/*
1826 * walk down a subtree and set the new rates notifying the rate
1827 * change on the way
1828 */
1829static void clk_change_rate(struct clk_core *core)
1830{
1831 struct clk_core *child;
1832 struct hlist_node *tmp;
1833 unsigned long old_rate;
1834 unsigned long best_parent_rate = 0;
1835 bool skip_set_rate = false;
1836 struct clk_core *old_parent;
1837 struct clk_core *parent = NULL;
1838
1839 old_rate = core->rate;
1840
1841 if (core->new_parent) {
1842 parent = core->new_parent;
1843 best_parent_rate = core->new_parent->rate;
1844 } else if (core->parent) {
1845 parent = core->parent;
1846 best_parent_rate = core->parent->rate;
1847 }
1848
1849 if (clk_pm_runtime_get(core))
1850 return;
1851
1852 if (core->flags & CLK_SET_RATE_UNGATE) {
1853 unsigned long flags;
1854
1855 clk_core_prepare(core);
1856 flags = clk_enable_lock();
1857 clk_core_enable(core);
1858 clk_enable_unlock(flags);
1859 }
1860
1861 if (core->new_parent && core->new_parent != core->parent) {
1862 old_parent = __clk_set_parent_before(core, core->new_parent);
1863 trace_clk_set_parent(core, core->new_parent);
1864
1865 if (core->ops->set_rate_and_parent) {
1866 skip_set_rate = true;
1867 core->ops->set_rate_and_parent(core->hw, core->new_rate,
1868 best_parent_rate,
1869 core->new_parent_index);
1870 } else if (core->ops->set_parent) {
1871 core->ops->set_parent(core->hw, core->new_parent_index);
1872 }
1873
1874 trace_clk_set_parent_complete(core, core->new_parent);
1875 __clk_set_parent_after(core, core->new_parent, old_parent);
1876 }
1877
1878 if (core->flags & CLK_OPS_PARENT_ENABLE)
1879 clk_core_prepare_enable(parent);
1880
1881 trace_clk_set_rate(core, core->new_rate);
1882
1883 if (!skip_set_rate && core->ops->set_rate)
1884 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
1885
1886 trace_clk_set_rate_complete(core, core->new_rate);
1887
1888 core->rate = clk_recalc(core, best_parent_rate);
1889
1890 if (core->flags & CLK_SET_RATE_UNGATE) {
1891 unsigned long flags;
1892
1893 flags = clk_enable_lock();
1894 clk_core_disable(core);
1895 clk_enable_unlock(flags);
1896 clk_core_unprepare(core);
1897 }
1898
1899 if (core->flags & CLK_OPS_PARENT_ENABLE)
1900 clk_core_disable_unprepare(parent);
1901
1902 if (core->notifier_count && old_rate != core->rate)
1903 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
1904
1905 if (core->flags & CLK_RECALC_NEW_RATES)
1906 (void)clk_calc_new_rates(core, core->new_rate);
1907
1908 /*
1909 * Use safe iteration, as change_rate can actually swap parents
1910 * for certain clock types.
1911 */
1912 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
1913 /* Skip children who will be reparented to another clock */
1914 if (child->new_parent && child->new_parent != core)
1915 continue;
1916 clk_change_rate(child);
1917 }
1918
1919 /* handle the new child who might not be in core->children yet */
1920 if (core->new_child)
1921 clk_change_rate(core->new_child);
1922
1923 clk_pm_runtime_put(core);
1924}
1925
1926static unsigned long clk_core_req_round_rate_nolock(struct clk_core *core,
1927 unsigned long req_rate)
1928{
1929 int ret, cnt;
1930 struct clk_rate_request req;
1931
1932 lockdep_assert_held(&prepare_lock);
1933
1934 if (!core)
1935 return 0;
1936
1937 /* simulate what the rate would be if it could be freely set */
1938 cnt = clk_core_rate_nuke_protect(core);
1939 if (cnt < 0)
1940 return cnt;
1941
1942 clk_core_get_boundaries(core, &req.min_rate, &req.max_rate);
1943 req.rate = req_rate;
1944
1945 ret = clk_core_round_rate_nolock(core, &req);
1946
1947 /* restore the protection */
1948 clk_core_rate_restore_protect(core, cnt);
1949
1950 return ret ? 0 : req.rate;
1951}
1952
1953static int clk_core_set_rate_nolock(struct clk_core *core,
1954 unsigned long req_rate)
1955{
1956 struct clk_core *top, *fail_clk;
1957 unsigned long rate;
1958 int ret = 0;
1959
1960 if (!core)
1961 return 0;
1962
1963 rate = clk_core_req_round_rate_nolock(core, req_rate);
1964
1965 /* bail early if nothing to do */
1966 if (rate == clk_core_get_rate_nolock(core))
1967 return 0;
1968
1969 /* fail on a direct rate set of a protected provider */
1970 if (clk_core_rate_is_protected(core))
1971 return -EBUSY;
1972
1973 /* calculate new rates and get the topmost changed clock */
1974 top = clk_calc_new_rates(core, req_rate);
1975 if (!top)
1976 return -EINVAL;
1977
1978 ret = clk_pm_runtime_get(core);
1979 if (ret)
1980 return ret;
1981
1982 /* notify that we are about to change rates */
1983 fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE);
1984 if (fail_clk) {
1985 pr_debug("%s: failed to set %s rate\n", __func__,
1986 fail_clk->name);
1987 clk_propagate_rate_change(top, ABORT_RATE_CHANGE);
1988 ret = -EBUSY;
1989 goto err;
1990 }
1991
1992 /* change the rates */
1993 clk_change_rate(top);
1994
1995 core->req_rate = req_rate;
1996err:
1997 clk_pm_runtime_put(core);
1998
1999 return ret;
2000}
2001
2002/**
2003 * clk_set_rate - specify a new rate for clk
2004 * @clk: the clk whose rate is being changed
2005 * @rate: the new rate for clk
2006 *
2007 * In the simplest case clk_set_rate will only adjust the rate of clk.
2008 *
2009 * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to
2010 * propagate up to clk's parent; whether or not this happens depends on the
2011 * outcome of clk's .round_rate implementation. If *parent_rate is unchanged
2012 * after calling .round_rate then upstream parent propagation is ignored. If
2013 * *parent_rate comes back with a new rate for clk's parent then we propagate
2014 * up to clk's parent and set its rate. Upward propagation will continue
2015 * until either a clk does not support the CLK_SET_RATE_PARENT flag or
2016 * .round_rate stops requesting changes to clk's parent_rate.
2017 *
2018 * Rate changes are accomplished via tree traversal that also recalculates the
2019 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
2020 *
2021 * Returns 0 on success, -EERROR otherwise.
2022 */
2023int clk_set_rate(struct clk *clk, unsigned long rate)
2024{
2025 int ret;
2026
2027 if (!clk)
2028 return 0;
2029
2030 /* prevent racing with updates to the clock topology */
2031 clk_prepare_lock();
2032
2033 if (clk->exclusive_count)
2034 clk_core_rate_unprotect(clk->core);
2035
2036 ret = clk_core_set_rate_nolock(clk->core, rate);
2037
2038 if (clk->exclusive_count)
2039 clk_core_rate_protect(clk->core);
2040
2041 clk_prepare_unlock();
2042
2043 return ret;
2044}
2045EXPORT_SYMBOL_GPL(clk_set_rate);
2046
2047/**
2048 * clk_set_rate_exclusive - specify a new rate get exclusive control
2049 * @clk: the clk whose rate is being changed
2050 * @rate: the new rate for clk
2051 *
2052 * This is a combination of clk_set_rate() and clk_rate_exclusive_get()
2053 * within a critical section
2054 *
2055 * This can be used initially to ensure that at least 1 consumer is
2056 * statisfied when several consumers are competing for exclusivity over the
2057 * same clock provider.
2058 *
2059 * The exclusivity is not applied if setting the rate failed.
2060 *
2061 * Calls to clk_rate_exclusive_get() should be balanced with calls to
2062 * clk_rate_exclusive_put().
2063 *
2064 * Returns 0 on success, -EERROR otherwise.
2065 */
2066int clk_set_rate_exclusive(struct clk *clk, unsigned long rate)
2067{
2068 int ret;
2069
2070 if (!clk)
2071 return 0;
2072
2073 /* prevent racing with updates to the clock topology */
2074 clk_prepare_lock();
2075
2076 /*
2077 * The temporary protection removal is not here, on purpose
2078 * This function is meant to be used instead of clk_rate_protect,
2079 * so before the consumer code path protect the clock provider
2080 */
2081
2082 ret = clk_core_set_rate_nolock(clk->core, rate);
2083 if (!ret) {
2084 clk_core_rate_protect(clk->core);
2085 clk->exclusive_count++;
2086 }
2087
2088 clk_prepare_unlock();
2089
2090 return ret;
2091}
2092EXPORT_SYMBOL_GPL(clk_set_rate_exclusive);
2093
2094/**
2095 * clk_set_rate_range - set a rate range for a clock source
2096 * @clk: clock source
2097 * @min: desired minimum clock rate in Hz, inclusive
2098 * @max: desired maximum clock rate in Hz, inclusive
2099 *
2100 * Returns success (0) or negative errno.
2101 */
2102int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
2103{
2104 int ret = 0;
2105 unsigned long old_min, old_max, rate;
2106
2107 if (!clk)
2108 return 0;
2109
2110 if (min > max) {
2111 pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n",
2112 __func__, clk->core->name, clk->dev_id, clk->con_id,
2113 min, max);
2114 return -EINVAL;
2115 }
2116
2117 clk_prepare_lock();
2118
2119 if (clk->exclusive_count)
2120 clk_core_rate_unprotect(clk->core);
2121
2122 /* Save the current values in case we need to rollback the change */
2123 old_min = clk->min_rate;
2124 old_max = clk->max_rate;
2125 clk->min_rate = min;
2126 clk->max_rate = max;
2127
2128 rate = clk_core_get_rate_nolock(clk->core);
2129 if (rate < min || rate > max) {
2130 /*
2131 * FIXME:
2132 * We are in bit of trouble here, current rate is outside the
2133 * the requested range. We are going try to request appropriate
2134 * range boundary but there is a catch. It may fail for the
2135 * usual reason (clock broken, clock protected, etc) but also
2136 * because:
2137 * - round_rate() was not favorable and fell on the wrong
2138 * side of the boundary
2139 * - the determine_rate() callback does not really check for
2140 * this corner case when determining the rate
2141 */
2142
2143 if (rate < min)
2144 rate = min;
2145 else
2146 rate = max;
2147
2148 ret = clk_core_set_rate_nolock(clk->core, rate);
2149 if (ret) {
2150 /* rollback the changes */
2151 clk->min_rate = old_min;
2152 clk->max_rate = old_max;
2153 }
2154 }
2155
2156 if (clk->exclusive_count)
2157 clk_core_rate_protect(clk->core);
2158
2159 clk_prepare_unlock();
2160
2161 return ret;
2162}
2163EXPORT_SYMBOL_GPL(clk_set_rate_range);
2164
2165/**
2166 * clk_set_min_rate - set a minimum clock rate for a clock source
2167 * @clk: clock source
2168 * @rate: desired minimum clock rate in Hz, inclusive
2169 *
2170 * Returns success (0) or negative errno.
2171 */
2172int clk_set_min_rate(struct clk *clk, unsigned long rate)
2173{
2174 if (!clk)
2175 return 0;
2176
2177 return clk_set_rate_range(clk, rate, clk->max_rate);
2178}
2179EXPORT_SYMBOL_GPL(clk_set_min_rate);
2180
2181/**
2182 * clk_set_max_rate - set a maximum clock rate for a clock source
2183 * @clk: clock source
2184 * @rate: desired maximum clock rate in Hz, inclusive
2185 *
2186 * Returns success (0) or negative errno.
2187 */
2188int clk_set_max_rate(struct clk *clk, unsigned long rate)
2189{
2190 if (!clk)
2191 return 0;
2192
2193 return clk_set_rate_range(clk, clk->min_rate, rate);
2194}
2195EXPORT_SYMBOL_GPL(clk_set_max_rate);
2196
2197/**
2198 * clk_get_parent - return the parent of a clk
2199 * @clk: the clk whose parent gets returned
2200 *
2201 * Simply returns clk->parent. Returns NULL if clk is NULL.
2202 */
2203struct clk *clk_get_parent(struct clk *clk)
2204{
2205 struct clk *parent;
2206
2207 if (!clk)
2208 return NULL;
2209
2210 clk_prepare_lock();
2211 /* TODO: Create a per-user clk and change callers to call clk_put */
2212 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
2213 clk_prepare_unlock();
2214
2215 return parent;
2216}
2217EXPORT_SYMBOL_GPL(clk_get_parent);
2218
2219static struct clk_core *__clk_init_parent(struct clk_core *core)
2220{
2221 u8 index = 0;
2222
2223 if (core->num_parents > 1 && core->ops->get_parent)
2224 index = core->ops->get_parent(core->hw);
2225
2226 return clk_core_get_parent_by_index(core, index);
2227}
2228
2229static void clk_core_reparent(struct clk_core *core,
2230 struct clk_core *new_parent)
2231{
2232 clk_reparent(core, new_parent);
2233 __clk_recalc_accuracies(core);
2234 __clk_recalc_rates(core, POST_RATE_CHANGE);
2235}
2236
2237void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent)
2238{
2239 if (!hw)
2240 return;
2241
2242 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
2243}
2244
2245/**
2246 * clk_has_parent - check if a clock is a possible parent for another
2247 * @clk: clock source
2248 * @parent: parent clock source
2249 *
2250 * This function can be used in drivers that need to check that a clock can be
2251 * the parent of another without actually changing the parent.
2252 *
2253 * Returns true if @parent is a possible parent for @clk, false otherwise.
2254 */
2255bool clk_has_parent(struct clk *clk, struct clk *parent)
2256{
2257 struct clk_core *core, *parent_core;
2258
2259 /* NULL clocks should be nops, so return success if either is NULL. */
2260 if (!clk || !parent)
2261 return true;
2262
2263 core = clk->core;
2264 parent_core = parent->core;
2265
2266 /* Optimize for the case where the parent is already the parent. */
2267 if (core->parent == parent_core)
2268 return true;
2269
2270 return match_string(core->parent_names, core->num_parents,
2271 parent_core->name) >= 0;
2272}
2273EXPORT_SYMBOL_GPL(clk_has_parent);
2274
2275static int clk_core_set_parent_nolock(struct clk_core *core,
2276 struct clk_core *parent)
2277{
2278 int ret = 0;
2279 int p_index = 0;
2280 unsigned long p_rate = 0;
2281
2282 lockdep_assert_held(&prepare_lock);
2283
2284 if (!core)
2285 return 0;
2286
2287 if (core->parent == parent)
2288 return 0;
2289
2290 /* verify ops for for multi-parent clks */
2291 if (core->num_parents > 1 && !core->ops->set_parent)
2292 return -EPERM;
2293
2294 /* check that we are allowed to re-parent if the clock is in use */
2295 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count)
2296 return -EBUSY;
2297
2298 if (clk_core_rate_is_protected(core))
2299 return -EBUSY;
2300
2301 /* try finding the new parent index */
2302 if (parent) {
2303 p_index = clk_fetch_parent_index(core, parent);
2304 if (p_index < 0) {
2305 pr_debug("%s: clk %s can not be parent of clk %s\n",
2306 __func__, parent->name, core->name);
2307 return p_index;
2308 }
2309 p_rate = parent->rate;
2310 }
2311
2312 ret = clk_pm_runtime_get(core);
2313 if (ret)
2314 return ret;
2315
2316 /* propagate PRE_RATE_CHANGE notifications */
2317 ret = __clk_speculate_rates(core, p_rate);
2318
2319 /* abort if a driver objects */
2320 if (ret & NOTIFY_STOP_MASK)
2321 goto runtime_put;
2322
2323 /* do the re-parent */
2324 ret = __clk_set_parent(core, parent, p_index);
2325
2326 /* propagate rate an accuracy recalculation accordingly */
2327 if (ret) {
2328 __clk_recalc_rates(core, ABORT_RATE_CHANGE);
2329 } else {
2330 __clk_recalc_rates(core, POST_RATE_CHANGE);
2331 __clk_recalc_accuracies(core);
2332 }
2333
2334runtime_put:
2335 clk_pm_runtime_put(core);
2336
2337 return ret;
2338}
2339
2340/**
2341 * clk_set_parent - switch the parent of a mux clk
2342 * @clk: the mux clk whose input we are switching
2343 * @parent: the new input to clk
2344 *
2345 * Re-parent clk to use parent as its new input source. If clk is in
2346 * prepared state, the clk will get enabled for the duration of this call. If
2347 * that's not acceptable for a specific clk (Eg: the consumer can't handle
2348 * that, the reparenting is glitchy in hardware, etc), use the
2349 * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
2350 *
2351 * After successfully changing clk's parent clk_set_parent will update the
2352 * clk topology, sysfs topology and propagate rate recalculation via
2353 * __clk_recalc_rates.
2354 *
2355 * Returns 0 on success, -EERROR otherwise.
2356 */
2357int clk_set_parent(struct clk *clk, struct clk *parent)
2358{
2359 int ret;
2360
2361 if (!clk)
2362 return 0;
2363
2364 clk_prepare_lock();
2365
2366 if (clk->exclusive_count)
2367 clk_core_rate_unprotect(clk->core);
2368
2369 ret = clk_core_set_parent_nolock(clk->core,
2370 parent ? parent->core : NULL);
2371
2372 if (clk->exclusive_count)
2373 clk_core_rate_protect(clk->core);
2374
2375 clk_prepare_unlock();
2376
2377 return ret;
2378}
2379EXPORT_SYMBOL_GPL(clk_set_parent);
2380
2381static int clk_core_set_phase_nolock(struct clk_core *core, int degrees)
2382{
2383 int ret = -EINVAL;
2384
2385 lockdep_assert_held(&prepare_lock);
2386
2387 if (!core)
2388 return 0;
2389
2390 if (clk_core_rate_is_protected(core))
2391 return -EBUSY;
2392
2393 trace_clk_set_phase(core, degrees);
2394
2395 if (core->ops->set_phase) {
2396 ret = core->ops->set_phase(core->hw, degrees);
2397 if (!ret)
2398 core->phase = degrees;
2399 }
2400
2401 trace_clk_set_phase_complete(core, degrees);
2402
2403 return ret;
2404}
2405
2406/**
2407 * clk_set_phase - adjust the phase shift of a clock signal
2408 * @clk: clock signal source
2409 * @degrees: number of degrees the signal is shifted
2410 *
2411 * Shifts the phase of a clock signal by the specified
2412 * degrees. Returns 0 on success, -EERROR otherwise.
2413 *
2414 * This function makes no distinction about the input or reference
2415 * signal that we adjust the clock signal phase against. For example
2416 * phase locked-loop clock signal generators we may shift phase with
2417 * respect to feedback clock signal input, but for other cases the
2418 * clock phase may be shifted with respect to some other, unspecified
2419 * signal.
2420 *
2421 * Additionally the concept of phase shift does not propagate through
2422 * the clock tree hierarchy, which sets it apart from clock rates and
2423 * clock accuracy. A parent clock phase attribute does not have an
2424 * impact on the phase attribute of a child clock.
2425 */
2426int clk_set_phase(struct clk *clk, int degrees)
2427{
2428 int ret;
2429
2430 if (!clk)
2431 return 0;
2432
2433 /* sanity check degrees */
2434 degrees %= 360;
2435 if (degrees < 0)
2436 degrees += 360;
2437
2438 clk_prepare_lock();
2439
2440 if (clk->exclusive_count)
2441 clk_core_rate_unprotect(clk->core);
2442
2443 ret = clk_core_set_phase_nolock(clk->core, degrees);
2444
2445 if (clk->exclusive_count)
2446 clk_core_rate_protect(clk->core);
2447
2448 clk_prepare_unlock();
2449
2450 return ret;
2451}
2452EXPORT_SYMBOL_GPL(clk_set_phase);
2453
2454static int clk_core_get_phase(struct clk_core *core)
2455{
2456 int ret;
2457
2458 clk_prepare_lock();
2459 /* Always try to update cached phase if possible */
2460 if (core->ops->get_phase)
2461 core->phase = core->ops->get_phase(core->hw);
2462 ret = core->phase;
2463 clk_prepare_unlock();
2464
2465 return ret;
2466}
2467
2468/**
2469 * clk_get_phase - return the phase shift of a clock signal
2470 * @clk: clock signal source
2471 *
2472 * Returns the phase shift of a clock node in degrees, otherwise returns
2473 * -EERROR.
2474 */
2475int clk_get_phase(struct clk *clk)
2476{
2477 if (!clk)
2478 return 0;
2479
2480 return clk_core_get_phase(clk->core);
2481}
2482EXPORT_SYMBOL_GPL(clk_get_phase);
2483
2484static void clk_core_reset_duty_cycle_nolock(struct clk_core *core)
2485{
2486 /* Assume a default value of 50% */
2487 core->duty.num = 1;
2488 core->duty.den = 2;
2489}
2490
2491static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core);
2492
2493static int clk_core_update_duty_cycle_nolock(struct clk_core *core)
2494{
2495 struct clk_duty *duty = &core->duty;
2496 int ret = 0;
2497
2498 if (!core->ops->get_duty_cycle)
2499 return clk_core_update_duty_cycle_parent_nolock(core);
2500
2501 ret = core->ops->get_duty_cycle(core->hw, duty);
2502 if (ret)
2503 goto reset;
2504
2505 /* Don't trust the clock provider too much */
2506 if (duty->den == 0 || duty->num > duty->den) {
2507 ret = -EINVAL;
2508 goto reset;
2509 }
2510
2511 return 0;
2512
2513reset:
2514 clk_core_reset_duty_cycle_nolock(core);
2515 return ret;
2516}
2517
2518static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core)
2519{
2520 int ret = 0;
2521
2522 if (core->parent &&
2523 core->flags & CLK_DUTY_CYCLE_PARENT) {
2524 ret = clk_core_update_duty_cycle_nolock(core->parent);
2525 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
2526 } else {
2527 clk_core_reset_duty_cycle_nolock(core);
2528 }
2529
2530 return ret;
2531}
2532
2533static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core,
2534 struct clk_duty *duty);
2535
2536static int clk_core_set_duty_cycle_nolock(struct clk_core *core,
2537 struct clk_duty *duty)
2538{
2539 int ret;
2540
2541 lockdep_assert_held(&prepare_lock);
2542
2543 if (clk_core_rate_is_protected(core))
2544 return -EBUSY;
2545
2546 trace_clk_set_duty_cycle(core, duty);
2547
2548 if (!core->ops->set_duty_cycle)
2549 return clk_core_set_duty_cycle_parent_nolock(core, duty);
2550
2551 ret = core->ops->set_duty_cycle(core->hw, duty);
2552 if (!ret)
2553 memcpy(&core->duty, duty, sizeof(*duty));
2554
2555 trace_clk_set_duty_cycle_complete(core, duty);
2556
2557 return ret;
2558}
2559
2560static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core,
2561 struct clk_duty *duty)
2562{
2563 int ret = 0;
2564
2565 if (core->parent &&
2566 core->flags & (CLK_DUTY_CYCLE_PARENT | CLK_SET_RATE_PARENT)) {
2567 ret = clk_core_set_duty_cycle_nolock(core->parent, duty);
2568 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
2569 }
2570
2571 return ret;
2572}
2573
2574/**
2575 * clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal
2576 * @clk: clock signal source
2577 * @num: numerator of the duty cycle ratio to be applied
2578 * @den: denominator of the duty cycle ratio to be applied
2579 *
2580 * Apply the duty cycle ratio if the ratio is valid and the clock can
2581 * perform this operation
2582 *
2583 * Returns (0) on success, a negative errno otherwise.
2584 */
2585int clk_set_duty_cycle(struct clk *clk, unsigned int num, unsigned int den)
2586{
2587 int ret;
2588 struct clk_duty duty;
2589
2590 if (!clk)
2591 return 0;
2592
2593 /* sanity check the ratio */
2594 if (den == 0 || num > den)
2595 return -EINVAL;
2596
2597 duty.num = num;
2598 duty.den = den;
2599
2600 clk_prepare_lock();
2601
2602 if (clk->exclusive_count)
2603 clk_core_rate_unprotect(clk->core);
2604
2605 ret = clk_core_set_duty_cycle_nolock(clk->core, &duty);
2606
2607 if (clk->exclusive_count)
2608 clk_core_rate_protect(clk->core);
2609
2610 clk_prepare_unlock();
2611
2612 return ret;
2613}
2614EXPORT_SYMBOL_GPL(clk_set_duty_cycle);
2615
2616static int clk_core_get_scaled_duty_cycle(struct clk_core *core,
2617 unsigned int scale)
2618{
2619 struct clk_duty *duty = &core->duty;
2620 int ret;
2621
2622 clk_prepare_lock();
2623
2624 ret = clk_core_update_duty_cycle_nolock(core);
2625 if (!ret)
2626 ret = mult_frac(scale, duty->num, duty->den);
2627
2628 clk_prepare_unlock();
2629
2630 return ret;
2631}
2632
2633/**
2634 * clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal
2635 * @clk: clock signal source
2636 * @scale: scaling factor to be applied to represent the ratio as an integer
2637 *
2638 * Returns the duty cycle ratio of a clock node multiplied by the provided
2639 * scaling factor, or negative errno on error.
2640 */
2641int clk_get_scaled_duty_cycle(struct clk *clk, unsigned int scale)
2642{
2643 if (!clk)
2644 return 0;
2645
2646 return clk_core_get_scaled_duty_cycle(clk->core, scale);
2647}
2648EXPORT_SYMBOL_GPL(clk_get_scaled_duty_cycle);
2649
2650/**
2651 * clk_is_match - check if two clk's point to the same hardware clock
2652 * @p: clk compared against q
2653 * @q: clk compared against p
2654 *
2655 * Returns true if the two struct clk pointers both point to the same hardware
2656 * clock node. Put differently, returns true if struct clk *p and struct clk *q
2657 * share the same struct clk_core object.
2658 *
2659 * Returns false otherwise. Note that two NULL clks are treated as matching.
2660 */
2661bool clk_is_match(const struct clk *p, const struct clk *q)
2662{
2663 /* trivial case: identical struct clk's or both NULL */
2664 if (p == q)
2665 return true;
2666
2667 /* true if clk->core pointers match. Avoid dereferencing garbage */
2668 if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q))
2669 if (p->core == q->core)
2670 return true;
2671
2672 return false;
2673}
2674EXPORT_SYMBOL_GPL(clk_is_match);
2675
2676/*** debugfs support ***/
2677
2678#ifdef CONFIG_DEBUG_FS
2679#include <linux/debugfs.h>
2680
2681static struct dentry *rootdir;
2682static int inited = 0;
2683static DEFINE_MUTEX(clk_debug_lock);
2684static HLIST_HEAD(clk_debug_list);
2685
2686static struct hlist_head *all_lists[] = {
2687 &clk_root_list,
2688 &clk_orphan_list,
2689 NULL,
2690};
2691
2692static struct hlist_head *orphan_list[] = {
2693 &clk_orphan_list,
2694 NULL,
2695};
2696
2697static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
2698 int level)
2699{
2700 if (!c)
2701 return;
2702
2703 seq_printf(s, "%*s%-*s %7d %8d %8d %11lu %10lu %5d %6d\n",
2704 level * 3 + 1, "",
2705 30 - level * 3, c->name,
2706 c->enable_count, c->prepare_count, c->protect_count,
2707 clk_core_get_rate(c), clk_core_get_accuracy(c),
2708 clk_core_get_phase(c),
2709 clk_core_get_scaled_duty_cycle(c, 100000));
2710}
2711
2712static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
2713 int level)
2714{
2715 struct clk_core *child;
2716
2717 if (!c)
2718 return;
2719
2720 clk_summary_show_one(s, c, level);
2721
2722 hlist_for_each_entry(child, &c->children, child_node)
2723 clk_summary_show_subtree(s, child, level + 1);
2724}
2725
2726static int clk_summary_show(struct seq_file *s, void *data)
2727{
2728 struct clk_core *c;
2729 struct hlist_head **lists = (struct hlist_head **)s->private;
2730
2731 seq_puts(s, " enable prepare protect duty\n");
2732 seq_puts(s, " clock count count count rate accuracy phase cycle\n");
2733 seq_puts(s, "---------------------------------------------------------------------------------------------\n");
2734
2735 clk_prepare_lock();
2736
2737 for (; *lists; lists++)
2738 hlist_for_each_entry(c, *lists, child_node)
2739 clk_summary_show_subtree(s, c, 0);
2740
2741 clk_prepare_unlock();
2742
2743 return 0;
2744}
2745DEFINE_SHOW_ATTRIBUTE(clk_summary);
2746
2747static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
2748{
2749 if (!c)
2750 return;
2751
2752 /* This should be JSON format, i.e. elements separated with a comma */
2753 seq_printf(s, "\"%s\": { ", c->name);
2754 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
2755 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
2756 seq_printf(s, "\"protect_count\": %d,", c->protect_count);
2757 seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c));
2758 seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c));
2759 seq_printf(s, "\"phase\": %d,", clk_core_get_phase(c));
2760 seq_printf(s, "\"duty_cycle\": %u",
2761 clk_core_get_scaled_duty_cycle(c, 100000));
2762}
2763
2764static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
2765{
2766 struct clk_core *child;
2767
2768 if (!c)
2769 return;
2770
2771 clk_dump_one(s, c, level);
2772
2773 hlist_for_each_entry(child, &c->children, child_node) {
2774 seq_putc(s, ',');
2775 clk_dump_subtree(s, child, level + 1);
2776 }
2777
2778 seq_putc(s, '}');
2779}
2780
2781static int clk_dump_show(struct seq_file *s, void *data)
2782{
2783 struct clk_core *c;
2784 bool first_node = true;
2785 struct hlist_head **lists = (struct hlist_head **)s->private;
2786
2787 seq_putc(s, '{');
2788 clk_prepare_lock();
2789
2790 for (; *lists; lists++) {
2791 hlist_for_each_entry(c, *lists, child_node) {
2792 if (!first_node)
2793 seq_putc(s, ',');
2794 first_node = false;
2795 clk_dump_subtree(s, c, 0);
2796 }
2797 }
2798
2799 clk_prepare_unlock();
2800
2801 seq_puts(s, "}\n");
2802 return 0;
2803}
2804DEFINE_SHOW_ATTRIBUTE(clk_dump);
2805
2806static const struct {
2807 unsigned long flag;
2808 const char *name;
2809} clk_flags[] = {
2810#define ENTRY(f) { f, #f }
2811 ENTRY(CLK_SET_RATE_GATE),
2812 ENTRY(CLK_SET_PARENT_GATE),
2813 ENTRY(CLK_SET_RATE_PARENT),
2814 ENTRY(CLK_IGNORE_UNUSED),
2815 ENTRY(CLK_IS_BASIC),
2816 ENTRY(CLK_GET_RATE_NOCACHE),
2817 ENTRY(CLK_SET_RATE_NO_REPARENT),
2818 ENTRY(CLK_GET_ACCURACY_NOCACHE),
2819 ENTRY(CLK_RECALC_NEW_RATES),
2820 ENTRY(CLK_SET_RATE_UNGATE),
2821 ENTRY(CLK_IS_CRITICAL),
2822 ENTRY(CLK_OPS_PARENT_ENABLE),
2823 ENTRY(CLK_DUTY_CYCLE_PARENT),
2824#undef ENTRY
2825};
2826
2827static int clk_flags_show(struct seq_file *s, void *data)
2828{
2829 struct clk_core *core = s->private;
2830 unsigned long flags = core->flags;
2831 unsigned int i;
2832
2833 for (i = 0; flags && i < ARRAY_SIZE(clk_flags); i++) {
2834 if (flags & clk_flags[i].flag) {
2835 seq_printf(s, "%s\n", clk_flags[i].name);
2836 flags &= ~clk_flags[i].flag;
2837 }
2838 }
2839 if (flags) {
2840 /* Unknown flags */
2841 seq_printf(s, "0x%lx\n", flags);
2842 }
2843
2844 return 0;
2845}
2846DEFINE_SHOW_ATTRIBUTE(clk_flags);
2847
2848static int possible_parents_show(struct seq_file *s, void *data)
2849{
2850 struct clk_core *core = s->private;
2851 int i;
2852
2853 for (i = 0; i < core->num_parents - 1; i++)
2854 seq_printf(s, "%s ", core->parent_names[i]);
2855
2856 seq_printf(s, "%s\n", core->parent_names[i]);
2857
2858 return 0;
2859}
2860DEFINE_SHOW_ATTRIBUTE(possible_parents);
2861
2862static int clk_duty_cycle_show(struct seq_file *s, void *data)
2863{
2864 struct clk_core *core = s->private;
2865 struct clk_duty *duty = &core->duty;
2866
2867 seq_printf(s, "%u/%u\n", duty->num, duty->den);
2868
2869 return 0;
2870}
2871DEFINE_SHOW_ATTRIBUTE(clk_duty_cycle);
2872
2873static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
2874{
2875 struct dentry *root;
2876
2877 if (!core || !pdentry)
2878 return;
2879
2880 root = debugfs_create_dir(core->name, pdentry);
2881 core->dentry = root;
2882
2883 debugfs_create_ulong("clk_rate", 0444, root, &core->rate);
2884 debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy);
2885 debugfs_create_u32("clk_phase", 0444, root, &core->phase);
2886 debugfs_create_file("clk_flags", 0444, root, core, &clk_flags_fops);
2887 debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count);
2888 debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count);
2889 debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count);
2890 debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count);
2891 debugfs_create_file("clk_duty_cycle", 0444, root, core,
2892 &clk_duty_cycle_fops);
2893
2894 if (core->num_parents > 1)
2895 debugfs_create_file("clk_possible_parents", 0444, root, core,
2896 &possible_parents_fops);
2897
2898 if (core->ops->debug_init)
2899 core->ops->debug_init(core->hw, core->dentry);
2900}
2901
2902/**
2903 * clk_debug_register - add a clk node to the debugfs clk directory
2904 * @core: the clk being added to the debugfs clk directory
2905 *
2906 * Dynamically adds a clk to the debugfs clk directory if debugfs has been
2907 * initialized. Otherwise it bails out early since the debugfs clk directory
2908 * will be created lazily by clk_debug_init as part of a late_initcall.
2909 */
2910static void clk_debug_register(struct clk_core *core)
2911{
2912 mutex_lock(&clk_debug_lock);
2913 hlist_add_head(&core->debug_node, &clk_debug_list);
2914 if (inited)
2915 clk_debug_create_one(core, rootdir);
2916 mutex_unlock(&clk_debug_lock);
2917}
2918
2919 /**
2920 * clk_debug_unregister - remove a clk node from the debugfs clk directory
2921 * @core: the clk being removed from the debugfs clk directory
2922 *
2923 * Dynamically removes a clk and all its child nodes from the
2924 * debugfs clk directory if clk->dentry points to debugfs created by
2925 * clk_debug_register in __clk_core_init.
2926 */
2927static void clk_debug_unregister(struct clk_core *core)
2928{
2929 mutex_lock(&clk_debug_lock);
2930 hlist_del_init(&core->debug_node);
2931 debugfs_remove_recursive(core->dentry);
2932 core->dentry = NULL;
2933 mutex_unlock(&clk_debug_lock);
2934}
2935
2936/**
2937 * clk_debug_init - lazily populate the debugfs clk directory
2938 *
2939 * clks are often initialized very early during boot before memory can be
2940 * dynamically allocated and well before debugfs is setup. This function
2941 * populates the debugfs clk directory once at boot-time when we know that
2942 * debugfs is setup. It should only be called once at boot-time, all other clks
2943 * added dynamically will be done so with clk_debug_register.
2944 */
2945static int __init clk_debug_init(void)
2946{
2947 struct clk_core *core;
2948
2949 rootdir = debugfs_create_dir("clk", NULL);
2950
2951 debugfs_create_file("clk_summary", 0444, rootdir, &all_lists,
2952 &clk_summary_fops);
2953 debugfs_create_file("clk_dump", 0444, rootdir, &all_lists,
2954 &clk_dump_fops);
2955 debugfs_create_file("clk_orphan_summary", 0444, rootdir, &orphan_list,
2956 &clk_summary_fops);
2957 debugfs_create_file("clk_orphan_dump", 0444, rootdir, &orphan_list,
2958 &clk_dump_fops);
2959
2960 mutex_lock(&clk_debug_lock);
2961 hlist_for_each_entry(core, &clk_debug_list, debug_node)
2962 clk_debug_create_one(core, rootdir);
2963
2964 inited = 1;
2965 mutex_unlock(&clk_debug_lock);
2966
2967 return 0;
2968}
2969late_initcall(clk_debug_init);
2970#else
2971static inline void clk_debug_register(struct clk_core *core) { }
2972static inline void clk_debug_reparent(struct clk_core *core,
2973 struct clk_core *new_parent)
2974{
2975}
2976static inline void clk_debug_unregister(struct clk_core *core)
2977{
2978}
2979#endif
2980
2981/**
2982 * __clk_core_init - initialize the data structures in a struct clk_core
2983 * @core: clk_core being initialized
2984 *
2985 * Initializes the lists in struct clk_core, queries the hardware for the
2986 * parent and rate and sets them both.
2987 */
2988static int __clk_core_init(struct clk_core *core)
2989{
2990 int i, ret;
2991 struct clk_core *orphan;
2992 struct hlist_node *tmp2;
2993 unsigned long rate;
2994
2995 if (!core)
2996 return -EINVAL;
2997
2998 clk_prepare_lock();
2999
3000 ret = clk_pm_runtime_get(core);
3001 if (ret)
3002 goto unlock;
3003
3004 /* check to see if a clock with this name is already registered */
3005 if (clk_core_lookup(core->name)) {
3006 pr_debug("%s: clk %s already initialized\n",
3007 __func__, core->name);
3008 ret = -EEXIST;
3009 goto out;
3010 }
3011
3012 /* check that clk_ops are sane. See Documentation/driver-api/clk.rst */
3013 if (core->ops->set_rate &&
3014 !((core->ops->round_rate || core->ops->determine_rate) &&
3015 core->ops->recalc_rate)) {
3016 pr_err("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n",
3017 __func__, core->name);
3018 ret = -EINVAL;
3019 goto out;
3020 }
3021
3022 if (core->ops->set_parent && !core->ops->get_parent) {
3023 pr_err("%s: %s must implement .get_parent & .set_parent\n",
3024 __func__, core->name);
3025 ret = -EINVAL;
3026 goto out;
3027 }
3028
3029 if (core->num_parents > 1 && !core->ops->get_parent) {
3030 pr_err("%s: %s must implement .get_parent as it has multi parents\n",
3031 __func__, core->name);
3032 ret = -EINVAL;
3033 goto out;
3034 }
3035
3036 if (core->ops->set_rate_and_parent &&
3037 !(core->ops->set_parent && core->ops->set_rate)) {
3038 pr_err("%s: %s must implement .set_parent & .set_rate\n",
3039 __func__, core->name);
3040 ret = -EINVAL;
3041 goto out;
3042 }
3043
3044 /* throw a WARN if any entries in parent_names are NULL */
3045 for (i = 0; i < core->num_parents; i++)
3046 WARN(!core->parent_names[i],
3047 "%s: invalid NULL in %s's .parent_names\n",
3048 __func__, core->name);
3049
3050 core->parent = __clk_init_parent(core);
3051
3052 /*
3053 * Populate core->parent if parent has already been clk_core_init'd. If
3054 * parent has not yet been clk_core_init'd then place clk in the orphan
3055 * list. If clk doesn't have any parents then place it in the root
3056 * clk list.
3057 *
3058 * Every time a new clk is clk_init'd then we walk the list of orphan
3059 * clocks and re-parent any that are children of the clock currently
3060 * being clk_init'd.
3061 */
3062 if (core->parent) {
3063 hlist_add_head(&core->child_node,
3064 &core->parent->children);
3065 core->orphan = core->parent->orphan;
3066 } else if (!core->num_parents) {
3067 hlist_add_head(&core->child_node, &clk_root_list);
3068 core->orphan = false;
3069 } else {
3070 hlist_add_head(&core->child_node, &clk_orphan_list);
3071 core->orphan = true;
3072 }
3073
3074 /*
3075 * optional platform-specific magic
3076 *
3077 * The .init callback is not used by any of the basic clock types, but
3078 * exists for weird hardware that must perform initialization magic.
3079 * Please consider other ways of solving initialization problems before
3080 * using this callback, as its use is discouraged.
3081 */
3082 if (core->ops->init)
3083 core->ops->init(core->hw);
3084
3085 /*
3086 * Set clk's accuracy. The preferred method is to use
3087 * .recalc_accuracy. For simple clocks and lazy developers the default
3088 * fallback is to use the parent's accuracy. If a clock doesn't have a
3089 * parent (or is orphaned) then accuracy is set to zero (perfect
3090 * clock).
3091 */
3092 if (core->ops->recalc_accuracy)
3093 core->accuracy = core->ops->recalc_accuracy(core->hw,
3094 __clk_get_accuracy(core->parent));
3095 else if (core->parent)
3096 core->accuracy = core->parent->accuracy;
3097 else
3098 core->accuracy = 0;
3099
3100 /*
3101 * Set clk's phase.
3102 * Since a phase is by definition relative to its parent, just
3103 * query the current clock phase, or just assume it's in phase.
3104 */
3105 if (core->ops->get_phase)
3106 core->phase = core->ops->get_phase(core->hw);
3107 else
3108 core->phase = 0;
3109
3110 /*
3111 * Set clk's duty cycle.
3112 */
3113 clk_core_update_duty_cycle_nolock(core);
3114
3115 /*
3116 * Set clk's rate. The preferred method is to use .recalc_rate. For
3117 * simple clocks and lazy developers the default fallback is to use the
3118 * parent's rate. If a clock doesn't have a parent (or is orphaned)
3119 * then rate is set to zero.
3120 */
3121 if (core->ops->recalc_rate)
3122 rate = core->ops->recalc_rate(core->hw,
3123 clk_core_get_rate_nolock(core->parent));
3124 else if (core->parent)
3125 rate = core->parent->rate;
3126 else
3127 rate = 0;
3128 core->rate = core->req_rate = rate;
3129
3130 core->boot_enabled = clk_core_is_enabled(core);
3131
3132 /*
3133 * Enable CLK_IS_CRITICAL clocks so newly added critical clocks
3134 * don't get accidentally disabled when walking the orphan tree and
3135 * reparenting clocks
3136 */
3137 if (core->flags & CLK_IS_CRITICAL) {
3138 unsigned long flags;
3139
3140 ret = clk_core_prepare(core);
3141 if (ret)
3142 goto out;
3143
3144 flags = clk_enable_lock();
3145 ret = clk_core_enable(core);
3146 clk_enable_unlock(flags);
3147 if (ret) {
3148 clk_core_unprepare(core);
3149 goto out;
3150 }
3151 }
3152
3153 clk_core_hold_state(core);
3154
3155 /*
3156 * walk the list of orphan clocks and reparent any that newly finds a
3157 * parent.
3158 */
3159 hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
3160 struct clk_core *parent = __clk_init_parent(orphan);
3161
3162 /*
3163 * We need to use __clk_set_parent_before() and _after() to
3164 * to properly migrate any prepare/enable count of the orphan
3165 * clock. This is important for CLK_IS_CRITICAL clocks, which
3166 * are enabled during init but might not have a parent yet.
3167 */
3168 if (parent) {
3169 /* update the clk tree topology */
3170 __clk_set_parent_before(orphan, parent);
3171 __clk_set_parent_after(orphan, parent, NULL);
3172 __clk_recalc_accuracies(orphan);
3173 __clk_recalc_rates(orphan, 0);
3174 __clk_core_update_orphan_hold_state(orphan);
3175 }
3176 }
3177
3178 kref_init(&core->ref);
3179out:
3180 clk_pm_runtime_put(core);
3181unlock:
3182 clk_prepare_unlock();
3183
3184 if (!ret)
3185 clk_debug_register(core);
3186
3187 return ret;
3188}
3189
3190struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id,
3191 const char *con_id)
3192{
3193 struct clk *clk;
3194
3195 /* This is to allow this function to be chained to others */
3196 if (IS_ERR_OR_NULL(hw))
3197 return ERR_CAST(hw);
3198
3199 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
3200 if (!clk)
3201 return ERR_PTR(-ENOMEM);
3202
3203 clk->core = hw->core;
3204 clk->dev_id = dev_id;
3205 clk->con_id = kstrdup_const(con_id, GFP_KERNEL);
3206 clk->max_rate = ULONG_MAX;
3207
3208 clk_prepare_lock();
3209 hlist_add_head(&clk->clks_node, &hw->core->clks);
3210 clk_prepare_unlock();
3211
3212 return clk;
3213}
3214
3215/* keep in sync with __clk_put */
3216void __clk_free_clk(struct clk *clk)
3217{
3218 clk_prepare_lock();
3219 hlist_del(&clk->clks_node);
3220 clk_prepare_unlock();
3221
3222 kfree_const(clk->con_id);
3223 kfree(clk);
3224}
3225
3226/**
3227 * clk_register - allocate a new clock, register it and return an opaque cookie
3228 * @dev: device that is registering this clock
3229 * @hw: link to hardware-specific clock data
3230 *
3231 * clk_register is the primary interface for populating the clock tree with new
3232 * clock nodes. It returns a pointer to the newly allocated struct clk which
3233 * cannot be dereferenced by driver code but may be used in conjunction with the
3234 * rest of the clock API. In the event of an error clk_register will return an
3235 * error code; drivers must test for an error code after calling clk_register.
3236 */
3237struct clk *clk_register(struct device *dev, struct clk_hw *hw)
3238{
3239 int i, ret;
3240 struct clk_core *core;
3241
3242 core = kzalloc(sizeof(*core), GFP_KERNEL);
3243 if (!core) {
3244 ret = -ENOMEM;
3245 goto fail_out;
3246 }
3247
3248 core->name = kstrdup_const(hw->init->name, GFP_KERNEL);
3249 if (!core->name) {
3250 ret = -ENOMEM;
3251 goto fail_name;
3252 }
3253
3254 if (WARN_ON(!hw->init->ops)) {
3255 ret = -EINVAL;
3256 goto fail_ops;
3257 }
3258 core->ops = hw->init->ops;
3259
3260 if (dev && pm_runtime_enabled(dev))
3261 core->dev = dev;
3262 if (dev && dev->driver)
3263 core->owner = dev->driver->owner;
3264 core->hw = hw;
3265 core->flags = hw->init->flags;
3266 core->num_parents = hw->init->num_parents;
3267 core->min_rate = 0;
3268 core->max_rate = ULONG_MAX;
3269 hw->core = core;
3270
3271 /* allocate local copy in case parent_names is __initdata */
3272 core->parent_names = kcalloc(core->num_parents, sizeof(char *),
3273 GFP_KERNEL);
3274
3275 if (!core->parent_names) {
3276 ret = -ENOMEM;
3277 goto fail_parent_names;
3278 }
3279
3280
3281 /* copy each string name in case parent_names is __initdata */
3282 for (i = 0; i < core->num_parents; i++) {
3283 core->parent_names[i] = kstrdup_const(hw->init->parent_names[i],
3284 GFP_KERNEL);
3285 if (!core->parent_names[i]) {
3286 ret = -ENOMEM;
3287 goto fail_parent_names_copy;
3288 }
3289 }
3290
3291 /* avoid unnecessary string look-ups of clk_core's possible parents. */
3292 core->parents = kcalloc(core->num_parents, sizeof(*core->parents),
3293 GFP_KERNEL);
3294 if (!core->parents) {
3295 ret = -ENOMEM;
3296 goto fail_parents;
3297 };
3298
3299 INIT_HLIST_HEAD(&core->clks);
3300
3301 hw->clk = __clk_create_clk(hw, NULL, NULL);
3302 if (IS_ERR(hw->clk)) {
3303 ret = PTR_ERR(hw->clk);
3304 goto fail_parents;
3305 }
3306
3307 ret = __clk_core_init(core);
3308 if (!ret)
3309 return hw->clk;
3310
3311 __clk_free_clk(hw->clk);
3312 hw->clk = NULL;
3313
3314fail_parents:
3315 kfree(core->parents);
3316fail_parent_names_copy:
3317 while (--i >= 0)
3318 kfree_const(core->parent_names[i]);
3319 kfree(core->parent_names);
3320fail_parent_names:
3321fail_ops:
3322 kfree_const(core->name);
3323fail_name:
3324 kfree(core);
3325fail_out:
3326 return ERR_PTR(ret);
3327}
3328EXPORT_SYMBOL_GPL(clk_register);
3329
3330/**
3331 * clk_hw_register - register a clk_hw and return an error code
3332 * @dev: device that is registering this clock
3333 * @hw: link to hardware-specific clock data
3334 *
3335 * clk_hw_register is the primary interface for populating the clock tree with
3336 * new clock nodes. It returns an integer equal to zero indicating success or
3337 * less than zero indicating failure. Drivers must test for an error code after
3338 * calling clk_hw_register().
3339 */
3340int clk_hw_register(struct device *dev, struct clk_hw *hw)
3341{
3342 return PTR_ERR_OR_ZERO(clk_register(dev, hw));
3343}
3344EXPORT_SYMBOL_GPL(clk_hw_register);
3345
3346/* Free memory allocated for a clock. */
3347static void __clk_release(struct kref *ref)
3348{
3349 struct clk_core *core = container_of(ref, struct clk_core, ref);
3350 int i = core->num_parents;
3351
3352 lockdep_assert_held(&prepare_lock);
3353
3354 kfree(core->parents);
3355 while (--i >= 0)
3356 kfree_const(core->parent_names[i]);
3357
3358 kfree(core->parent_names);
3359 kfree_const(core->name);
3360 kfree(core);
3361}
3362
3363/*
3364 * Empty clk_ops for unregistered clocks. These are used temporarily
3365 * after clk_unregister() was called on a clock and until last clock
3366 * consumer calls clk_put() and the struct clk object is freed.
3367 */
3368static int clk_nodrv_prepare_enable(struct clk_hw *hw)
3369{
3370 return -ENXIO;
3371}
3372
3373static void clk_nodrv_disable_unprepare(struct clk_hw *hw)
3374{
3375 WARN_ON_ONCE(1);
3376}
3377
3378static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate,
3379 unsigned long parent_rate)
3380{
3381 return -ENXIO;
3382}
3383
3384static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index)
3385{
3386 return -ENXIO;
3387}
3388
3389static const struct clk_ops clk_nodrv_ops = {
3390 .enable = clk_nodrv_prepare_enable,
3391 .disable = clk_nodrv_disable_unprepare,
3392 .prepare = clk_nodrv_prepare_enable,
3393 .unprepare = clk_nodrv_disable_unprepare,
3394 .set_rate = clk_nodrv_set_rate,
3395 .set_parent = clk_nodrv_set_parent,
3396};
3397
3398/**
3399 * clk_unregister - unregister a currently registered clock
3400 * @clk: clock to unregister
3401 */
3402void clk_unregister(struct clk *clk)
3403{
3404 unsigned long flags;
3405
3406 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
3407 return;
3408
3409 clk_debug_unregister(clk->core);
3410
3411 clk_prepare_lock();
3412
3413 if (clk->core->ops == &clk_nodrv_ops) {
3414 pr_err("%s: unregistered clock: %s\n", __func__,
3415 clk->core->name);
3416 goto unlock;
3417 }
3418 /*
3419 * Assign empty clock ops for consumers that might still hold
3420 * a reference to this clock.
3421 */
3422 flags = clk_enable_lock();
3423 clk->core->ops = &clk_nodrv_ops;
3424 clk_enable_unlock(flags);
3425
3426 if (!hlist_empty(&clk->core->children)) {
3427 struct clk_core *child;
3428 struct hlist_node *t;
3429
3430 /* Reparent all children to the orphan list. */
3431 hlist_for_each_entry_safe(child, t, &clk->core->children,
3432 child_node)
3433 clk_core_set_parent_nolock(child, NULL);
3434 }
3435
3436 hlist_del_init(&clk->core->child_node);
3437
3438 if (clk->core->prepare_count)
3439 pr_warn("%s: unregistering prepared clock: %s\n",
3440 __func__, clk->core->name);
3441
3442 if (clk->core->protect_count)
3443 pr_warn("%s: unregistering protected clock: %s\n",
3444 __func__, clk->core->name);
3445
3446 kref_put(&clk->core->ref, __clk_release);
3447unlock:
3448 clk_prepare_unlock();
3449}
3450EXPORT_SYMBOL_GPL(clk_unregister);
3451
3452/**
3453 * clk_hw_unregister - unregister a currently registered clk_hw
3454 * @hw: hardware-specific clock data to unregister
3455 */
3456void clk_hw_unregister(struct clk_hw *hw)
3457{
3458 clk_unregister(hw->clk);
3459}
3460EXPORT_SYMBOL_GPL(clk_hw_unregister);
3461
3462static void devm_clk_release(struct device *dev, void *res)
3463{
3464 clk_unregister(*(struct clk **)res);
3465}
3466
3467static void devm_clk_hw_release(struct device *dev, void *res)
3468{
3469 clk_hw_unregister(*(struct clk_hw **)res);
3470}
3471
3472/**
3473 * devm_clk_register - resource managed clk_register()
3474 * @dev: device that is registering this clock
3475 * @hw: link to hardware-specific clock data
3476 *
3477 * Managed clk_register(). Clocks returned from this function are
3478 * automatically clk_unregister()ed on driver detach. See clk_register() for
3479 * more information.
3480 */
3481struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)
3482{
3483 struct clk *clk;
3484 struct clk **clkp;
3485
3486 clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);
3487 if (!clkp)
3488 return ERR_PTR(-ENOMEM);
3489
3490 clk = clk_register(dev, hw);
3491 if (!IS_ERR(clk)) {
3492 *clkp = clk;
3493 devres_add(dev, clkp);
3494 } else {
3495 devres_free(clkp);
3496 }
3497
3498 return clk;
3499}
3500EXPORT_SYMBOL_GPL(devm_clk_register);
3501
3502/**
3503 * devm_clk_hw_register - resource managed clk_hw_register()
3504 * @dev: device that is registering this clock
3505 * @hw: link to hardware-specific clock data
3506 *
3507 * Managed clk_hw_register(). Clocks registered by this function are
3508 * automatically clk_hw_unregister()ed on driver detach. See clk_hw_register()
3509 * for more information.
3510 */
3511int devm_clk_hw_register(struct device *dev, struct clk_hw *hw)
3512{
3513 struct clk_hw **hwp;
3514 int ret;
3515
3516 hwp = devres_alloc(devm_clk_hw_release, sizeof(*hwp), GFP_KERNEL);
3517 if (!hwp)
3518 return -ENOMEM;
3519
3520 ret = clk_hw_register(dev, hw);
3521 if (!ret) {
3522 *hwp = hw;
3523 devres_add(dev, hwp);
3524 } else {
3525 devres_free(hwp);
3526 }
3527
3528 return ret;
3529}
3530EXPORT_SYMBOL_GPL(devm_clk_hw_register);
3531
3532static int devm_clk_match(struct device *dev, void *res, void *data)
3533{
3534 struct clk *c = res;
3535 if (WARN_ON(!c))
3536 return 0;
3537 return c == data;
3538}
3539
3540static int devm_clk_hw_match(struct device *dev, void *res, void *data)
3541{
3542 struct clk_hw *hw = res;
3543
3544 if (WARN_ON(!hw))
3545 return 0;
3546 return hw == data;
3547}
3548
3549/**
3550 * devm_clk_unregister - resource managed clk_unregister()
3551 * @clk: clock to unregister
3552 *
3553 * Deallocate a clock allocated with devm_clk_register(). Normally
3554 * this function will not need to be called and the resource management
3555 * code will ensure that the resource is freed.
3556 */
3557void devm_clk_unregister(struct device *dev, struct clk *clk)
3558{
3559 WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk));
3560}
3561EXPORT_SYMBOL_GPL(devm_clk_unregister);
3562
3563/**
3564 * devm_clk_hw_unregister - resource managed clk_hw_unregister()
3565 * @dev: device that is unregistering the hardware-specific clock data
3566 * @hw: link to hardware-specific clock data
3567 *
3568 * Unregister a clk_hw registered with devm_clk_hw_register(). Normally
3569 * this function will not need to be called and the resource management
3570 * code will ensure that the resource is freed.
3571 */
3572void devm_clk_hw_unregister(struct device *dev, struct clk_hw *hw)
3573{
3574 WARN_ON(devres_release(dev, devm_clk_hw_release, devm_clk_hw_match,
3575 hw));
3576}
3577EXPORT_SYMBOL_GPL(devm_clk_hw_unregister);
3578
3579/*
3580 * clkdev helpers
3581 */
3582int __clk_get(struct clk *clk)
3583{
3584 struct clk_core *core = !clk ? NULL : clk->core;
3585
3586 if (core) {
3587 if (!try_module_get(core->owner))
3588 return 0;
3589
3590 kref_get(&core->ref);
3591 }
3592 return 1;
3593}
3594
3595/* keep in sync with __clk_free_clk */
3596void __clk_put(struct clk *clk)
3597{
3598 struct module *owner;
3599
3600 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
3601 return;
3602
3603 clk_prepare_lock();
3604
3605 /*
3606 * Before calling clk_put, all calls to clk_rate_exclusive_get() from a
3607 * given user should be balanced with calls to clk_rate_exclusive_put()
3608 * and by that same consumer
3609 */
3610 if (WARN_ON(clk->exclusive_count)) {
3611 /* We voiced our concern, let's sanitize the situation */
3612 clk->core->protect_count -= (clk->exclusive_count - 1);
3613 clk_core_rate_unprotect(clk->core);
3614 clk->exclusive_count = 0;
3615 }
3616
3617 hlist_del(&clk->clks_node);
3618 if (clk->min_rate > clk->core->req_rate ||
3619 clk->max_rate < clk->core->req_rate)
3620 clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
3621
3622 owner = clk->core->owner;
3623 kref_put(&clk->core->ref, __clk_release);
3624
3625 clk_prepare_unlock();
3626
3627 module_put(owner);
3628
3629 kfree_const(clk->con_id);
3630 kfree(clk);
3631}
3632
3633/*** clk rate change notifiers ***/
3634
3635/**
3636 * clk_notifier_register - add a clk rate change notifier
3637 * @clk: struct clk * to watch
3638 * @nb: struct notifier_block * with callback info
3639 *
3640 * Request notification when clk's rate changes. This uses an SRCU
3641 * notifier because we want it to block and notifier unregistrations are
3642 * uncommon. The callbacks associated with the notifier must not
3643 * re-enter into the clk framework by calling any top-level clk APIs;
3644 * this will cause a nested prepare_lock mutex.
3645 *
3646 * In all notification cases (pre, post and abort rate change) the original
3647 * clock rate is passed to the callback via struct clk_notifier_data.old_rate
3648 * and the new frequency is passed via struct clk_notifier_data.new_rate.
3649 *
3650 * clk_notifier_register() must be called from non-atomic context.
3651 * Returns -EINVAL if called with null arguments, -ENOMEM upon
3652 * allocation failure; otherwise, passes along the return value of
3653 * srcu_notifier_chain_register().
3654 */
3655int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
3656{
3657 struct clk_notifier *cn;
3658 int ret = -ENOMEM;
3659
3660 if (!clk || !nb)
3661 return -EINVAL;
3662
3663 clk_prepare_lock();
3664
3665 /* search the list of notifiers for this clk */
3666 list_for_each_entry(cn, &clk_notifier_list, node)
3667 if (cn->clk == clk)
3668 break;
3669
3670 /* if clk wasn't in the notifier list, allocate new clk_notifier */
3671 if (cn->clk != clk) {
3672 cn = kzalloc(sizeof(*cn), GFP_KERNEL);
3673 if (!cn)
3674 goto out;
3675
3676 cn->clk = clk;
3677 srcu_init_notifier_head(&cn->notifier_head);
3678
3679 list_add(&cn->node, &clk_notifier_list);
3680 }
3681
3682 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
3683
3684 clk->core->notifier_count++;
3685
3686out:
3687 clk_prepare_unlock();
3688
3689 return ret;
3690}
3691EXPORT_SYMBOL_GPL(clk_notifier_register);
3692
3693/**
3694 * clk_notifier_unregister - remove a clk rate change notifier
3695 * @clk: struct clk *
3696 * @nb: struct notifier_block * with callback info
3697 *
3698 * Request no further notification for changes to 'clk' and frees memory
3699 * allocated in clk_notifier_register.
3700 *
3701 * Returns -EINVAL if called with null arguments; otherwise, passes
3702 * along the return value of srcu_notifier_chain_unregister().
3703 */
3704int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
3705{
3706 struct clk_notifier *cn = NULL;
3707 int ret = -EINVAL;
3708
3709 if (!clk || !nb)
3710 return -EINVAL;
3711
3712 clk_prepare_lock();
3713
3714 list_for_each_entry(cn, &clk_notifier_list, node)
3715 if (cn->clk == clk)
3716 break;
3717
3718 if (cn->clk == clk) {
3719 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
3720
3721 clk->core->notifier_count--;
3722
3723 /* XXX the notifier code should handle this better */
3724 if (!cn->notifier_head.head) {
3725 srcu_cleanup_notifier_head(&cn->notifier_head);
3726 list_del(&cn->node);
3727 kfree(cn);
3728 }
3729
3730 } else {
3731 ret = -ENOENT;
3732 }
3733
3734 clk_prepare_unlock();
3735
3736 return ret;
3737}
3738EXPORT_SYMBOL_GPL(clk_notifier_unregister);
3739
3740#ifdef CONFIG_OF
3741/**
3742 * struct of_clk_provider - Clock provider registration structure
3743 * @link: Entry in global list of clock providers
3744 * @node: Pointer to device tree node of clock provider
3745 * @get: Get clock callback. Returns NULL or a struct clk for the
3746 * given clock specifier
3747 * @data: context pointer to be passed into @get callback
3748 */
3749struct of_clk_provider {
3750 struct list_head link;
3751
3752 struct device_node *node;
3753 struct clk *(*get)(struct of_phandle_args *clkspec, void *data);
3754 struct clk_hw *(*get_hw)(struct of_phandle_args *clkspec, void *data);
3755 void *data;
3756};
3757
3758static const struct of_device_id __clk_of_table_sentinel
3759 __used __section(__clk_of_table_end);
3760
3761static LIST_HEAD(of_clk_providers);
3762static DEFINE_MUTEX(of_clk_mutex);
3763
3764struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
3765 void *data)
3766{
3767 return data;
3768}
3769EXPORT_SYMBOL_GPL(of_clk_src_simple_get);
3770
3771struct clk_hw *of_clk_hw_simple_get(struct of_phandle_args *clkspec, void *data)
3772{
3773 return data;
3774}
3775EXPORT_SYMBOL_GPL(of_clk_hw_simple_get);
3776
3777struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data)
3778{
3779 struct clk_onecell_data *clk_data = data;
3780 unsigned int idx = clkspec->args[0];
3781
3782 if (idx >= clk_data->clk_num) {
3783 pr_err("%s: invalid clock index %u\n", __func__, idx);
3784 return ERR_PTR(-EINVAL);
3785 }
3786
3787 return clk_data->clks[idx];
3788}
3789EXPORT_SYMBOL_GPL(of_clk_src_onecell_get);
3790
3791struct clk_hw *
3792of_clk_hw_onecell_get(struct of_phandle_args *clkspec, void *data)
3793{
3794 struct clk_hw_onecell_data *hw_data = data;
3795 unsigned int idx = clkspec->args[0];
3796
3797 if (idx >= hw_data->num) {
3798 pr_err("%s: invalid index %u\n", __func__, idx);
3799 return ERR_PTR(-EINVAL);
3800 }
3801
3802 return hw_data->hws[idx];
3803}
3804EXPORT_SYMBOL_GPL(of_clk_hw_onecell_get);
3805
3806/**
3807 * of_clk_add_provider() - Register a clock provider for a node
3808 * @np: Device node pointer associated with clock provider
3809 * @clk_src_get: callback for decoding clock
3810 * @data: context pointer for @clk_src_get callback.
3811 */
3812int of_clk_add_provider(struct device_node *np,
3813 struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,
3814 void *data),
3815 void *data)
3816{
3817 struct of_clk_provider *cp;
3818 int ret;
3819
3820 cp = kzalloc(sizeof(*cp), GFP_KERNEL);
3821 if (!cp)
3822 return -ENOMEM;
3823
3824 cp->node = of_node_get(np);
3825 cp->data = data;
3826 cp->get = clk_src_get;
3827
3828 mutex_lock(&of_clk_mutex);
3829 list_add(&cp->link, &of_clk_providers);
3830 mutex_unlock(&of_clk_mutex);
3831 pr_debug("Added clock from %pOF\n", np);
3832
3833 ret = of_clk_set_defaults(np, true);
3834 if (ret < 0)
3835 of_clk_del_provider(np);
3836
3837 return ret;
3838}
3839EXPORT_SYMBOL_GPL(of_clk_add_provider);
3840
3841/**
3842 * of_clk_add_hw_provider() - Register a clock provider for a node
3843 * @np: Device node pointer associated with clock provider
3844 * @get: callback for decoding clk_hw
3845 * @data: context pointer for @get callback.
3846 */
3847int of_clk_add_hw_provider(struct device_node *np,
3848 struct clk_hw *(*get)(struct of_phandle_args *clkspec,
3849 void *data),
3850 void *data)
3851{
3852 struct of_clk_provider *cp;
3853 int ret;
3854
3855 cp = kzalloc(sizeof(*cp), GFP_KERNEL);
3856 if (!cp)
3857 return -ENOMEM;
3858
3859 cp->node = of_node_get(np);
3860 cp->data = data;
3861 cp->get_hw = get;
3862
3863 mutex_lock(&of_clk_mutex);
3864 list_add(&cp->link, &of_clk_providers);
3865 mutex_unlock(&of_clk_mutex);
3866 pr_debug("Added clk_hw provider from %pOF\n", np);
3867
3868 ret = of_clk_set_defaults(np, true);
3869 if (ret < 0)
3870 of_clk_del_provider(np);
3871
3872 return ret;
3873}
3874EXPORT_SYMBOL_GPL(of_clk_add_hw_provider);
3875
3876static void devm_of_clk_release_provider(struct device *dev, void *res)
3877{
3878 of_clk_del_provider(*(struct device_node **)res);
3879}
3880
3881int devm_of_clk_add_hw_provider(struct device *dev,
3882 struct clk_hw *(*get)(struct of_phandle_args *clkspec,
3883 void *data),
3884 void *data)
3885{
3886 struct device_node **ptr, *np;
3887 int ret;
3888
3889 ptr = devres_alloc(devm_of_clk_release_provider, sizeof(*ptr),
3890 GFP_KERNEL);
3891 if (!ptr)
3892 return -ENOMEM;
3893
3894 np = dev->of_node;
3895 ret = of_clk_add_hw_provider(np, get, data);
3896 if (!ret) {
3897 *ptr = np;
3898 devres_add(dev, ptr);
3899 } else {
3900 devres_free(ptr);
3901 }
3902
3903 return ret;
3904}
3905EXPORT_SYMBOL_GPL(devm_of_clk_add_hw_provider);
3906
3907/**
3908 * of_clk_del_provider() - Remove a previously registered clock provider
3909 * @np: Device node pointer associated with clock provider
3910 */
3911void of_clk_del_provider(struct device_node *np)
3912{
3913 struct of_clk_provider *cp;
3914
3915 mutex_lock(&of_clk_mutex);
3916 list_for_each_entry(cp, &of_clk_providers, link) {
3917 if (cp->node == np) {
3918 list_del(&cp->link);
3919 of_node_put(cp->node);
3920 kfree(cp);
3921 break;
3922 }
3923 }
3924 mutex_unlock(&of_clk_mutex);
3925}
3926EXPORT_SYMBOL_GPL(of_clk_del_provider);
3927
3928static int devm_clk_provider_match(struct device *dev, void *res, void *data)
3929{
3930 struct device_node **np = res;
3931
3932 if (WARN_ON(!np || !*np))
3933 return 0;
3934
3935 return *np == data;
3936}
3937
3938void devm_of_clk_del_provider(struct device *dev)
3939{
3940 int ret;
3941
3942 ret = devres_release(dev, devm_of_clk_release_provider,
3943 devm_clk_provider_match, dev->of_node);
3944
3945 WARN_ON(ret);
3946}
3947EXPORT_SYMBOL(devm_of_clk_del_provider);
3948
3949static struct clk_hw *
3950__of_clk_get_hw_from_provider(struct of_clk_provider *provider,
3951 struct of_phandle_args *clkspec)
3952{
3953 struct clk *clk;
3954
3955 if (provider->get_hw)
3956 return provider->get_hw(clkspec, provider->data);
3957
3958 clk = provider->get(clkspec, provider->data);
3959 if (IS_ERR(clk))
3960 return ERR_CAST(clk);
3961 return __clk_get_hw(clk);
3962}
3963
3964struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec,
3965 const char *dev_id, const char *con_id)
3966{
3967 struct of_clk_provider *provider;
3968 struct clk *clk = ERR_PTR(-EPROBE_DEFER);
3969 struct clk_hw *hw;
3970
3971 if (!clkspec)
3972 return ERR_PTR(-EINVAL);
3973
3974 /* Check if we have such a provider in our array */
3975 mutex_lock(&of_clk_mutex);
3976 list_for_each_entry(provider, &of_clk_providers, link) {
3977 if (provider->node == clkspec->np) {
3978 hw = __of_clk_get_hw_from_provider(provider, clkspec);
3979 clk = __clk_create_clk(hw, dev_id, con_id);
3980 }
3981
3982 if (!IS_ERR(clk)) {
3983 if (!__clk_get(clk)) {
3984 __clk_free_clk(clk);
3985 clk = ERR_PTR(-ENOENT);
3986 }
3987
3988 break;
3989 }
3990 }
3991 mutex_unlock(&of_clk_mutex);
3992
3993 return clk;
3994}
3995
3996/**
3997 * of_clk_get_from_provider() - Lookup a clock from a clock provider
3998 * @clkspec: pointer to a clock specifier data structure
3999 *
4000 * This function looks up a struct clk from the registered list of clock
4001 * providers, an input is a clock specifier data structure as returned
4002 * from the of_parse_phandle_with_args() function call.
4003 */
4004struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
4005{
4006 return __of_clk_get_from_provider(clkspec, NULL, __func__);
4007}
4008EXPORT_SYMBOL_GPL(of_clk_get_from_provider);
4009
4010/**
4011 * of_clk_get_parent_count() - Count the number of clocks a device node has
4012 * @np: device node to count
4013 *
4014 * Returns: The number of clocks that are possible parents of this node
4015 */
4016unsigned int of_clk_get_parent_count(struct device_node *np)
4017{
4018 int count;
4019
4020 count = of_count_phandle_with_args(np, "clocks", "#clock-cells");
4021 if (count < 0)
4022 return 0;
4023
4024 return count;
4025}
4026EXPORT_SYMBOL_GPL(of_clk_get_parent_count);
4027
4028const char *of_clk_get_parent_name(struct device_node *np, int index)
4029{
4030 struct of_phandle_args clkspec;
4031 struct property *prop;
4032 const char *clk_name;
4033 const __be32 *vp;
4034 u32 pv;
4035 int rc;
4036 int count;
4037 struct clk *clk;
4038
4039 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
4040 &clkspec);
4041 if (rc)
4042 return NULL;
4043
4044 index = clkspec.args_count ? clkspec.args[0] : 0;
4045 count = 0;
4046
4047 /* if there is an indices property, use it to transfer the index
4048 * specified into an array offset for the clock-output-names property.
4049 */
4050 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
4051 if (index == pv) {
4052 index = count;
4053 break;
4054 }
4055 count++;
4056 }
4057 /* We went off the end of 'clock-indices' without finding it */
4058 if (prop && !vp)
4059 return NULL;
4060
4061 if (of_property_read_string_index(clkspec.np, "clock-output-names",
4062 index,
4063 &clk_name) < 0) {
4064 /*
4065 * Best effort to get the name if the clock has been
4066 * registered with the framework. If the clock isn't
4067 * registered, we return the node name as the name of
4068 * the clock as long as #clock-cells = 0.
4069 */
4070 clk = of_clk_get_from_provider(&clkspec);
4071 if (IS_ERR(clk)) {
4072 if (clkspec.args_count == 0)
4073 clk_name = clkspec.np->name;
4074 else
4075 clk_name = NULL;
4076 } else {
4077 clk_name = __clk_get_name(clk);
4078 clk_put(clk);
4079 }
4080 }
4081
4082
4083 of_node_put(clkspec.np);
4084 return clk_name;
4085}
4086EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
4087
4088/**
4089 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
4090 * number of parents
4091 * @np: Device node pointer associated with clock provider
4092 * @parents: pointer to char array that hold the parents' names
4093 * @size: size of the @parents array
4094 *
4095 * Return: number of parents for the clock node.
4096 */
4097int of_clk_parent_fill(struct device_node *np, const char **parents,
4098 unsigned int size)
4099{
4100 unsigned int i = 0;
4101
4102 while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL)
4103 i++;
4104
4105 return i;
4106}
4107EXPORT_SYMBOL_GPL(of_clk_parent_fill);
4108
4109struct clock_provider {
4110 void (*clk_init_cb)(struct device_node *);
4111 struct device_node *np;
4112 struct list_head node;
4113};
4114
4115/*
4116 * This function looks for a parent clock. If there is one, then it
4117 * checks that the provider for this parent clock was initialized, in
4118 * this case the parent clock will be ready.
4119 */
4120static int parent_ready(struct device_node *np)
4121{
4122 int i = 0;
4123
4124 while (true) {
4125 struct clk *clk = of_clk_get(np, i);
4126
4127 /* this parent is ready we can check the next one */
4128 if (!IS_ERR(clk)) {
4129 clk_put(clk);
4130 i++;
4131 continue;
4132 }
4133
4134 /* at least one parent is not ready, we exit now */
4135 if (PTR_ERR(clk) == -EPROBE_DEFER)
4136 return 0;
4137
4138 /*
4139 * Here we make assumption that the device tree is
4140 * written correctly. So an error means that there is
4141 * no more parent. As we didn't exit yet, then the
4142 * previous parent are ready. If there is no clock
4143 * parent, no need to wait for them, then we can
4144 * consider their absence as being ready
4145 */
4146 return 1;
4147 }
4148}
4149
4150/**
4151 * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree
4152 * @np: Device node pointer associated with clock provider
4153 * @index: clock index
4154 * @flags: pointer to top-level framework flags
4155 *
4156 * Detects if the clock-critical property exists and, if so, sets the
4157 * corresponding CLK_IS_CRITICAL flag.
4158 *
4159 * Do not use this function. It exists only for legacy Device Tree
4160 * bindings, such as the one-clock-per-node style that are outdated.
4161 * Those bindings typically put all clock data into .dts and the Linux
4162 * driver has no clock data, thus making it impossible to set this flag
4163 * correctly from the driver. Only those drivers may call
4164 * of_clk_detect_critical from their setup functions.
4165 *
4166 * Return: error code or zero on success
4167 */
4168int of_clk_detect_critical(struct device_node *np,
4169 int index, unsigned long *flags)
4170{
4171 struct property *prop;
4172 const __be32 *cur;
4173 uint32_t idx;
4174
4175 if (!np || !flags)
4176 return -EINVAL;
4177
4178 of_property_for_each_u32(np, "clock-critical", prop, cur, idx)
4179 if (index == idx)
4180 *flags |= CLK_IS_CRITICAL;
4181
4182 return 0;
4183}
4184
4185/**
4186 * of_clk_init() - Scan and init clock providers from the DT
4187 * @matches: array of compatible values and init functions for providers.
4188 *
4189 * This function scans the device tree for matching clock providers
4190 * and calls their initialization functions. It also does it by trying
4191 * to follow the dependencies.
4192 */
4193void __init of_clk_init(const struct of_device_id *matches)
4194{
4195 const struct of_device_id *match;
4196 struct device_node *np;
4197 struct clock_provider *clk_provider, *next;
4198 bool is_init_done;
4199 bool force = false;
4200 LIST_HEAD(clk_provider_list);
4201
4202 if (!matches)
4203 matches = &__clk_of_table;
4204
4205 /* First prepare the list of the clocks providers */
4206 for_each_matching_node_and_match(np, matches, &match) {
4207 struct clock_provider *parent;
4208
4209 if (!of_device_is_available(np))
4210 continue;
4211
4212 parent = kzalloc(sizeof(*parent), GFP_KERNEL);
4213 if (!parent) {
4214 list_for_each_entry_safe(clk_provider, next,
4215 &clk_provider_list, node) {
4216 list_del(&clk_provider->node);
4217 of_node_put(clk_provider->np);
4218 kfree(clk_provider);
4219 }
4220 of_node_put(np);
4221 return;
4222 }
4223
4224 parent->clk_init_cb = match->data;
4225 parent->np = of_node_get(np);
4226 list_add_tail(&parent->node, &clk_provider_list);
4227 }
4228
4229 while (!list_empty(&clk_provider_list)) {
4230 is_init_done = false;
4231 list_for_each_entry_safe(clk_provider, next,
4232 &clk_provider_list, node) {
4233 if (force || parent_ready(clk_provider->np)) {
4234
4235 /* Don't populate platform devices */
4236 of_node_set_flag(clk_provider->np,
4237 OF_POPULATED);
4238
4239 clk_provider->clk_init_cb(clk_provider->np);
4240 of_clk_set_defaults(clk_provider->np, true);
4241
4242 list_del(&clk_provider->node);
4243 of_node_put(clk_provider->np);
4244 kfree(clk_provider);
4245 is_init_done = true;
4246 }
4247 }
4248
4249 /*
4250 * We didn't manage to initialize any of the
4251 * remaining providers during the last loop, so now we
4252 * initialize all the remaining ones unconditionally
4253 * in case the clock parent was not mandatory
4254 */
4255 if (!is_init_done)
4256 force = true;
4257 }
4258}
4259#endif