| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | /* | 
 | 2 |  * AD7787/AD7788/AD7789/AD7790/AD7791 SPI ADC driver | 
 | 3 |  * | 
 | 4 |  * Copyright 2012 Analog Devices Inc. | 
 | 5 |  *  Author: Lars-Peter Clausen <lars@metafoo.de> | 
 | 6 |  * | 
 | 7 |  * Licensed under the GPL-2. | 
 | 8 |  */ | 
 | 9 |  | 
 | 10 | #include <linux/interrupt.h> | 
 | 11 | #include <linux/device.h> | 
 | 12 | #include <linux/kernel.h> | 
 | 13 | #include <linux/slab.h> | 
 | 14 | #include <linux/sysfs.h> | 
 | 15 | #include <linux/spi/spi.h> | 
 | 16 | #include <linux/regulator/consumer.h> | 
 | 17 | #include <linux/err.h> | 
 | 18 | #include <linux/sched.h> | 
 | 19 | #include <linux/delay.h> | 
 | 20 | #include <linux/module.h> | 
 | 21 |  | 
 | 22 | #include <linux/iio/iio.h> | 
 | 23 | #include <linux/iio/sysfs.h> | 
 | 24 | #include <linux/iio/buffer.h> | 
 | 25 | #include <linux/iio/trigger.h> | 
 | 26 | #include <linux/iio/trigger_consumer.h> | 
 | 27 | #include <linux/iio/triggered_buffer.h> | 
 | 28 | #include <linux/iio/adc/ad_sigma_delta.h> | 
 | 29 |  | 
 | 30 | #include <linux/platform_data/ad7791.h> | 
 | 31 |  | 
 | 32 | #define AD7791_REG_COMM			0x0 /* For writes */ | 
 | 33 | #define AD7791_REG_STATUS		0x0 /* For reads */ | 
 | 34 | #define AD7791_REG_MODE			0x1 | 
 | 35 | #define AD7791_REG_FILTER		0x2 | 
 | 36 | #define AD7791_REG_DATA			0x3 | 
 | 37 |  | 
 | 38 | #define AD7791_MODE_CONTINUOUS		0x00 | 
 | 39 | #define AD7791_MODE_SINGLE		0x02 | 
 | 40 | #define AD7791_MODE_POWERDOWN		0x03 | 
 | 41 |  | 
 | 42 | #define AD7791_CH_AIN1P_AIN1N		0x00 | 
 | 43 | #define AD7791_CH_AIN2			0x01 | 
 | 44 | #define AD7791_CH_AIN1N_AIN1N		0x02 | 
 | 45 | #define AD7791_CH_AVDD_MONITOR		0x03 | 
 | 46 |  | 
 | 47 | #define AD7791_FILTER_CLK_DIV_1		(0x0 << 4) | 
 | 48 | #define AD7791_FILTER_CLK_DIV_2		(0x1 << 4) | 
 | 49 | #define AD7791_FILTER_CLK_DIV_4		(0x2 << 4) | 
 | 50 | #define AD7791_FILTER_CLK_DIV_8		(0x3 << 4) | 
 | 51 | #define AD7791_FILTER_CLK_MASK		(0x3 << 4) | 
 | 52 | #define AD7791_FILTER_RATE_120		0x0 | 
 | 53 | #define AD7791_FILTER_RATE_100		0x1 | 
 | 54 | #define AD7791_FILTER_RATE_33_3		0x2 | 
 | 55 | #define AD7791_FILTER_RATE_20		0x3 | 
 | 56 | #define AD7791_FILTER_RATE_16_6		0x4 | 
 | 57 | #define AD7791_FILTER_RATE_16_7		0x5 | 
 | 58 | #define AD7791_FILTER_RATE_13_3		0x6 | 
 | 59 | #define AD7791_FILTER_RATE_9_5		0x7 | 
 | 60 | #define AD7791_FILTER_RATE_MASK		0x7 | 
 | 61 |  | 
 | 62 | #define AD7791_MODE_BUFFER		BIT(1) | 
 | 63 | #define AD7791_MODE_UNIPOLAR		BIT(2) | 
 | 64 | #define AD7791_MODE_BURNOUT		BIT(3) | 
 | 65 | #define AD7791_MODE_SEL_MASK		(0x3 << 6) | 
 | 66 | #define AD7791_MODE_SEL(x)		((x) << 6) | 
 | 67 |  | 
 | 68 | #define DECLARE_AD7787_CHANNELS(name, bits, storagebits) \ | 
 | 69 | const struct iio_chan_spec name[] = { \ | 
 | 70 | 	AD_SD_DIFF_CHANNEL(0, 0, 0, AD7791_CH_AIN1P_AIN1N, \ | 
 | 71 | 		(bits), (storagebits), 0), \ | 
 | 72 | 	AD_SD_CHANNEL(1, 1, AD7791_CH_AIN2, (bits), (storagebits), 0), \ | 
 | 73 | 	AD_SD_SHORTED_CHANNEL(2, 0, AD7791_CH_AIN1N_AIN1N, \ | 
 | 74 | 		(bits), (storagebits), 0), \ | 
 | 75 | 	AD_SD_SUPPLY_CHANNEL(3, 2, AD7791_CH_AVDD_MONITOR,  \ | 
 | 76 | 		(bits), (storagebits), 0), \ | 
 | 77 | 	IIO_CHAN_SOFT_TIMESTAMP(4), \ | 
 | 78 | } | 
 | 79 |  | 
 | 80 | #define DECLARE_AD7791_CHANNELS(name, bits, storagebits) \ | 
 | 81 | const struct iio_chan_spec name[] = { \ | 
 | 82 | 	AD_SD_DIFF_CHANNEL(0, 0, 0, AD7791_CH_AIN1P_AIN1N, \ | 
 | 83 | 		(bits), (storagebits), 0), \ | 
 | 84 | 	AD_SD_SHORTED_CHANNEL(1, 0, AD7791_CH_AIN1N_AIN1N, \ | 
 | 85 | 		(bits), (storagebits), 0), \ | 
 | 86 | 	AD_SD_SUPPLY_CHANNEL(2, 1, AD7791_CH_AVDD_MONITOR, \ | 
 | 87 | 		(bits), (storagebits), 0), \ | 
 | 88 | 	IIO_CHAN_SOFT_TIMESTAMP(3), \ | 
 | 89 | } | 
 | 90 |  | 
 | 91 | static DECLARE_AD7787_CHANNELS(ad7787_channels, 24, 32); | 
 | 92 | static DECLARE_AD7791_CHANNELS(ad7790_channels, 16, 16); | 
 | 93 | static DECLARE_AD7791_CHANNELS(ad7791_channels, 24, 32); | 
 | 94 |  | 
 | 95 | enum { | 
 | 96 | 	AD7787, | 
 | 97 | 	AD7788, | 
 | 98 | 	AD7789, | 
 | 99 | 	AD7790, | 
 | 100 | 	AD7791, | 
 | 101 | }; | 
 | 102 |  | 
 | 103 | enum ad7791_chip_info_flags { | 
 | 104 | 	AD7791_FLAG_HAS_FILTER		= (1 << 0), | 
 | 105 | 	AD7791_FLAG_HAS_BUFFER		= (1 << 1), | 
 | 106 | 	AD7791_FLAG_HAS_UNIPOLAR	= (1 << 2), | 
 | 107 | 	AD7791_FLAG_HAS_BURNOUT		= (1 << 3), | 
 | 108 | }; | 
 | 109 |  | 
 | 110 | struct ad7791_chip_info { | 
 | 111 | 	const struct iio_chan_spec *channels; | 
 | 112 | 	unsigned int num_channels; | 
 | 113 | 	enum ad7791_chip_info_flags flags; | 
 | 114 | }; | 
 | 115 |  | 
 | 116 | static const struct ad7791_chip_info ad7791_chip_infos[] = { | 
 | 117 | 	[AD7787] = { | 
 | 118 | 		.channels = ad7787_channels, | 
 | 119 | 		.num_channels = ARRAY_SIZE(ad7787_channels), | 
 | 120 | 		.flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER | | 
 | 121 | 			AD7791_FLAG_HAS_UNIPOLAR | AD7791_FLAG_HAS_BURNOUT, | 
 | 122 | 	}, | 
 | 123 | 	[AD7788] = { | 
 | 124 | 		.channels = ad7790_channels, | 
 | 125 | 		.num_channels = ARRAY_SIZE(ad7790_channels), | 
 | 126 | 		.flags = AD7791_FLAG_HAS_UNIPOLAR, | 
 | 127 | 	}, | 
 | 128 | 	[AD7789] = { | 
 | 129 | 		.channels = ad7791_channels, | 
 | 130 | 		.num_channels = ARRAY_SIZE(ad7791_channels), | 
 | 131 | 		.flags = AD7791_FLAG_HAS_UNIPOLAR, | 
 | 132 | 	}, | 
 | 133 | 	[AD7790] = { | 
 | 134 | 		.channels = ad7790_channels, | 
 | 135 | 		.num_channels = ARRAY_SIZE(ad7790_channels), | 
 | 136 | 		.flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER | | 
 | 137 | 			AD7791_FLAG_HAS_BURNOUT, | 
 | 138 | 	}, | 
 | 139 | 	[AD7791] = { | 
 | 140 | 		.channels = ad7791_channels, | 
 | 141 | 		.num_channels = ARRAY_SIZE(ad7791_channels), | 
 | 142 | 		.flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER | | 
 | 143 | 			AD7791_FLAG_HAS_UNIPOLAR | AD7791_FLAG_HAS_BURNOUT, | 
 | 144 | 	}, | 
 | 145 | }; | 
 | 146 |  | 
 | 147 | struct ad7791_state { | 
 | 148 | 	struct ad_sigma_delta sd; | 
 | 149 | 	uint8_t mode; | 
 | 150 | 	uint8_t filter; | 
 | 151 |  | 
 | 152 | 	struct regulator *reg; | 
 | 153 | 	const struct ad7791_chip_info *info; | 
 | 154 | }; | 
 | 155 |  | 
 | 156 | static const int ad7791_sample_freq_avail[8][2] = { | 
 | 157 | 	[AD7791_FILTER_RATE_120] =  { 120, 0 }, | 
 | 158 | 	[AD7791_FILTER_RATE_100] =  { 100, 0 }, | 
 | 159 | 	[AD7791_FILTER_RATE_33_3] = { 33,  300000 }, | 
 | 160 | 	[AD7791_FILTER_RATE_20] =   { 20,  0 }, | 
 | 161 | 	[AD7791_FILTER_RATE_16_6] = { 16,  600000 }, | 
 | 162 | 	[AD7791_FILTER_RATE_16_7] = { 16,  700000 }, | 
 | 163 | 	[AD7791_FILTER_RATE_13_3] = { 13,  300000 }, | 
 | 164 | 	[AD7791_FILTER_RATE_9_5] =  { 9,   500000 }, | 
 | 165 | }; | 
 | 166 |  | 
 | 167 | static struct ad7791_state *ad_sigma_delta_to_ad7791(struct ad_sigma_delta *sd) | 
 | 168 | { | 
 | 169 | 	return container_of(sd, struct ad7791_state, sd); | 
 | 170 | } | 
 | 171 |  | 
 | 172 | static int ad7791_set_channel(struct ad_sigma_delta *sd, unsigned int channel) | 
 | 173 | { | 
 | 174 | 	ad_sd_set_comm(sd, channel); | 
 | 175 |  | 
 | 176 | 	return 0; | 
 | 177 | } | 
 | 178 |  | 
 | 179 | static int ad7791_set_mode(struct ad_sigma_delta *sd, | 
 | 180 | 	enum ad_sigma_delta_mode mode) | 
 | 181 | { | 
 | 182 | 	struct ad7791_state *st = ad_sigma_delta_to_ad7791(sd); | 
 | 183 |  | 
 | 184 | 	switch (mode) { | 
 | 185 | 	case AD_SD_MODE_CONTINUOUS: | 
 | 186 | 		mode = AD7791_MODE_CONTINUOUS; | 
 | 187 | 		break; | 
 | 188 | 	case AD_SD_MODE_SINGLE: | 
 | 189 | 		mode = AD7791_MODE_SINGLE; | 
 | 190 | 		break; | 
 | 191 | 	case AD_SD_MODE_IDLE: | 
 | 192 | 	case AD_SD_MODE_POWERDOWN: | 
 | 193 | 		mode = AD7791_MODE_POWERDOWN; | 
 | 194 | 		break; | 
 | 195 | 	} | 
 | 196 |  | 
 | 197 | 	st->mode &= ~AD7791_MODE_SEL_MASK; | 
 | 198 | 	st->mode |= AD7791_MODE_SEL(mode); | 
 | 199 |  | 
 | 200 | 	return ad_sd_write_reg(sd, AD7791_REG_MODE, sizeof(st->mode), st->mode); | 
 | 201 | } | 
 | 202 |  | 
 | 203 | static const struct ad_sigma_delta_info ad7791_sigma_delta_info = { | 
 | 204 | 	.set_channel = ad7791_set_channel, | 
 | 205 | 	.set_mode = ad7791_set_mode, | 
 | 206 | 	.has_registers = true, | 
 | 207 | 	.addr_shift = 4, | 
 | 208 | 	.read_mask = BIT(3), | 
 | 209 | }; | 
 | 210 |  | 
 | 211 | static int ad7791_read_raw(struct iio_dev *indio_dev, | 
 | 212 | 	const struct iio_chan_spec *chan, int *val, int *val2, long info) | 
 | 213 | { | 
 | 214 | 	struct ad7791_state *st = iio_priv(indio_dev); | 
 | 215 | 	bool unipolar = !!(st->mode & AD7791_MODE_UNIPOLAR); | 
 | 216 | 	unsigned int rate; | 
 | 217 |  | 
 | 218 | 	switch (info) { | 
 | 219 | 	case IIO_CHAN_INFO_RAW: | 
 | 220 | 		return ad_sigma_delta_single_conversion(indio_dev, chan, val); | 
 | 221 | 	case IIO_CHAN_INFO_OFFSET: | 
 | 222 | 		/** | 
 | 223 | 		 * Unipolar: 0 to VREF | 
 | 224 | 		 * Bipolar -VREF to VREF | 
 | 225 | 		 **/ | 
 | 226 | 		if (unipolar) | 
 | 227 | 			*val = 0; | 
 | 228 | 		else | 
 | 229 | 			*val = -(1 << (chan->scan_type.realbits - 1)); | 
 | 230 | 		return IIO_VAL_INT; | 
 | 231 | 	case IIO_CHAN_INFO_SCALE: | 
 | 232 | 		/* The monitor channel uses an internal reference. */ | 
 | 233 | 		if (chan->address == AD7791_CH_AVDD_MONITOR) { | 
 | 234 | 			/* | 
 | 235 | 			 * The signal is attenuated by a factor of 5 and | 
 | 236 | 			 * compared against a 1.17V internal reference. | 
 | 237 | 			 */ | 
 | 238 | 			*val = 1170 * 5; | 
 | 239 | 		} else { | 
 | 240 | 			int voltage_uv; | 
 | 241 |  | 
 | 242 | 			voltage_uv = regulator_get_voltage(st->reg); | 
 | 243 | 			if (voltage_uv < 0) | 
 | 244 | 				return voltage_uv; | 
 | 245 |  | 
 | 246 | 			*val = voltage_uv / 1000; | 
 | 247 | 		} | 
 | 248 | 		if (unipolar) | 
 | 249 | 			*val2 = chan->scan_type.realbits; | 
 | 250 | 		else | 
 | 251 | 			*val2 = chan->scan_type.realbits - 1; | 
 | 252 |  | 
 | 253 | 		return IIO_VAL_FRACTIONAL_LOG2; | 
 | 254 | 	case IIO_CHAN_INFO_SAMP_FREQ: | 
 | 255 | 		rate = st->filter & AD7791_FILTER_RATE_MASK; | 
 | 256 | 		*val = ad7791_sample_freq_avail[rate][0]; | 
 | 257 | 		*val2 = ad7791_sample_freq_avail[rate][1]; | 
 | 258 | 		return IIO_VAL_INT_PLUS_MICRO; | 
 | 259 | 	} | 
 | 260 |  | 
 | 261 | 	return -EINVAL; | 
 | 262 | } | 
 | 263 |  | 
 | 264 | static int ad7791_write_raw(struct iio_dev *indio_dev, | 
 | 265 | 	struct iio_chan_spec const *chan, int val, int val2, long mask) | 
 | 266 | { | 
 | 267 | 	struct ad7791_state *st = iio_priv(indio_dev); | 
 | 268 | 	int ret, i; | 
 | 269 |  | 
 | 270 | 	ret = iio_device_claim_direct_mode(indio_dev); | 
 | 271 | 	if (ret) | 
 | 272 | 		return ret; | 
 | 273 |  | 
 | 274 | 	switch (mask) { | 
 | 275 | 	case IIO_CHAN_INFO_SAMP_FREQ: | 
 | 276 | 		for (i = 0; i < ARRAY_SIZE(ad7791_sample_freq_avail); i++) { | 
 | 277 | 			if (ad7791_sample_freq_avail[i][0] == val && | 
 | 278 | 			    ad7791_sample_freq_avail[i][1] == val2) | 
 | 279 | 				break; | 
 | 280 | 		} | 
 | 281 |  | 
 | 282 | 		if (i == ARRAY_SIZE(ad7791_sample_freq_avail)) { | 
 | 283 | 			ret = -EINVAL; | 
 | 284 | 			break; | 
 | 285 | 		} | 
 | 286 |  | 
 | 287 | 		st->filter &= ~AD7791_FILTER_RATE_MASK; | 
 | 288 | 		st->filter |= i; | 
 | 289 | 		ad_sd_write_reg(&st->sd, AD7791_REG_FILTER, | 
 | 290 | 				sizeof(st->filter), | 
 | 291 | 				st->filter); | 
 | 292 | 		break; | 
 | 293 | 	default: | 
 | 294 | 		ret = -EINVAL; | 
 | 295 | 	} | 
 | 296 |  | 
 | 297 | 	iio_device_release_direct_mode(indio_dev); | 
 | 298 | 	return ret; | 
 | 299 | } | 
 | 300 |  | 
 | 301 | static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("120 100 33.3 20 16.7 16.6 13.3 9.5"); | 
 | 302 |  | 
 | 303 | static struct attribute *ad7791_attributes[] = { | 
 | 304 | 	&iio_const_attr_sampling_frequency_available.dev_attr.attr, | 
 | 305 | 	NULL | 
 | 306 | }; | 
 | 307 |  | 
 | 308 | static const struct attribute_group ad7791_attribute_group = { | 
 | 309 | 	.attrs = ad7791_attributes, | 
 | 310 | }; | 
 | 311 |  | 
 | 312 | static const struct iio_info ad7791_info = { | 
 | 313 | 	.read_raw = &ad7791_read_raw, | 
 | 314 | 	.write_raw = &ad7791_write_raw, | 
 | 315 | 	.attrs = &ad7791_attribute_group, | 
 | 316 | 	.validate_trigger = ad_sd_validate_trigger, | 
 | 317 | }; | 
 | 318 |  | 
 | 319 | static const struct iio_info ad7791_no_filter_info = { | 
 | 320 | 	.read_raw = &ad7791_read_raw, | 
 | 321 | 	.write_raw = &ad7791_write_raw, | 
 | 322 | 	.validate_trigger = ad_sd_validate_trigger, | 
 | 323 | }; | 
 | 324 |  | 
 | 325 | static int ad7791_setup(struct ad7791_state *st, | 
 | 326 | 			struct ad7791_platform_data *pdata) | 
 | 327 | { | 
 | 328 | 	/* Set to poweron-reset default values */ | 
 | 329 | 	st->mode = AD7791_MODE_BUFFER; | 
 | 330 | 	st->filter = AD7791_FILTER_RATE_16_6; | 
 | 331 |  | 
 | 332 | 	if (!pdata) | 
 | 333 | 		return 0; | 
 | 334 |  | 
 | 335 | 	if ((st->info->flags & AD7791_FLAG_HAS_BUFFER) && !pdata->buffered) | 
 | 336 | 		st->mode &= ~AD7791_MODE_BUFFER; | 
 | 337 |  | 
 | 338 | 	if ((st->info->flags & AD7791_FLAG_HAS_BURNOUT) && | 
 | 339 | 		pdata->burnout_current) | 
 | 340 | 		st->mode |= AD7791_MODE_BURNOUT; | 
 | 341 |  | 
 | 342 | 	if ((st->info->flags & AD7791_FLAG_HAS_UNIPOLAR) && pdata->unipolar) | 
 | 343 | 		st->mode |= AD7791_MODE_UNIPOLAR; | 
 | 344 |  | 
 | 345 | 	return ad_sd_write_reg(&st->sd, AD7791_REG_MODE, sizeof(st->mode), | 
 | 346 | 		st->mode); | 
 | 347 | } | 
 | 348 |  | 
 | 349 | static int ad7791_probe(struct spi_device *spi) | 
 | 350 | { | 
 | 351 | 	struct ad7791_platform_data *pdata = spi->dev.platform_data; | 
 | 352 | 	struct iio_dev *indio_dev; | 
 | 353 | 	struct ad7791_state *st; | 
 | 354 | 	int ret; | 
 | 355 |  | 
 | 356 | 	if (!spi->irq) { | 
 | 357 | 		dev_err(&spi->dev, "Missing IRQ.\n"); | 
 | 358 | 		return -ENXIO; | 
 | 359 | 	} | 
 | 360 |  | 
 | 361 | 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); | 
 | 362 | 	if (!indio_dev) | 
 | 363 | 		return -ENOMEM; | 
 | 364 |  | 
 | 365 | 	st = iio_priv(indio_dev); | 
 | 366 |  | 
 | 367 | 	st->reg = devm_regulator_get(&spi->dev, "refin"); | 
 | 368 | 	if (IS_ERR(st->reg)) | 
 | 369 | 		return PTR_ERR(st->reg); | 
 | 370 |  | 
 | 371 | 	ret = regulator_enable(st->reg); | 
 | 372 | 	if (ret) | 
 | 373 | 		return ret; | 
 | 374 |  | 
 | 375 | 	st->info = &ad7791_chip_infos[spi_get_device_id(spi)->driver_data]; | 
 | 376 | 	ad_sd_init(&st->sd, indio_dev, spi, &ad7791_sigma_delta_info); | 
 | 377 |  | 
 | 378 | 	spi_set_drvdata(spi, indio_dev); | 
 | 379 |  | 
 | 380 | 	indio_dev->dev.parent = &spi->dev; | 
 | 381 | 	indio_dev->dev.of_node = spi->dev.of_node; | 
 | 382 | 	indio_dev->name = spi_get_device_id(spi)->name; | 
 | 383 | 	indio_dev->modes = INDIO_DIRECT_MODE; | 
 | 384 | 	indio_dev->channels = st->info->channels; | 
 | 385 | 	indio_dev->num_channels = st->info->num_channels; | 
 | 386 | 	if (st->info->flags & AD7791_FLAG_HAS_FILTER) | 
 | 387 | 		indio_dev->info = &ad7791_info; | 
 | 388 | 	else | 
 | 389 | 		indio_dev->info = &ad7791_no_filter_info; | 
 | 390 |  | 
 | 391 | 	ret = ad_sd_setup_buffer_and_trigger(indio_dev); | 
 | 392 | 	if (ret) | 
 | 393 | 		goto error_disable_reg; | 
 | 394 |  | 
 | 395 | 	ret = ad7791_setup(st, pdata); | 
 | 396 | 	if (ret) | 
 | 397 | 		goto error_remove_trigger; | 
 | 398 |  | 
 | 399 | 	ret = iio_device_register(indio_dev); | 
 | 400 | 	if (ret) | 
 | 401 | 		goto error_remove_trigger; | 
 | 402 |  | 
 | 403 | 	return 0; | 
 | 404 |  | 
 | 405 | error_remove_trigger: | 
 | 406 | 	ad_sd_cleanup_buffer_and_trigger(indio_dev); | 
 | 407 | error_disable_reg: | 
 | 408 | 	regulator_disable(st->reg); | 
 | 409 |  | 
 | 410 | 	return ret; | 
 | 411 | } | 
 | 412 |  | 
 | 413 | static int ad7791_remove(struct spi_device *spi) | 
 | 414 | { | 
 | 415 | 	struct iio_dev *indio_dev = spi_get_drvdata(spi); | 
 | 416 | 	struct ad7791_state *st = iio_priv(indio_dev); | 
 | 417 |  | 
 | 418 | 	iio_device_unregister(indio_dev); | 
 | 419 | 	ad_sd_cleanup_buffer_and_trigger(indio_dev); | 
 | 420 |  | 
 | 421 | 	regulator_disable(st->reg); | 
 | 422 |  | 
 | 423 | 	return 0; | 
 | 424 | } | 
 | 425 |  | 
 | 426 | static const struct spi_device_id ad7791_spi_ids[] = { | 
 | 427 | 	{ "ad7787", AD7787 }, | 
 | 428 | 	{ "ad7788", AD7788 }, | 
 | 429 | 	{ "ad7789", AD7789 }, | 
 | 430 | 	{ "ad7790", AD7790 }, | 
 | 431 | 	{ "ad7791", AD7791 }, | 
 | 432 | 	{} | 
 | 433 | }; | 
 | 434 | MODULE_DEVICE_TABLE(spi, ad7791_spi_ids); | 
 | 435 |  | 
 | 436 | static struct spi_driver ad7791_driver = { | 
 | 437 | 	.driver = { | 
 | 438 | 		.name	= "ad7791", | 
 | 439 | 	}, | 
 | 440 | 	.probe		= ad7791_probe, | 
 | 441 | 	.remove		= ad7791_remove, | 
 | 442 | 	.id_table	= ad7791_spi_ids, | 
 | 443 | }; | 
 | 444 | module_spi_driver(ad7791_driver); | 
 | 445 |  | 
 | 446 | MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); | 
 | 447 | MODULE_DESCRIPTION("Analog Device AD7787/AD7788/AD7789/AD7790/AD7791 ADC driver"); | 
 | 448 | MODULE_LICENSE("GPL v2"); |