| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 | 
 | 2 | /* | 
 | 3 |  * ST EHCI driver | 
 | 4 |  * | 
 | 5 |  * Copyright (C) 2014 STMicroelectronics – All Rights Reserved | 
 | 6 |  * | 
 | 7 |  * Author: Peter Griffin <peter.griffin@linaro.org> | 
 | 8 |  * | 
 | 9 |  * Derived from ehci-platform.c | 
 | 10 |  */ | 
 | 11 |  | 
 | 12 | #include <linux/clk.h> | 
 | 13 | #include <linux/dma-mapping.h> | 
 | 14 | #include <linux/err.h> | 
 | 15 | #include <linux/kernel.h> | 
 | 16 | #include <linux/hrtimer.h> | 
 | 17 | #include <linux/io.h> | 
 | 18 | #include <linux/module.h> | 
 | 19 | #include <linux/of.h> | 
 | 20 | #include <linux/phy/phy.h> | 
 | 21 | #include <linux/platform_device.h> | 
 | 22 | #include <linux/reset.h> | 
 | 23 | #include <linux/usb.h> | 
 | 24 | #include <linux/usb/hcd.h> | 
 | 25 | #include <linux/usb/ehci_pdriver.h> | 
 | 26 | #include <linux/pinctrl/consumer.h> | 
 | 27 |  | 
 | 28 | #include "ehci.h" | 
 | 29 |  | 
 | 30 | #define USB_MAX_CLKS 3 | 
 | 31 |  | 
 | 32 | struct st_ehci_platform_priv { | 
 | 33 | 	struct clk *clks[USB_MAX_CLKS]; | 
 | 34 | 	struct clk *clk48; | 
 | 35 | 	struct reset_control *rst; | 
 | 36 | 	struct reset_control *pwr; | 
 | 37 | 	struct phy *phy; | 
 | 38 | }; | 
 | 39 |  | 
 | 40 | #define DRIVER_DESC "EHCI STMicroelectronics driver" | 
 | 41 |  | 
 | 42 | #define hcd_to_ehci_priv(h) \ | 
 | 43 | 	((struct st_ehci_platform_priv *)hcd_to_ehci(h)->priv) | 
 | 44 |  | 
 | 45 | static const char hcd_name[] = "ehci-st"; | 
 | 46 |  | 
 | 47 | #define EHCI_CAPS_SIZE 0x10 | 
 | 48 | #define AHB2STBUS_INSREG01 (EHCI_CAPS_SIZE + 0x84) | 
 | 49 |  | 
 | 50 | static int st_ehci_platform_reset(struct usb_hcd *hcd) | 
 | 51 | { | 
 | 52 | 	struct platform_device *pdev = to_platform_device(hcd->self.controller); | 
 | 53 | 	struct usb_ehci_pdata *pdata = dev_get_platdata(&pdev->dev); | 
 | 54 | 	struct ehci_hcd *ehci = hcd_to_ehci(hcd); | 
 | 55 | 	u32 threshold; | 
 | 56 |  | 
 | 57 | 	/* Set EHCI packet buffer IN/OUT threshold to 128 bytes */ | 
 | 58 | 	threshold = 128 | (128 << 16); | 
 | 59 | 	writel(threshold, hcd->regs + AHB2STBUS_INSREG01); | 
 | 60 |  | 
 | 61 | 	ehci->caps = hcd->regs + pdata->caps_offset; | 
 | 62 | 	return ehci_setup(hcd); | 
 | 63 | } | 
 | 64 |  | 
 | 65 | static int st_ehci_platform_power_on(struct platform_device *dev) | 
 | 66 | { | 
 | 67 | 	struct usb_hcd *hcd = platform_get_drvdata(dev); | 
 | 68 | 	struct st_ehci_platform_priv *priv = hcd_to_ehci_priv(hcd); | 
 | 69 | 	int clk, ret; | 
 | 70 |  | 
 | 71 | 	ret = reset_control_deassert(priv->pwr); | 
 | 72 | 	if (ret) | 
 | 73 | 		return ret; | 
 | 74 |  | 
 | 75 | 	ret = reset_control_deassert(priv->rst); | 
 | 76 | 	if (ret) | 
 | 77 | 		goto err_assert_power; | 
 | 78 |  | 
 | 79 | 	/* some SoCs don't have a dedicated 48Mhz clock, but those that do | 
 | 80 | 	   need the rate to be explicitly set */ | 
 | 81 | 	if (priv->clk48) { | 
 | 82 | 		ret = clk_set_rate(priv->clk48, 48000000); | 
 | 83 | 		if (ret) | 
 | 84 | 			goto err_assert_reset; | 
 | 85 | 	} | 
 | 86 |  | 
 | 87 | 	for (clk = 0; clk < USB_MAX_CLKS && priv->clks[clk]; clk++) { | 
 | 88 | 		ret = clk_prepare_enable(priv->clks[clk]); | 
 | 89 | 		if (ret) | 
 | 90 | 			goto err_disable_clks; | 
 | 91 | 	} | 
 | 92 |  | 
 | 93 | 	ret = phy_init(priv->phy); | 
 | 94 | 	if (ret) | 
 | 95 | 		goto err_disable_clks; | 
 | 96 |  | 
 | 97 | 	ret = phy_power_on(priv->phy); | 
 | 98 | 	if (ret) | 
 | 99 | 		goto err_exit_phy; | 
 | 100 |  | 
 | 101 | 	return 0; | 
 | 102 |  | 
 | 103 | err_exit_phy: | 
 | 104 | 	phy_exit(priv->phy); | 
 | 105 | err_disable_clks: | 
 | 106 | 	while (--clk >= 0) | 
 | 107 | 		clk_disable_unprepare(priv->clks[clk]); | 
 | 108 | err_assert_reset: | 
 | 109 | 	reset_control_assert(priv->rst); | 
 | 110 | err_assert_power: | 
 | 111 | 	reset_control_assert(priv->pwr); | 
 | 112 |  | 
 | 113 | 	return ret; | 
 | 114 | } | 
 | 115 |  | 
 | 116 | static void st_ehci_platform_power_off(struct platform_device *dev) | 
 | 117 | { | 
 | 118 | 	struct usb_hcd *hcd = platform_get_drvdata(dev); | 
 | 119 | 	struct st_ehci_platform_priv *priv = hcd_to_ehci_priv(hcd); | 
 | 120 | 	int clk; | 
 | 121 |  | 
 | 122 | 	reset_control_assert(priv->pwr); | 
 | 123 |  | 
 | 124 | 	reset_control_assert(priv->rst); | 
 | 125 |  | 
 | 126 | 	phy_power_off(priv->phy); | 
 | 127 |  | 
 | 128 | 	phy_exit(priv->phy); | 
 | 129 |  | 
 | 130 | 	for (clk = USB_MAX_CLKS - 1; clk >= 0; clk--) | 
 | 131 | 		if (priv->clks[clk]) | 
 | 132 | 			clk_disable_unprepare(priv->clks[clk]); | 
 | 133 |  | 
 | 134 | } | 
 | 135 |  | 
 | 136 | static struct hc_driver __read_mostly ehci_platform_hc_driver; | 
 | 137 |  | 
 | 138 | static const struct ehci_driver_overrides platform_overrides __initconst = { | 
 | 139 | 	.reset =		st_ehci_platform_reset, | 
 | 140 | 	.extra_priv_size =	sizeof(struct st_ehci_platform_priv), | 
 | 141 | }; | 
 | 142 |  | 
 | 143 | static struct usb_ehci_pdata ehci_platform_defaults = { | 
 | 144 | 	.power_on =		st_ehci_platform_power_on, | 
 | 145 | 	.power_suspend =	st_ehci_platform_power_off, | 
 | 146 | 	.power_off =		st_ehci_platform_power_off, | 
 | 147 | }; | 
 | 148 |  | 
 | 149 | static int st_ehci_platform_probe(struct platform_device *dev) | 
 | 150 | { | 
 | 151 | 	struct usb_hcd *hcd; | 
 | 152 | 	struct resource *res_mem; | 
 | 153 | 	struct usb_ehci_pdata *pdata = &ehci_platform_defaults; | 
 | 154 | 	struct st_ehci_platform_priv *priv; | 
 | 155 | 	struct ehci_hcd *ehci; | 
 | 156 | 	int err, irq, clk = 0; | 
 | 157 |  | 
 | 158 | 	if (usb_disabled()) | 
 | 159 | 		return -ENODEV; | 
 | 160 |  | 
 | 161 | 	irq = platform_get_irq(dev, 0); | 
 | 162 | 	if (irq < 0) { | 
 | 163 | 		dev_err(&dev->dev, "no irq provided"); | 
 | 164 | 		return irq; | 
 | 165 | 	} | 
 | 166 | 	res_mem = platform_get_resource(dev, IORESOURCE_MEM, 0); | 
 | 167 | 	if (!res_mem) { | 
 | 168 | 		dev_err(&dev->dev, "no memory resource provided"); | 
 | 169 | 		return -ENXIO; | 
 | 170 | 	} | 
 | 171 |  | 
 | 172 | 	hcd = usb_create_hcd(&ehci_platform_hc_driver, &dev->dev, | 
 | 173 | 			     dev_name(&dev->dev)); | 
 | 174 | 	if (!hcd) | 
 | 175 | 		return -ENOMEM; | 
 | 176 |  | 
 | 177 | 	platform_set_drvdata(dev, hcd); | 
 | 178 | 	dev->dev.platform_data = pdata; | 
 | 179 | 	priv = hcd_to_ehci_priv(hcd); | 
 | 180 | 	ehci = hcd_to_ehci(hcd); | 
 | 181 |  | 
 | 182 | 	priv->phy = devm_phy_get(&dev->dev, "usb"); | 
 | 183 | 	if (IS_ERR(priv->phy)) { | 
 | 184 | 		err = PTR_ERR(priv->phy); | 
 | 185 | 		goto err_put_hcd; | 
 | 186 | 	} | 
 | 187 |  | 
 | 188 | 	for (clk = 0; clk < USB_MAX_CLKS; clk++) { | 
 | 189 | 		priv->clks[clk] = of_clk_get(dev->dev.of_node, clk); | 
 | 190 | 		if (IS_ERR(priv->clks[clk])) { | 
 | 191 | 			err = PTR_ERR(priv->clks[clk]); | 
 | 192 | 			if (err == -EPROBE_DEFER) | 
 | 193 | 				goto err_put_clks; | 
 | 194 | 			priv->clks[clk] = NULL; | 
 | 195 | 			break; | 
 | 196 | 		} | 
 | 197 | 	} | 
 | 198 |  | 
 | 199 | 	/* some SoCs don't have a dedicated 48Mhz clock, but those that | 
 | 200 | 	   do need the rate to be explicitly set */ | 
 | 201 | 	priv->clk48 = devm_clk_get(&dev->dev, "clk48"); | 
 | 202 | 	if (IS_ERR(priv->clk48)) { | 
 | 203 | 		dev_info(&dev->dev, "48MHz clk not found\n"); | 
 | 204 | 		priv->clk48 = NULL; | 
 | 205 | 	} | 
 | 206 |  | 
 | 207 | 	priv->pwr = | 
 | 208 | 		devm_reset_control_get_optional_shared(&dev->dev, "power"); | 
 | 209 | 	if (IS_ERR(priv->pwr)) { | 
 | 210 | 		err = PTR_ERR(priv->pwr); | 
 | 211 | 		if (err == -EPROBE_DEFER) | 
 | 212 | 			goto err_put_clks; | 
 | 213 | 		priv->pwr = NULL; | 
 | 214 | 	} | 
 | 215 |  | 
 | 216 | 	priv->rst = | 
 | 217 | 		devm_reset_control_get_optional_shared(&dev->dev, "softreset"); | 
 | 218 | 	if (IS_ERR(priv->rst)) { | 
 | 219 | 		err = PTR_ERR(priv->rst); | 
 | 220 | 		if (err == -EPROBE_DEFER) | 
 | 221 | 			goto err_put_clks; | 
 | 222 | 		priv->rst = NULL; | 
 | 223 | 	} | 
 | 224 |  | 
 | 225 | 	if (pdata->power_on) { | 
 | 226 | 		err = pdata->power_on(dev); | 
 | 227 | 		if (err < 0) | 
 | 228 | 			goto err_put_clks; | 
 | 229 | 	} | 
 | 230 |  | 
 | 231 | 	hcd->rsrc_start = res_mem->start; | 
 | 232 | 	hcd->rsrc_len = resource_size(res_mem); | 
 | 233 |  | 
 | 234 | 	hcd->regs = devm_ioremap_resource(&dev->dev, res_mem); | 
 | 235 | 	if (IS_ERR(hcd->regs)) { | 
 | 236 | 		err = PTR_ERR(hcd->regs); | 
 | 237 | 		goto err_put_clks; | 
 | 238 | 	} | 
 | 239 |  | 
 | 240 | 	err = usb_add_hcd(hcd, irq, IRQF_SHARED); | 
 | 241 | 	if (err) | 
 | 242 | 		goto err_put_clks; | 
 | 243 |  | 
 | 244 | 	device_wakeup_enable(hcd->self.controller); | 
 | 245 | 	platform_set_drvdata(dev, hcd); | 
 | 246 |  | 
 | 247 | 	return err; | 
 | 248 |  | 
 | 249 | err_put_clks: | 
 | 250 | 	while (--clk >= 0) | 
 | 251 | 		clk_put(priv->clks[clk]); | 
 | 252 | err_put_hcd: | 
 | 253 | 	if (pdata == &ehci_platform_defaults) | 
 | 254 | 		dev->dev.platform_data = NULL; | 
 | 255 |  | 
 | 256 | 	usb_put_hcd(hcd); | 
 | 257 |  | 
 | 258 | 	return err; | 
 | 259 | } | 
 | 260 |  | 
 | 261 | static int st_ehci_platform_remove(struct platform_device *dev) | 
 | 262 | { | 
 | 263 | 	struct usb_hcd *hcd = platform_get_drvdata(dev); | 
 | 264 | 	struct usb_ehci_pdata *pdata = dev_get_platdata(&dev->dev); | 
 | 265 | 	struct st_ehci_platform_priv *priv = hcd_to_ehci_priv(hcd); | 
 | 266 | 	int clk; | 
 | 267 |  | 
 | 268 | 	usb_remove_hcd(hcd); | 
 | 269 |  | 
 | 270 | 	if (pdata->power_off) | 
 | 271 | 		pdata->power_off(dev); | 
 | 272 |  | 
 | 273 | 	for (clk = 0; clk < USB_MAX_CLKS && priv->clks[clk]; clk++) | 
 | 274 | 		clk_put(priv->clks[clk]); | 
 | 275 |  | 
 | 276 | 	usb_put_hcd(hcd); | 
 | 277 |  | 
 | 278 | 	if (pdata == &ehci_platform_defaults) | 
 | 279 | 		dev->dev.platform_data = NULL; | 
 | 280 |  | 
 | 281 | 	return 0; | 
 | 282 | } | 
 | 283 |  | 
 | 284 | #ifdef CONFIG_PM_SLEEP | 
 | 285 |  | 
 | 286 | static int st_ehci_suspend(struct device *dev) | 
 | 287 | { | 
 | 288 | 	struct usb_hcd *hcd = dev_get_drvdata(dev); | 
 | 289 | 	struct usb_ehci_pdata *pdata = dev_get_platdata(dev); | 
 | 290 | 	struct platform_device *pdev = to_platform_device(dev); | 
 | 291 | 	bool do_wakeup = device_may_wakeup(dev); | 
 | 292 | 	int ret; | 
 | 293 |  | 
 | 294 | 	ret = ehci_suspend(hcd, do_wakeup); | 
 | 295 | 	if (ret) | 
 | 296 | 		return ret; | 
 | 297 |  | 
 | 298 | 	if (pdata->power_suspend) | 
 | 299 | 		pdata->power_suspend(pdev); | 
 | 300 |  | 
 | 301 | 	pinctrl_pm_select_sleep_state(dev); | 
 | 302 |  | 
 | 303 | 	return ret; | 
 | 304 | } | 
 | 305 |  | 
 | 306 | static int st_ehci_resume(struct device *dev) | 
 | 307 | { | 
 | 308 | 	struct usb_hcd *hcd = dev_get_drvdata(dev); | 
 | 309 | 	struct usb_ehci_pdata *pdata = dev_get_platdata(dev); | 
 | 310 | 	struct platform_device *pdev = to_platform_device(dev); | 
 | 311 | 	int err; | 
 | 312 |  | 
 | 313 | 	pinctrl_pm_select_default_state(dev); | 
 | 314 |  | 
 | 315 | 	if (pdata->power_on) { | 
 | 316 | 		err = pdata->power_on(pdev); | 
 | 317 | 		if (err < 0) | 
 | 318 | 			return err; | 
 | 319 | 	} | 
 | 320 |  | 
 | 321 | 	ehci_resume(hcd, false); | 
 | 322 | 	return 0; | 
 | 323 | } | 
 | 324 |  | 
 | 325 | static SIMPLE_DEV_PM_OPS(st_ehci_pm_ops, st_ehci_suspend, st_ehci_resume); | 
 | 326 |  | 
 | 327 | #endif /* CONFIG_PM_SLEEP */ | 
 | 328 |  | 
 | 329 | static const struct of_device_id st_ehci_ids[] = { | 
 | 330 | 	{ .compatible = "st,st-ehci-300x", }, | 
 | 331 | 	{ /* sentinel */ } | 
 | 332 | }; | 
 | 333 | MODULE_DEVICE_TABLE(of, st_ehci_ids); | 
 | 334 |  | 
 | 335 | static struct platform_driver ehci_platform_driver = { | 
 | 336 | 	.probe		= st_ehci_platform_probe, | 
 | 337 | 	.remove		= st_ehci_platform_remove, | 
 | 338 | 	.shutdown	= usb_hcd_platform_shutdown, | 
 | 339 | 	.driver		= { | 
 | 340 | 		.name	= "st-ehci", | 
 | 341 | #ifdef CONFIG_PM_SLEEP | 
 | 342 | 		.pm	= &st_ehci_pm_ops, | 
 | 343 | #endif | 
 | 344 | 		.of_match_table = st_ehci_ids, | 
 | 345 | 	} | 
 | 346 | }; | 
 | 347 |  | 
 | 348 | static int __init ehci_platform_init(void) | 
 | 349 | { | 
 | 350 | 	if (usb_disabled()) | 
 | 351 | 		return -ENODEV; | 
 | 352 |  | 
 | 353 | 	pr_info("%s: " DRIVER_DESC "\n", hcd_name); | 
 | 354 |  | 
 | 355 | 	ehci_init_driver(&ehci_platform_hc_driver, &platform_overrides); | 
 | 356 | 	return platform_driver_register(&ehci_platform_driver); | 
 | 357 | } | 
 | 358 | module_init(ehci_platform_init); | 
 | 359 |  | 
 | 360 | static void __exit ehci_platform_cleanup(void) | 
 | 361 | { | 
 | 362 | 	platform_driver_unregister(&ehci_platform_driver); | 
 | 363 | } | 
 | 364 | module_exit(ehci_platform_cleanup); | 
 | 365 |  | 
 | 366 | MODULE_DESCRIPTION(DRIVER_DESC); | 
 | 367 | MODULE_AUTHOR("Peter Griffin <peter.griffin@linaro.org>"); | 
 | 368 | MODULE_LICENSE("GPL"); |