| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 | 
 | 2 | /* | 
 | 3 |  * Copyright (C) 2006  Ralf Baechle <ralf@linux-mips.org> | 
 | 4 |  */ | 
 | 5 | #include <linux/dma-direct.h> | 
 | 6 | #include <asm/ip32/crime.h> | 
 | 7 |  | 
 | 8 | /* | 
 | 9 |  * Few notes. | 
 | 10 |  * 1. CPU sees memory as two chunks: 0-256M@0x0, and the rest @0x40000000+256M | 
 | 11 |  * 2. PCI sees memory as one big chunk @0x0 (or we could use 0x40000000 for | 
 | 12 |  *    native-endian) | 
 | 13 |  * 3. All other devices see memory as one big chunk at 0x40000000 | 
 | 14 |  * 4. Non-PCI devices will pass NULL as struct device* | 
 | 15 |  * | 
 | 16 |  * Thus we translate differently, depending on device. | 
 | 17 |  */ | 
 | 18 |  | 
 | 19 | #define RAM_OFFSET_MASK 0x3fffffffUL | 
 | 20 |  | 
 | 21 | dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr) | 
 | 22 | { | 
 | 23 | 	dma_addr_t dma_addr = paddr & RAM_OFFSET_MASK; | 
 | 24 |  | 
 | 25 | 	if (!dev) | 
 | 26 | 		dma_addr += CRIME_HI_MEM_BASE; | 
 | 27 | 	return dma_addr; | 
 | 28 | } | 
 | 29 |  | 
 | 30 | phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t dma_addr) | 
 | 31 | { | 
 | 32 | 	phys_addr_t paddr = dma_addr & RAM_OFFSET_MASK; | 
 | 33 |  | 
 | 34 | 	if (dma_addr >= 256*1024*1024) | 
 | 35 | 		paddr += CRIME_HI_MEM_BASE; | 
 | 36 | 	return paddr; | 
 | 37 | } |