| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 | 
|  | 2 | /* | 
|  | 3 | * debugfs.c - Designware USB2 DRD controller debugfs | 
|  | 4 | * | 
|  | 5 | * Copyright (C) 2015 Intel Corporation | 
|  | 6 | * Mian Yousaf Kaukab <yousaf.kaukab@intel.com> | 
|  | 7 | */ | 
|  | 8 |  | 
|  | 9 | #include <linux/spinlock.h> | 
|  | 10 | #include <linux/debugfs.h> | 
|  | 11 | #include <linux/seq_file.h> | 
|  | 12 | #include <linux/uaccess.h> | 
|  | 13 |  | 
|  | 14 | #include "core.h" | 
|  | 15 | #include "debug.h" | 
|  | 16 |  | 
|  | 17 | #if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \ | 
|  | 18 | IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) | 
|  | 19 |  | 
|  | 20 | /** | 
|  | 21 | * testmode_write() - change usb test mode state. | 
|  | 22 | * @file: The  file to write to. | 
|  | 23 | * @ubuf: The buffer where user wrote. | 
|  | 24 | * @count: The ubuf size. | 
|  | 25 | * @ppos: Unused parameter. | 
|  | 26 | */ | 
|  | 27 | static ssize_t testmode_write(struct file *file, const char __user *ubuf, size_t | 
|  | 28 | count, loff_t *ppos) | 
|  | 29 | { | 
|  | 30 | struct seq_file		*s = file->private_data; | 
|  | 31 | struct dwc2_hsotg	*hsotg = s->private; | 
|  | 32 | unsigned long		flags; | 
|  | 33 | u32			testmode = 0; | 
|  | 34 | char			buf[32]; | 
|  | 35 |  | 
|  | 36 | if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) | 
|  | 37 | return -EFAULT; | 
|  | 38 |  | 
|  | 39 | if (!strncmp(buf, "test_j", 6)) | 
|  | 40 | testmode = TEST_J; | 
|  | 41 | else if (!strncmp(buf, "test_k", 6)) | 
|  | 42 | testmode = TEST_K; | 
|  | 43 | else if (!strncmp(buf, "test_se0_nak", 12)) | 
|  | 44 | testmode = TEST_SE0_NAK; | 
|  | 45 | else if (!strncmp(buf, "test_packet", 11)) | 
|  | 46 | testmode = TEST_PACKET; | 
|  | 47 | else if (!strncmp(buf, "test_force_enable", 17)) | 
|  | 48 | testmode = TEST_FORCE_EN; | 
|  | 49 | else | 
|  | 50 | testmode = 0; | 
|  | 51 |  | 
|  | 52 | spin_lock_irqsave(&hsotg->lock, flags); | 
|  | 53 | dwc2_hsotg_set_test_mode(hsotg, testmode); | 
|  | 54 | spin_unlock_irqrestore(&hsotg->lock, flags); | 
|  | 55 | return count; | 
|  | 56 | } | 
|  | 57 |  | 
|  | 58 | /** | 
|  | 59 | * testmode_show() - debugfs: show usb test mode state | 
|  | 60 | * @s: The seq file to write to. | 
|  | 61 | * @unused: Unused parameter. | 
|  | 62 | * | 
|  | 63 | * This debugfs entry shows which usb test mode is currently enabled. | 
|  | 64 | */ | 
|  | 65 | static int testmode_show(struct seq_file *s, void *unused) | 
|  | 66 | { | 
|  | 67 | struct dwc2_hsotg *hsotg = s->private; | 
|  | 68 | unsigned long flags; | 
|  | 69 | int dctl; | 
|  | 70 |  | 
|  | 71 | spin_lock_irqsave(&hsotg->lock, flags); | 
|  | 72 | dctl = dwc2_readl(hsotg, DCTL); | 
|  | 73 | dctl &= DCTL_TSTCTL_MASK; | 
|  | 74 | dctl >>= DCTL_TSTCTL_SHIFT; | 
|  | 75 | spin_unlock_irqrestore(&hsotg->lock, flags); | 
|  | 76 |  | 
|  | 77 | switch (dctl) { | 
|  | 78 | case 0: | 
|  | 79 | seq_puts(s, "no test\n"); | 
|  | 80 | break; | 
|  | 81 | case TEST_J: | 
|  | 82 | seq_puts(s, "test_j\n"); | 
|  | 83 | break; | 
|  | 84 | case TEST_K: | 
|  | 85 | seq_puts(s, "test_k\n"); | 
|  | 86 | break; | 
|  | 87 | case TEST_SE0_NAK: | 
|  | 88 | seq_puts(s, "test_se0_nak\n"); | 
|  | 89 | break; | 
|  | 90 | case TEST_PACKET: | 
|  | 91 | seq_puts(s, "test_packet\n"); | 
|  | 92 | break; | 
|  | 93 | case TEST_FORCE_EN: | 
|  | 94 | seq_puts(s, "test_force_enable\n"); | 
|  | 95 | break; | 
|  | 96 | default: | 
|  | 97 | seq_printf(s, "UNKNOWN %d\n", dctl); | 
|  | 98 | } | 
|  | 99 |  | 
|  | 100 | return 0; | 
|  | 101 | } | 
|  | 102 |  | 
|  | 103 | static int testmode_open(struct inode *inode, struct file *file) | 
|  | 104 | { | 
|  | 105 | return single_open(file, testmode_show, inode->i_private); | 
|  | 106 | } | 
|  | 107 |  | 
|  | 108 | static const struct file_operations testmode_fops = { | 
|  | 109 | .owner		= THIS_MODULE, | 
|  | 110 | .open		= testmode_open, | 
|  | 111 | .write		= testmode_write, | 
|  | 112 | .read		= seq_read, | 
|  | 113 | .llseek		= seq_lseek, | 
|  | 114 | .release	= single_release, | 
|  | 115 | }; | 
|  | 116 |  | 
|  | 117 | /** | 
|  | 118 | * state_show - debugfs: show overall driver and device state. | 
|  | 119 | * @seq: The seq file to write to. | 
|  | 120 | * @v: Unused parameter. | 
|  | 121 | * | 
|  | 122 | * This debugfs entry shows the overall state of the hardware and | 
|  | 123 | * some general information about each of the endpoints available | 
|  | 124 | * to the system. | 
|  | 125 | */ | 
|  | 126 | static int state_show(struct seq_file *seq, void *v) | 
|  | 127 | { | 
|  | 128 | struct dwc2_hsotg *hsotg = seq->private; | 
|  | 129 | int idx; | 
|  | 130 |  | 
|  | 131 | seq_printf(seq, "DCFG=0x%08x, DCTL=0x%08x, DSTS=0x%08x\n", | 
|  | 132 | dwc2_readl(hsotg, DCFG), | 
|  | 133 | dwc2_readl(hsotg, DCTL), | 
|  | 134 | dwc2_readl(hsotg, DSTS)); | 
|  | 135 |  | 
|  | 136 | seq_printf(seq, "DIEPMSK=0x%08x, DOEPMASK=0x%08x\n", | 
|  | 137 | dwc2_readl(hsotg, DIEPMSK), dwc2_readl(hsotg, DOEPMSK)); | 
|  | 138 |  | 
|  | 139 | seq_printf(seq, "GINTMSK=0x%08x, GINTSTS=0x%08x\n", | 
|  | 140 | dwc2_readl(hsotg, GINTMSK), | 
|  | 141 | dwc2_readl(hsotg, GINTSTS)); | 
|  | 142 |  | 
|  | 143 | seq_printf(seq, "DAINTMSK=0x%08x, DAINT=0x%08x\n", | 
|  | 144 | dwc2_readl(hsotg, DAINTMSK), | 
|  | 145 | dwc2_readl(hsotg, DAINT)); | 
|  | 146 |  | 
|  | 147 | seq_printf(seq, "GNPTXSTS=0x%08x, GRXSTSR=%08x\n", | 
|  | 148 | dwc2_readl(hsotg, GNPTXSTS), | 
|  | 149 | dwc2_readl(hsotg, GRXSTSR)); | 
|  | 150 |  | 
|  | 151 | seq_puts(seq, "\nEndpoint status:\n"); | 
|  | 152 |  | 
|  | 153 | for (idx = 0; idx < hsotg->num_of_eps; idx++) { | 
|  | 154 | u32 in, out; | 
|  | 155 |  | 
|  | 156 | in = dwc2_readl(hsotg, DIEPCTL(idx)); | 
|  | 157 | out = dwc2_readl(hsotg, DOEPCTL(idx)); | 
|  | 158 |  | 
|  | 159 | seq_printf(seq, "ep%d: DIEPCTL=0x%08x, DOEPCTL=0x%08x", | 
|  | 160 | idx, in, out); | 
|  | 161 |  | 
|  | 162 | in = dwc2_readl(hsotg, DIEPTSIZ(idx)); | 
|  | 163 | out = dwc2_readl(hsotg, DOEPTSIZ(idx)); | 
|  | 164 |  | 
|  | 165 | seq_printf(seq, ", DIEPTSIZ=0x%08x, DOEPTSIZ=0x%08x", | 
|  | 166 | in, out); | 
|  | 167 |  | 
|  | 168 | seq_puts(seq, "\n"); | 
|  | 169 | } | 
|  | 170 |  | 
|  | 171 | return 0; | 
|  | 172 | } | 
|  | 173 | DEFINE_SHOW_ATTRIBUTE(state); | 
|  | 174 |  | 
|  | 175 | /** | 
|  | 176 | * fifo_show - debugfs: show the fifo information | 
|  | 177 | * @seq: The seq_file to write data to. | 
|  | 178 | * @v: Unused parameter. | 
|  | 179 | * | 
|  | 180 | * Show the FIFO information for the overall fifo and all the | 
|  | 181 | * periodic transmission FIFOs. | 
|  | 182 | */ | 
|  | 183 | static int fifo_show(struct seq_file *seq, void *v) | 
|  | 184 | { | 
|  | 185 | struct dwc2_hsotg *hsotg = seq->private; | 
|  | 186 | u32 val; | 
|  | 187 | int idx; | 
|  | 188 |  | 
|  | 189 | seq_puts(seq, "Non-periodic FIFOs:\n"); | 
|  | 190 | seq_printf(seq, "RXFIFO: Size %d\n", dwc2_readl(hsotg, GRXFSIZ)); | 
|  | 191 |  | 
|  | 192 | val = dwc2_readl(hsotg, GNPTXFSIZ); | 
|  | 193 | seq_printf(seq, "NPTXFIFO: Size %d, Start 0x%08x\n", | 
|  | 194 | val >> FIFOSIZE_DEPTH_SHIFT, | 
|  | 195 | val & FIFOSIZE_STARTADDR_MASK); | 
|  | 196 |  | 
|  | 197 | seq_puts(seq, "\nPeriodic TXFIFOs:\n"); | 
|  | 198 |  | 
|  | 199 | for (idx = 1; idx < hsotg->num_of_eps; idx++) { | 
|  | 200 | val = dwc2_readl(hsotg, DPTXFSIZN(idx)); | 
|  | 201 |  | 
|  | 202 | seq_printf(seq, "\tDPTXFIFO%2d: Size %d, Start 0x%08x\n", idx, | 
|  | 203 | val >> FIFOSIZE_DEPTH_SHIFT, | 
|  | 204 | val & FIFOSIZE_STARTADDR_MASK); | 
|  | 205 | } | 
|  | 206 |  | 
|  | 207 | return 0; | 
|  | 208 | } | 
|  | 209 | DEFINE_SHOW_ATTRIBUTE(fifo); | 
|  | 210 |  | 
|  | 211 | static const char *decode_direction(int is_in) | 
|  | 212 | { | 
|  | 213 | return is_in ? "in" : "out"; | 
|  | 214 | } | 
|  | 215 |  | 
|  | 216 | /** | 
|  | 217 | * ep_show - debugfs: show the state of an endpoint. | 
|  | 218 | * @seq: The seq_file to write data to. | 
|  | 219 | * @v: Unused parameter. | 
|  | 220 | * | 
|  | 221 | * This debugfs entry shows the state of the given endpoint (one is | 
|  | 222 | * registered for each available). | 
|  | 223 | */ | 
|  | 224 | static int ep_show(struct seq_file *seq, void *v) | 
|  | 225 | { | 
|  | 226 | struct dwc2_hsotg_ep *ep = seq->private; | 
|  | 227 | struct dwc2_hsotg *hsotg = ep->parent; | 
|  | 228 | struct dwc2_hsotg_req *req; | 
|  | 229 | int index = ep->index; | 
|  | 230 | int show_limit = 15; | 
|  | 231 | unsigned long flags; | 
|  | 232 |  | 
|  | 233 | seq_printf(seq, "Endpoint index %d, named %s,  dir %s:\n", | 
|  | 234 | ep->index, ep->ep.name, decode_direction(ep->dir_in)); | 
|  | 235 |  | 
|  | 236 | /* first show the register state */ | 
|  | 237 |  | 
|  | 238 | seq_printf(seq, "\tDIEPCTL=0x%08x, DOEPCTL=0x%08x\n", | 
|  | 239 | dwc2_readl(hsotg, DIEPCTL(index)), | 
|  | 240 | dwc2_readl(hsotg, DOEPCTL(index))); | 
|  | 241 |  | 
|  | 242 | seq_printf(seq, "\tDIEPDMA=0x%08x, DOEPDMA=0x%08x\n", | 
|  | 243 | dwc2_readl(hsotg, DIEPDMA(index)), | 
|  | 244 | dwc2_readl(hsotg, DOEPDMA(index))); | 
|  | 245 |  | 
|  | 246 | seq_printf(seq, "\tDIEPINT=0x%08x, DOEPINT=0x%08x\n", | 
|  | 247 | dwc2_readl(hsotg, DIEPINT(index)), | 
|  | 248 | dwc2_readl(hsotg, DOEPINT(index))); | 
|  | 249 |  | 
|  | 250 | seq_printf(seq, "\tDIEPTSIZ=0x%08x, DOEPTSIZ=0x%08x\n", | 
|  | 251 | dwc2_readl(hsotg, DIEPTSIZ(index)), | 
|  | 252 | dwc2_readl(hsotg, DOEPTSIZ(index))); | 
|  | 253 |  | 
|  | 254 | seq_puts(seq, "\n"); | 
|  | 255 | seq_printf(seq, "mps %d\n", ep->ep.maxpacket); | 
|  | 256 | seq_printf(seq, "total_data=%ld\n", ep->total_data); | 
|  | 257 |  | 
|  | 258 | seq_printf(seq, "request list (%p,%p):\n", | 
|  | 259 | ep->queue.next, ep->queue.prev); | 
|  | 260 |  | 
|  | 261 | spin_lock_irqsave(&hsotg->lock, flags); | 
|  | 262 |  | 
|  | 263 | list_for_each_entry(req, &ep->queue, queue) { | 
|  | 264 | if (--show_limit < 0) { | 
|  | 265 | seq_puts(seq, "not showing more requests...\n"); | 
|  | 266 | break; | 
|  | 267 | } | 
|  | 268 |  | 
|  | 269 | seq_printf(seq, "%c req %p: %d bytes @%p, ", | 
|  | 270 | req == ep->req ? '*' : ' ', | 
|  | 271 | req, req->req.length, req->req.buf); | 
|  | 272 | seq_printf(seq, "%d done, res %d\n", | 
|  | 273 | req->req.actual, req->req.status); | 
|  | 274 | } | 
|  | 275 |  | 
|  | 276 | spin_unlock_irqrestore(&hsotg->lock, flags); | 
|  | 277 |  | 
|  | 278 | return 0; | 
|  | 279 | } | 
|  | 280 | DEFINE_SHOW_ATTRIBUTE(ep); | 
|  | 281 |  | 
|  | 282 | /** | 
|  | 283 | * dwc2_hsotg_create_debug - create debugfs directory and files | 
|  | 284 | * @hsotg: The driver state | 
|  | 285 | * | 
|  | 286 | * Create the debugfs files to allow the user to get information | 
|  | 287 | * about the state of the system. The directory name is created | 
|  | 288 | * with the same name as the device itself, in case we end up | 
|  | 289 | * with multiple blocks in future systems. | 
|  | 290 | */ | 
|  | 291 | static void dwc2_hsotg_create_debug(struct dwc2_hsotg *hsotg) | 
|  | 292 | { | 
|  | 293 | struct dentry *root; | 
|  | 294 | unsigned int epidx; | 
|  | 295 |  | 
|  | 296 | root = hsotg->debug_root; | 
|  | 297 |  | 
|  | 298 | /* create general state file */ | 
|  | 299 | debugfs_create_file("state", 0444, root, hsotg, &state_fops); | 
|  | 300 | debugfs_create_file("testmode", 0644, root, hsotg, &testmode_fops); | 
|  | 301 | debugfs_create_file("fifo", 0444, root, hsotg, &fifo_fops); | 
|  | 302 |  | 
|  | 303 | /* Create one file for each out endpoint */ | 
|  | 304 | for (epidx = 0; epidx < hsotg->num_of_eps; epidx++) { | 
|  | 305 | struct dwc2_hsotg_ep *ep; | 
|  | 306 |  | 
|  | 307 | ep = hsotg->eps_out[epidx]; | 
|  | 308 | if (ep) | 
|  | 309 | debugfs_create_file(ep->name, 0444, root, ep, &ep_fops); | 
|  | 310 | } | 
|  | 311 | /* Create one file for each in endpoint. EP0 is handled with out eps */ | 
|  | 312 | for (epidx = 1; epidx < hsotg->num_of_eps; epidx++) { | 
|  | 313 | struct dwc2_hsotg_ep *ep; | 
|  | 314 |  | 
|  | 315 | ep = hsotg->eps_in[epidx]; | 
|  | 316 | if (ep) | 
|  | 317 | debugfs_create_file(ep->name, 0444, root, ep, &ep_fops); | 
|  | 318 | } | 
|  | 319 | } | 
|  | 320 | #else | 
|  | 321 | static inline void dwc2_hsotg_create_debug(struct dwc2_hsotg *hsotg) {} | 
|  | 322 | #endif | 
|  | 323 |  | 
|  | 324 | /* dwc2_hsotg_delete_debug is removed as cleanup in done in dwc2_debugfs_exit */ | 
|  | 325 |  | 
|  | 326 | #define dump_register(nm)	\ | 
|  | 327 | {				\ | 
|  | 328 | .name	= #nm,		\ | 
|  | 329 | .offset	= nm,		\ | 
|  | 330 | } | 
|  | 331 |  | 
|  | 332 | static const struct debugfs_reg32 dwc2_regs[] = { | 
|  | 333 | /* | 
|  | 334 | * Accessing registers like this can trigger mode mismatch interrupt. | 
|  | 335 | * However, according to dwc2 databook, the register access, in this | 
|  | 336 | * case, is completed on the processor bus but is ignored by the core | 
|  | 337 | * and does not affect its operation. | 
|  | 338 | */ | 
|  | 339 | dump_register(GOTGCTL), | 
|  | 340 | dump_register(GOTGINT), | 
|  | 341 | dump_register(GAHBCFG), | 
|  | 342 | dump_register(GUSBCFG), | 
|  | 343 | dump_register(GRSTCTL), | 
|  | 344 | dump_register(GINTSTS), | 
|  | 345 | dump_register(GINTMSK), | 
|  | 346 | dump_register(GRXSTSR), | 
|  | 347 | /* Omit GRXSTSP */ | 
|  | 348 | dump_register(GRXFSIZ), | 
|  | 349 | dump_register(GNPTXFSIZ), | 
|  | 350 | dump_register(GNPTXSTS), | 
|  | 351 | dump_register(GI2CCTL), | 
|  | 352 | dump_register(GPVNDCTL), | 
|  | 353 | dump_register(GGPIO), | 
|  | 354 | dump_register(GUID), | 
|  | 355 | dump_register(GSNPSID), | 
|  | 356 | dump_register(GHWCFG1), | 
|  | 357 | dump_register(GHWCFG2), | 
|  | 358 | dump_register(GHWCFG3), | 
|  | 359 | dump_register(GHWCFG4), | 
|  | 360 | dump_register(GLPMCFG), | 
|  | 361 | dump_register(GPWRDN), | 
|  | 362 | dump_register(GDFIFOCFG), | 
|  | 363 | dump_register(ADPCTL), | 
|  | 364 | dump_register(HPTXFSIZ), | 
|  | 365 | dump_register(DPTXFSIZN(1)), | 
|  | 366 | dump_register(DPTXFSIZN(2)), | 
|  | 367 | dump_register(DPTXFSIZN(3)), | 
|  | 368 | dump_register(DPTXFSIZN(4)), | 
|  | 369 | dump_register(DPTXFSIZN(5)), | 
|  | 370 | dump_register(DPTXFSIZN(6)), | 
|  | 371 | dump_register(DPTXFSIZN(7)), | 
|  | 372 | dump_register(DPTXFSIZN(8)), | 
|  | 373 | dump_register(DPTXFSIZN(9)), | 
|  | 374 | dump_register(DPTXFSIZN(10)), | 
|  | 375 | dump_register(DPTXFSIZN(11)), | 
|  | 376 | dump_register(DPTXFSIZN(12)), | 
|  | 377 | dump_register(DPTXFSIZN(13)), | 
|  | 378 | dump_register(DPTXFSIZN(14)), | 
|  | 379 | dump_register(DPTXFSIZN(15)), | 
|  | 380 | dump_register(DCFG), | 
|  | 381 | dump_register(DCTL), | 
|  | 382 | dump_register(DSTS), | 
|  | 383 | dump_register(DIEPMSK), | 
|  | 384 | dump_register(DOEPMSK), | 
|  | 385 | dump_register(DAINT), | 
|  | 386 | dump_register(DAINTMSK), | 
|  | 387 | dump_register(DTKNQR1), | 
|  | 388 | dump_register(DTKNQR2), | 
|  | 389 | dump_register(DTKNQR3), | 
|  | 390 | dump_register(DTKNQR4), | 
|  | 391 | dump_register(DVBUSDIS), | 
|  | 392 | dump_register(DVBUSPULSE), | 
|  | 393 | dump_register(DIEPCTL(0)), | 
|  | 394 | dump_register(DIEPCTL(1)), | 
|  | 395 | dump_register(DIEPCTL(2)), | 
|  | 396 | dump_register(DIEPCTL(3)), | 
|  | 397 | dump_register(DIEPCTL(4)), | 
|  | 398 | dump_register(DIEPCTL(5)), | 
|  | 399 | dump_register(DIEPCTL(6)), | 
|  | 400 | dump_register(DIEPCTL(7)), | 
|  | 401 | dump_register(DIEPCTL(8)), | 
|  | 402 | dump_register(DIEPCTL(9)), | 
|  | 403 | dump_register(DIEPCTL(10)), | 
|  | 404 | dump_register(DIEPCTL(11)), | 
|  | 405 | dump_register(DIEPCTL(12)), | 
|  | 406 | dump_register(DIEPCTL(13)), | 
|  | 407 | dump_register(DIEPCTL(14)), | 
|  | 408 | dump_register(DIEPCTL(15)), | 
|  | 409 | dump_register(DOEPCTL(0)), | 
|  | 410 | dump_register(DOEPCTL(1)), | 
|  | 411 | dump_register(DOEPCTL(2)), | 
|  | 412 | dump_register(DOEPCTL(3)), | 
|  | 413 | dump_register(DOEPCTL(4)), | 
|  | 414 | dump_register(DOEPCTL(5)), | 
|  | 415 | dump_register(DOEPCTL(6)), | 
|  | 416 | dump_register(DOEPCTL(7)), | 
|  | 417 | dump_register(DOEPCTL(8)), | 
|  | 418 | dump_register(DOEPCTL(9)), | 
|  | 419 | dump_register(DOEPCTL(10)), | 
|  | 420 | dump_register(DOEPCTL(11)), | 
|  | 421 | dump_register(DOEPCTL(12)), | 
|  | 422 | dump_register(DOEPCTL(13)), | 
|  | 423 | dump_register(DOEPCTL(14)), | 
|  | 424 | dump_register(DOEPCTL(15)), | 
|  | 425 | dump_register(DIEPINT(0)), | 
|  | 426 | dump_register(DIEPINT(1)), | 
|  | 427 | dump_register(DIEPINT(2)), | 
|  | 428 | dump_register(DIEPINT(3)), | 
|  | 429 | dump_register(DIEPINT(4)), | 
|  | 430 | dump_register(DIEPINT(5)), | 
|  | 431 | dump_register(DIEPINT(6)), | 
|  | 432 | dump_register(DIEPINT(7)), | 
|  | 433 | dump_register(DIEPINT(8)), | 
|  | 434 | dump_register(DIEPINT(9)), | 
|  | 435 | dump_register(DIEPINT(10)), | 
|  | 436 | dump_register(DIEPINT(11)), | 
|  | 437 | dump_register(DIEPINT(12)), | 
|  | 438 | dump_register(DIEPINT(13)), | 
|  | 439 | dump_register(DIEPINT(14)), | 
|  | 440 | dump_register(DIEPINT(15)), | 
|  | 441 | dump_register(DOEPINT(0)), | 
|  | 442 | dump_register(DOEPINT(1)), | 
|  | 443 | dump_register(DOEPINT(2)), | 
|  | 444 | dump_register(DOEPINT(3)), | 
|  | 445 | dump_register(DOEPINT(4)), | 
|  | 446 | dump_register(DOEPINT(5)), | 
|  | 447 | dump_register(DOEPINT(6)), | 
|  | 448 | dump_register(DOEPINT(7)), | 
|  | 449 | dump_register(DOEPINT(8)), | 
|  | 450 | dump_register(DOEPINT(9)), | 
|  | 451 | dump_register(DOEPINT(10)), | 
|  | 452 | dump_register(DOEPINT(11)), | 
|  | 453 | dump_register(DOEPINT(12)), | 
|  | 454 | dump_register(DOEPINT(13)), | 
|  | 455 | dump_register(DOEPINT(14)), | 
|  | 456 | dump_register(DOEPINT(15)), | 
|  | 457 | dump_register(DIEPTSIZ(0)), | 
|  | 458 | dump_register(DIEPTSIZ(1)), | 
|  | 459 | dump_register(DIEPTSIZ(2)), | 
|  | 460 | dump_register(DIEPTSIZ(3)), | 
|  | 461 | dump_register(DIEPTSIZ(4)), | 
|  | 462 | dump_register(DIEPTSIZ(5)), | 
|  | 463 | dump_register(DIEPTSIZ(6)), | 
|  | 464 | dump_register(DIEPTSIZ(7)), | 
|  | 465 | dump_register(DIEPTSIZ(8)), | 
|  | 466 | dump_register(DIEPTSIZ(9)), | 
|  | 467 | dump_register(DIEPTSIZ(10)), | 
|  | 468 | dump_register(DIEPTSIZ(11)), | 
|  | 469 | dump_register(DIEPTSIZ(12)), | 
|  | 470 | dump_register(DIEPTSIZ(13)), | 
|  | 471 | dump_register(DIEPTSIZ(14)), | 
|  | 472 | dump_register(DIEPTSIZ(15)), | 
|  | 473 | dump_register(DOEPTSIZ(0)), | 
|  | 474 | dump_register(DOEPTSIZ(1)), | 
|  | 475 | dump_register(DOEPTSIZ(2)), | 
|  | 476 | dump_register(DOEPTSIZ(3)), | 
|  | 477 | dump_register(DOEPTSIZ(4)), | 
|  | 478 | dump_register(DOEPTSIZ(5)), | 
|  | 479 | dump_register(DOEPTSIZ(6)), | 
|  | 480 | dump_register(DOEPTSIZ(7)), | 
|  | 481 | dump_register(DOEPTSIZ(8)), | 
|  | 482 | dump_register(DOEPTSIZ(9)), | 
|  | 483 | dump_register(DOEPTSIZ(10)), | 
|  | 484 | dump_register(DOEPTSIZ(11)), | 
|  | 485 | dump_register(DOEPTSIZ(12)), | 
|  | 486 | dump_register(DOEPTSIZ(13)), | 
|  | 487 | dump_register(DOEPTSIZ(14)), | 
|  | 488 | dump_register(DOEPTSIZ(15)), | 
|  | 489 | dump_register(DIEPDMA(0)), | 
|  | 490 | dump_register(DIEPDMA(1)), | 
|  | 491 | dump_register(DIEPDMA(2)), | 
|  | 492 | dump_register(DIEPDMA(3)), | 
|  | 493 | dump_register(DIEPDMA(4)), | 
|  | 494 | dump_register(DIEPDMA(5)), | 
|  | 495 | dump_register(DIEPDMA(6)), | 
|  | 496 | dump_register(DIEPDMA(7)), | 
|  | 497 | dump_register(DIEPDMA(8)), | 
|  | 498 | dump_register(DIEPDMA(9)), | 
|  | 499 | dump_register(DIEPDMA(10)), | 
|  | 500 | dump_register(DIEPDMA(11)), | 
|  | 501 | dump_register(DIEPDMA(12)), | 
|  | 502 | dump_register(DIEPDMA(13)), | 
|  | 503 | dump_register(DIEPDMA(14)), | 
|  | 504 | dump_register(DIEPDMA(15)), | 
|  | 505 | dump_register(DOEPDMA(0)), | 
|  | 506 | dump_register(DOEPDMA(1)), | 
|  | 507 | dump_register(DOEPDMA(2)), | 
|  | 508 | dump_register(DOEPDMA(3)), | 
|  | 509 | dump_register(DOEPDMA(4)), | 
|  | 510 | dump_register(DOEPDMA(5)), | 
|  | 511 | dump_register(DOEPDMA(6)), | 
|  | 512 | dump_register(DOEPDMA(7)), | 
|  | 513 | dump_register(DOEPDMA(8)), | 
|  | 514 | dump_register(DOEPDMA(9)), | 
|  | 515 | dump_register(DOEPDMA(10)), | 
|  | 516 | dump_register(DOEPDMA(11)), | 
|  | 517 | dump_register(DOEPDMA(12)), | 
|  | 518 | dump_register(DOEPDMA(13)), | 
|  | 519 | dump_register(DOEPDMA(14)), | 
|  | 520 | dump_register(DOEPDMA(15)), | 
|  | 521 | dump_register(DTXFSTS(0)), | 
|  | 522 | dump_register(DTXFSTS(1)), | 
|  | 523 | dump_register(DTXFSTS(2)), | 
|  | 524 | dump_register(DTXFSTS(3)), | 
|  | 525 | dump_register(DTXFSTS(4)), | 
|  | 526 | dump_register(DTXFSTS(5)), | 
|  | 527 | dump_register(DTXFSTS(6)), | 
|  | 528 | dump_register(DTXFSTS(7)), | 
|  | 529 | dump_register(DTXFSTS(8)), | 
|  | 530 | dump_register(DTXFSTS(9)), | 
|  | 531 | dump_register(DTXFSTS(10)), | 
|  | 532 | dump_register(DTXFSTS(11)), | 
|  | 533 | dump_register(DTXFSTS(12)), | 
|  | 534 | dump_register(DTXFSTS(13)), | 
|  | 535 | dump_register(DTXFSTS(14)), | 
|  | 536 | dump_register(DTXFSTS(15)), | 
|  | 537 | dump_register(PCGCTL), | 
|  | 538 | dump_register(HCFG), | 
|  | 539 | dump_register(HFIR), | 
|  | 540 | dump_register(HFNUM), | 
|  | 541 | dump_register(HPTXSTS), | 
|  | 542 | dump_register(HAINT), | 
|  | 543 | dump_register(HAINTMSK), | 
|  | 544 | dump_register(HFLBADDR), | 
|  | 545 | dump_register(HPRT0), | 
|  | 546 | dump_register(HCCHAR(0)), | 
|  | 547 | dump_register(HCCHAR(1)), | 
|  | 548 | dump_register(HCCHAR(2)), | 
|  | 549 | dump_register(HCCHAR(3)), | 
|  | 550 | dump_register(HCCHAR(4)), | 
|  | 551 | dump_register(HCCHAR(5)), | 
|  | 552 | dump_register(HCCHAR(6)), | 
|  | 553 | dump_register(HCCHAR(7)), | 
|  | 554 | dump_register(HCCHAR(8)), | 
|  | 555 | dump_register(HCCHAR(9)), | 
|  | 556 | dump_register(HCCHAR(10)), | 
|  | 557 | dump_register(HCCHAR(11)), | 
|  | 558 | dump_register(HCCHAR(12)), | 
|  | 559 | dump_register(HCCHAR(13)), | 
|  | 560 | dump_register(HCCHAR(14)), | 
|  | 561 | dump_register(HCCHAR(15)), | 
|  | 562 | dump_register(HCSPLT(0)), | 
|  | 563 | dump_register(HCSPLT(1)), | 
|  | 564 | dump_register(HCSPLT(2)), | 
|  | 565 | dump_register(HCSPLT(3)), | 
|  | 566 | dump_register(HCSPLT(4)), | 
|  | 567 | dump_register(HCSPLT(5)), | 
|  | 568 | dump_register(HCSPLT(6)), | 
|  | 569 | dump_register(HCSPLT(7)), | 
|  | 570 | dump_register(HCSPLT(8)), | 
|  | 571 | dump_register(HCSPLT(9)), | 
|  | 572 | dump_register(HCSPLT(10)), | 
|  | 573 | dump_register(HCSPLT(11)), | 
|  | 574 | dump_register(HCSPLT(12)), | 
|  | 575 | dump_register(HCSPLT(13)), | 
|  | 576 | dump_register(HCSPLT(14)), | 
|  | 577 | dump_register(HCSPLT(15)), | 
|  | 578 | dump_register(HCINT(0)), | 
|  | 579 | dump_register(HCINT(1)), | 
|  | 580 | dump_register(HCINT(2)), | 
|  | 581 | dump_register(HCINT(3)), | 
|  | 582 | dump_register(HCINT(4)), | 
|  | 583 | dump_register(HCINT(5)), | 
|  | 584 | dump_register(HCINT(6)), | 
|  | 585 | dump_register(HCINT(7)), | 
|  | 586 | dump_register(HCINT(8)), | 
|  | 587 | dump_register(HCINT(9)), | 
|  | 588 | dump_register(HCINT(10)), | 
|  | 589 | dump_register(HCINT(11)), | 
|  | 590 | dump_register(HCINT(12)), | 
|  | 591 | dump_register(HCINT(13)), | 
|  | 592 | dump_register(HCINT(14)), | 
|  | 593 | dump_register(HCINT(15)), | 
|  | 594 | dump_register(HCINTMSK(0)), | 
|  | 595 | dump_register(HCINTMSK(1)), | 
|  | 596 | dump_register(HCINTMSK(2)), | 
|  | 597 | dump_register(HCINTMSK(3)), | 
|  | 598 | dump_register(HCINTMSK(4)), | 
|  | 599 | dump_register(HCINTMSK(5)), | 
|  | 600 | dump_register(HCINTMSK(6)), | 
|  | 601 | dump_register(HCINTMSK(7)), | 
|  | 602 | dump_register(HCINTMSK(8)), | 
|  | 603 | dump_register(HCINTMSK(9)), | 
|  | 604 | dump_register(HCINTMSK(10)), | 
|  | 605 | dump_register(HCINTMSK(11)), | 
|  | 606 | dump_register(HCINTMSK(12)), | 
|  | 607 | dump_register(HCINTMSK(13)), | 
|  | 608 | dump_register(HCINTMSK(14)), | 
|  | 609 | dump_register(HCINTMSK(15)), | 
|  | 610 | dump_register(HCTSIZ(0)), | 
|  | 611 | dump_register(HCTSIZ(1)), | 
|  | 612 | dump_register(HCTSIZ(2)), | 
|  | 613 | dump_register(HCTSIZ(3)), | 
|  | 614 | dump_register(HCTSIZ(4)), | 
|  | 615 | dump_register(HCTSIZ(5)), | 
|  | 616 | dump_register(HCTSIZ(6)), | 
|  | 617 | dump_register(HCTSIZ(7)), | 
|  | 618 | dump_register(HCTSIZ(8)), | 
|  | 619 | dump_register(HCTSIZ(9)), | 
|  | 620 | dump_register(HCTSIZ(10)), | 
|  | 621 | dump_register(HCTSIZ(11)), | 
|  | 622 | dump_register(HCTSIZ(12)), | 
|  | 623 | dump_register(HCTSIZ(13)), | 
|  | 624 | dump_register(HCTSIZ(14)), | 
|  | 625 | dump_register(HCTSIZ(15)), | 
|  | 626 | dump_register(HCDMA(0)), | 
|  | 627 | dump_register(HCDMA(1)), | 
|  | 628 | dump_register(HCDMA(2)), | 
|  | 629 | dump_register(HCDMA(3)), | 
|  | 630 | dump_register(HCDMA(4)), | 
|  | 631 | dump_register(HCDMA(5)), | 
|  | 632 | dump_register(HCDMA(6)), | 
|  | 633 | dump_register(HCDMA(7)), | 
|  | 634 | dump_register(HCDMA(8)), | 
|  | 635 | dump_register(HCDMA(9)), | 
|  | 636 | dump_register(HCDMA(10)), | 
|  | 637 | dump_register(HCDMA(11)), | 
|  | 638 | dump_register(HCDMA(12)), | 
|  | 639 | dump_register(HCDMA(13)), | 
|  | 640 | dump_register(HCDMA(14)), | 
|  | 641 | dump_register(HCDMA(15)), | 
|  | 642 | dump_register(HCDMAB(0)), | 
|  | 643 | dump_register(HCDMAB(1)), | 
|  | 644 | dump_register(HCDMAB(2)), | 
|  | 645 | dump_register(HCDMAB(3)), | 
|  | 646 | dump_register(HCDMAB(4)), | 
|  | 647 | dump_register(HCDMAB(5)), | 
|  | 648 | dump_register(HCDMAB(6)), | 
|  | 649 | dump_register(HCDMAB(7)), | 
|  | 650 | dump_register(HCDMAB(8)), | 
|  | 651 | dump_register(HCDMAB(9)), | 
|  | 652 | dump_register(HCDMAB(10)), | 
|  | 653 | dump_register(HCDMAB(11)), | 
|  | 654 | dump_register(HCDMAB(12)), | 
|  | 655 | dump_register(HCDMAB(13)), | 
|  | 656 | dump_register(HCDMAB(14)), | 
|  | 657 | dump_register(HCDMAB(15)), | 
|  | 658 | }; | 
|  | 659 |  | 
|  | 660 | #define print_param(_seq, _ptr, _param) \ | 
|  | 661 | seq_printf((_seq), "%-30s: %d\n", #_param, (_ptr)->_param) | 
|  | 662 |  | 
|  | 663 | #define print_param_hex(_seq, _ptr, _param) \ | 
|  | 664 | seq_printf((_seq), "%-30s: 0x%x\n", #_param, (_ptr)->_param) | 
|  | 665 |  | 
|  | 666 | static int params_show(struct seq_file *seq, void *v) | 
|  | 667 | { | 
|  | 668 | struct dwc2_hsotg *hsotg = seq->private; | 
|  | 669 | struct dwc2_core_params *p = &hsotg->params; | 
|  | 670 | int i; | 
|  | 671 |  | 
|  | 672 | print_param(seq, p, otg_cap); | 
|  | 673 | print_param(seq, p, dma_desc_enable); | 
|  | 674 | print_param(seq, p, dma_desc_fs_enable); | 
|  | 675 | print_param(seq, p, speed); | 
|  | 676 | print_param(seq, p, enable_dynamic_fifo); | 
|  | 677 | print_param(seq, p, en_multiple_tx_fifo); | 
|  | 678 | print_param(seq, p, host_rx_fifo_size); | 
|  | 679 | print_param(seq, p, host_nperio_tx_fifo_size); | 
|  | 680 | print_param(seq, p, host_perio_tx_fifo_size); | 
|  | 681 | print_param(seq, p, max_transfer_size); | 
|  | 682 | print_param(seq, p, max_packet_count); | 
|  | 683 | print_param(seq, p, host_channels); | 
|  | 684 | print_param(seq, p, phy_type); | 
|  | 685 | print_param(seq, p, phy_utmi_width); | 
|  | 686 | print_param(seq, p, phy_ulpi_ddr); | 
|  | 687 | print_param(seq, p, phy_ulpi_ext_vbus); | 
|  | 688 | print_param(seq, p, i2c_enable); | 
|  | 689 | print_param(seq, p, ipg_isoc_en); | 
|  | 690 | print_param(seq, p, ulpi_fs_ls); | 
|  | 691 | print_param(seq, p, host_support_fs_ls_low_power); | 
|  | 692 | print_param(seq, p, host_ls_low_power_phy_clk); | 
|  | 693 | print_param(seq, p, ts_dline); | 
|  | 694 | print_param(seq, p, reload_ctl); | 
|  | 695 | print_param_hex(seq, p, ahbcfg); | 
|  | 696 | print_param(seq, p, uframe_sched); | 
|  | 697 | print_param(seq, p, external_id_pin_ctl); | 
|  | 698 | print_param(seq, p, power_down); | 
|  | 699 | print_param(seq, p, lpm); | 
|  | 700 | print_param(seq, p, lpm_clock_gating); | 
|  | 701 | print_param(seq, p, besl); | 
|  | 702 | print_param(seq, p, hird_threshold_en); | 
|  | 703 | print_param(seq, p, hird_threshold); | 
|  | 704 | print_param(seq, p, host_dma); | 
|  | 705 | print_param(seq, p, g_dma); | 
|  | 706 | print_param(seq, p, g_dma_desc); | 
|  | 707 | print_param(seq, p, g_rx_fifo_size); | 
|  | 708 | print_param(seq, p, g_np_tx_fifo_size); | 
|  | 709 |  | 
|  | 710 | for (i = 0; i < MAX_EPS_CHANNELS; i++) { | 
|  | 711 | char str[32]; | 
|  | 712 |  | 
|  | 713 | snprintf(str, 32, "g_tx_fifo_size[%d]", i); | 
|  | 714 | seq_printf(seq, "%-30s: %d\n", str, p->g_tx_fifo_size[i]); | 
|  | 715 | } | 
|  | 716 |  | 
|  | 717 | return 0; | 
|  | 718 | } | 
|  | 719 | DEFINE_SHOW_ATTRIBUTE(params); | 
|  | 720 |  | 
|  | 721 | static int hw_params_show(struct seq_file *seq, void *v) | 
|  | 722 | { | 
|  | 723 | struct dwc2_hsotg *hsotg = seq->private; | 
|  | 724 | struct dwc2_hw_params *hw = &hsotg->hw_params; | 
|  | 725 |  | 
|  | 726 | print_param(seq, hw, op_mode); | 
|  | 727 | print_param(seq, hw, arch); | 
|  | 728 | print_param(seq, hw, dma_desc_enable); | 
|  | 729 | print_param(seq, hw, enable_dynamic_fifo); | 
|  | 730 | print_param(seq, hw, en_multiple_tx_fifo); | 
|  | 731 | print_param(seq, hw, rx_fifo_size); | 
|  | 732 | print_param(seq, hw, host_nperio_tx_fifo_size); | 
|  | 733 | print_param(seq, hw, dev_nperio_tx_fifo_size); | 
|  | 734 | print_param(seq, hw, host_perio_tx_fifo_size); | 
|  | 735 | print_param(seq, hw, nperio_tx_q_depth); | 
|  | 736 | print_param(seq, hw, host_perio_tx_q_depth); | 
|  | 737 | print_param(seq, hw, dev_token_q_depth); | 
|  | 738 | print_param(seq, hw, max_transfer_size); | 
|  | 739 | print_param(seq, hw, max_packet_count); | 
|  | 740 | print_param(seq, hw, host_channels); | 
|  | 741 | print_param(seq, hw, hs_phy_type); | 
|  | 742 | print_param(seq, hw, fs_phy_type); | 
|  | 743 | print_param(seq, hw, i2c_enable); | 
|  | 744 | print_param(seq, hw, num_dev_ep); | 
|  | 745 | print_param(seq, hw, num_dev_perio_in_ep); | 
|  | 746 | print_param(seq, hw, total_fifo_size); | 
|  | 747 | print_param(seq, hw, power_optimized); | 
|  | 748 | print_param(seq, hw, utmi_phy_data_width); | 
|  | 749 | print_param_hex(seq, hw, snpsid); | 
|  | 750 | print_param_hex(seq, hw, dev_ep_dirs); | 
|  | 751 |  | 
|  | 752 | return 0; | 
|  | 753 | } | 
|  | 754 | DEFINE_SHOW_ATTRIBUTE(hw_params); | 
|  | 755 |  | 
|  | 756 | static int dr_mode_show(struct seq_file *seq, void *v) | 
|  | 757 | { | 
|  | 758 | struct dwc2_hsotg *hsotg = seq->private; | 
|  | 759 | const char *dr_mode = ""; | 
|  | 760 |  | 
|  | 761 | device_property_read_string(hsotg->dev, "dr_mode", &dr_mode); | 
|  | 762 | seq_printf(seq, "%s\n", dr_mode); | 
|  | 763 | return 0; | 
|  | 764 | } | 
|  | 765 | DEFINE_SHOW_ATTRIBUTE(dr_mode); | 
|  | 766 |  | 
|  | 767 | int dwc2_debugfs_init(struct dwc2_hsotg *hsotg) | 
|  | 768 | { | 
|  | 769 | int			ret; | 
|  | 770 | struct dentry		*root; | 
|  | 771 |  | 
|  | 772 | root = debugfs_create_dir(dev_name(hsotg->dev), NULL); | 
|  | 773 | hsotg->debug_root = root; | 
|  | 774 |  | 
|  | 775 | debugfs_create_file("params", 0444, root, hsotg, ¶ms_fops); | 
|  | 776 | debugfs_create_file("hw_params", 0444, root, hsotg, &hw_params_fops); | 
|  | 777 | debugfs_create_file("dr_mode", 0444, root, hsotg, &dr_mode_fops); | 
|  | 778 |  | 
|  | 779 | /* Add gadget debugfs nodes */ | 
|  | 780 | dwc2_hsotg_create_debug(hsotg); | 
|  | 781 |  | 
|  | 782 | hsotg->regset = devm_kzalloc(hsotg->dev, sizeof(*hsotg->regset), | 
|  | 783 | GFP_KERNEL); | 
|  | 784 | if (!hsotg->regset) { | 
|  | 785 | ret = -ENOMEM; | 
|  | 786 | goto err; | 
|  | 787 | } | 
|  | 788 |  | 
|  | 789 | hsotg->regset->regs = dwc2_regs; | 
|  | 790 | hsotg->regset->nregs = ARRAY_SIZE(dwc2_regs); | 
|  | 791 | hsotg->regset->base = hsotg->regs; | 
|  | 792 |  | 
|  | 793 | debugfs_create_regset32("regdump", 0444, root, hsotg->regset); | 
|  | 794 |  | 
|  | 795 | return 0; | 
|  | 796 | err: | 
|  | 797 | debugfs_remove_recursive(hsotg->debug_root); | 
|  | 798 | return ret; | 
|  | 799 | } | 
|  | 800 |  | 
|  | 801 | void dwc2_debugfs_exit(struct dwc2_hsotg *hsotg) | 
|  | 802 | { | 
|  | 803 | debugfs_remove_recursive(hsotg->debug_root); | 
|  | 804 | hsotg->debug_root = NULL; | 
|  | 805 | } |