| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-1.0+ | 
|  | 2 | /* | 
|  | 3 | * OHCI HCD (Host Controller Driver) for USB. | 
|  | 4 | * | 
|  | 5 | * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> | 
|  | 6 | * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net> | 
|  | 7 | * | 
|  | 8 | * This file is licenced under the GPL. | 
|  | 9 | */ | 
|  | 10 |  | 
|  | 11 | /*-------------------------------------------------------------------------*/ | 
|  | 12 |  | 
|  | 13 | /* | 
|  | 14 | * OHCI deals with three types of memory: | 
|  | 15 | *	- data used only by the HCD ... kmalloc is fine | 
|  | 16 | *	- async and periodic schedules, shared by HC and HCD ... these | 
|  | 17 | *	  need to use dma_pool or dma_alloc_coherent | 
|  | 18 | *	- driver buffers, read/written by HC ... the hcd glue or the | 
|  | 19 | *	  device driver provides us with dma addresses | 
|  | 20 | * | 
|  | 21 | * There's also "register" data, which is memory mapped. | 
|  | 22 | * No memory seen by this driver (or any HCD) may be paged out. | 
|  | 23 | */ | 
|  | 24 |  | 
|  | 25 | /*-------------------------------------------------------------------------*/ | 
|  | 26 |  | 
|  | 27 | static void ohci_hcd_init (struct ohci_hcd *ohci) | 
|  | 28 | { | 
|  | 29 | ohci->next_statechange = jiffies; | 
|  | 30 | spin_lock_init (&ohci->lock); | 
|  | 31 | INIT_LIST_HEAD (&ohci->pending); | 
|  | 32 | INIT_LIST_HEAD(&ohci->eds_in_use); | 
|  | 33 | } | 
|  | 34 |  | 
|  | 35 | /*-------------------------------------------------------------------------*/ | 
|  | 36 |  | 
|  | 37 | static int ohci_mem_init (struct ohci_hcd *ohci) | 
|  | 38 | { | 
|  | 39 | ohci->td_cache = dma_pool_create ("ohci_td", | 
|  | 40 | ohci_to_hcd(ohci)->self.controller, | 
|  | 41 | sizeof (struct td), | 
|  | 42 | 32 /* byte alignment */, | 
|  | 43 | 0 /* no page-crossing issues */); | 
|  | 44 | if (!ohci->td_cache) | 
|  | 45 | return -ENOMEM; | 
|  | 46 | ohci->ed_cache = dma_pool_create ("ohci_ed", | 
|  | 47 | ohci_to_hcd(ohci)->self.controller, | 
|  | 48 | sizeof (struct ed), | 
|  | 49 | 16 /* byte alignment */, | 
|  | 50 | 0 /* no page-crossing issues */); | 
|  | 51 | if (!ohci->ed_cache) { | 
|  | 52 | dma_pool_destroy (ohci->td_cache); | 
|  | 53 | return -ENOMEM; | 
|  | 54 | } | 
|  | 55 | return 0; | 
|  | 56 | } | 
|  | 57 |  | 
|  | 58 | static void ohci_mem_cleanup (struct ohci_hcd *ohci) | 
|  | 59 | { | 
|  | 60 | if (ohci->td_cache) { | 
|  | 61 | dma_pool_destroy (ohci->td_cache); | 
|  | 62 | ohci->td_cache = NULL; | 
|  | 63 | } | 
|  | 64 | if (ohci->ed_cache) { | 
|  | 65 | dma_pool_destroy (ohci->ed_cache); | 
|  | 66 | ohci->ed_cache = NULL; | 
|  | 67 | } | 
|  | 68 | } | 
|  | 69 |  | 
|  | 70 | /*-------------------------------------------------------------------------*/ | 
|  | 71 |  | 
|  | 72 | /* ohci "done list" processing needs this mapping */ | 
|  | 73 | static inline struct td * | 
|  | 74 | dma_to_td (struct ohci_hcd *hc, dma_addr_t td_dma) | 
|  | 75 | { | 
|  | 76 | struct td *td; | 
|  | 77 |  | 
|  | 78 | td_dma &= TD_MASK; | 
|  | 79 | td = hc->td_hash [TD_HASH_FUNC(td_dma)]; | 
|  | 80 | while (td && td->td_dma != td_dma) | 
|  | 81 | td = td->td_hash; | 
|  | 82 | return td; | 
|  | 83 | } | 
|  | 84 |  | 
|  | 85 | /* TDs ... */ | 
|  | 86 | static struct td * | 
|  | 87 | td_alloc (struct ohci_hcd *hc, gfp_t mem_flags) | 
|  | 88 | { | 
|  | 89 | dma_addr_t	dma; | 
|  | 90 | struct td	*td; | 
|  | 91 |  | 
|  | 92 | td = dma_pool_zalloc (hc->td_cache, mem_flags, &dma); | 
|  | 93 | if (td) { | 
|  | 94 | /* in case hc fetches it, make it look dead */ | 
|  | 95 | td->hwNextTD = cpu_to_hc32 (hc, dma); | 
|  | 96 | td->td_dma = dma; | 
|  | 97 | /* hashed in td_fill */ | 
|  | 98 | } | 
|  | 99 | return td; | 
|  | 100 | } | 
|  | 101 |  | 
|  | 102 | static void | 
|  | 103 | td_free (struct ohci_hcd *hc, struct td *td) | 
|  | 104 | { | 
|  | 105 | struct td	**prev = &hc->td_hash [TD_HASH_FUNC (td->td_dma)]; | 
|  | 106 |  | 
|  | 107 | while (*prev && *prev != td) | 
|  | 108 | prev = &(*prev)->td_hash; | 
|  | 109 | if (*prev) | 
|  | 110 | *prev = td->td_hash; | 
|  | 111 | else if ((td->hwINFO & cpu_to_hc32(hc, TD_DONE)) != 0) | 
|  | 112 | ohci_dbg (hc, "no hash for td %p\n", td); | 
|  | 113 | dma_pool_free (hc->td_cache, td, td->td_dma); | 
|  | 114 | } | 
|  | 115 |  | 
|  | 116 | /*-------------------------------------------------------------------------*/ | 
|  | 117 |  | 
|  | 118 | /* EDs ... */ | 
|  | 119 | static struct ed * | 
|  | 120 | ed_alloc (struct ohci_hcd *hc, gfp_t mem_flags) | 
|  | 121 | { | 
|  | 122 | dma_addr_t	dma; | 
|  | 123 | struct ed	*ed; | 
|  | 124 |  | 
|  | 125 | ed = dma_pool_zalloc (hc->ed_cache, mem_flags, &dma); | 
|  | 126 | if (ed) { | 
|  | 127 | INIT_LIST_HEAD (&ed->td_list); | 
|  | 128 | ed->dma = dma; | 
|  | 129 | } | 
|  | 130 | return ed; | 
|  | 131 | } | 
|  | 132 |  | 
|  | 133 | static void | 
|  | 134 | ed_free (struct ohci_hcd *hc, struct ed *ed) | 
|  | 135 | { | 
|  | 136 | dma_pool_free (hc->ed_cache, ed, ed->dma); | 
|  | 137 | } | 
|  | 138 |  |