blob: f5870fc32913dd6eb5b7a80e4fda8a0a81ac6329 [file] [log] [blame]
xjb04a4022021-11-25 15:01:52 +08001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2020 MediaTek Inc.
4 */
5
6#include <linux/device.h>
7#include <linux/interconnect-provider.h>
8#include <linux/module.h>
9#include <linux/of_device.h>
10#include <linux/of_platform.h>
11#include <linux/platform_device.h>
12#include <linux/soc/mediatek/mtk_dvfsrc.h>
13#include <dt-bindings/interconnect/mtk,mt6873-emi.h>
14
15enum mtk_icc_name {
16 SLAVE_DDR_EMI,
17 MASTER_MCUSYS,
18 MASTER_GPUSYS,
19 MASTER_MMSYS,
20 MASTER_MM_VPU,
21 MASTER_MM_DISP,
22 MASTER_MM_VDEC,
23 MASTER_MM_VENC,
24 MASTER_MM_CAM,
25 MASTER_MM_IMG,
26 MASTER_MM_MDP,
27 MASTER_VPUSYS,
28 MASTER_VPU_PORT_0,
29 MASTER_VPU_PORT_1,
30 MASTER_MDLASYS,
31 MASTER_MDLA_PORT_0,
32 MASTER_UFS,
33 MASTER_PCIE,
34 MASTER_USB,
35 MASTER_WIFI,
36 MASTER_BT,
37 MASTER_NETSYS,
38 MASTER_DBGIF,
39
40 SLAVE_HRT_DDR_EMI,
41 MASTER_HRT_MMSYS,
42 MASTER_HRT_MM_DISP,
43 MASTER_HRT_MM_VDEC,
44 MASTER_HRT_MM_VENC,
45 MASTER_HRT_MM_CAM,
46 MASTER_HRT_MM_IMG,
47 MASTER_HRT_MM_MDP,
48 MASTER_HRT_DBGIF,
49};
50
51#define MAX_LINKS 1
52
53/**
54 * struct mtk_icc_node - Mediatek specific interconnect nodes
55 * @name: the node name used in debugfs
56 * @ep : the type of this endpoint
57 * @id: a unique node identifier
58 * @links: an array of nodes where we can go next while traversing
59 * @num_links: the total number of @links
60 * @buswidth: width of the interconnect between a node and the bus
61 * @sum_avg: current sum aggregate value of all avg bw kBps requests
62 * @max_peak: current max aggregate value of all peak bw kBps requests
63 */
64struct mtk_icc_node {
65 unsigned char *name;
66 int ep;
67 u16 id;
68 u16 links[MAX_LINKS];
69 u16 num_links;
70 u64 sum_avg;
71 u64 max_peak;
72};
73
74struct mtk_icc_desc {
75 struct mtk_icc_node **nodes;
76 size_t num_nodes;
77};
78
79#define DEFINE_MNODE(_name, _id, _ep, ...) \
80 static struct mtk_icc_node _name = { \
81 .name = #_name, \
82 .id = _id, \
83 .ep = _ep, \
84 .num_links = ARRAY_SIZE(((int[]){ __VA_ARGS__ })), \
85 .links = { __VA_ARGS__ }, \
86}
87
88DEFINE_MNODE(ddr_emi, SLAVE_DDR_EMI, 1);
89DEFINE_MNODE(mcusys, MASTER_MCUSYS, 0, SLAVE_DDR_EMI);
90DEFINE_MNODE(gpu, MASTER_GPUSYS, 0, SLAVE_DDR_EMI);
91DEFINE_MNODE(mmsys, MASTER_MMSYS, 0, SLAVE_DDR_EMI);
92DEFINE_MNODE(mm_vpu, MASTER_MM_VPU, 0, MASTER_MMSYS);
93DEFINE_MNODE(mm_disp, MASTER_MM_DISP, 0, MASTER_MMSYS);
94DEFINE_MNODE(mm_vdec, MASTER_MM_VDEC, 0, MASTER_MMSYS);
95DEFINE_MNODE(mm_venc, MASTER_MM_VENC, 0, MASTER_MMSYS);
96DEFINE_MNODE(mm_cam, MASTER_MM_CAM, 0, MASTER_MMSYS);
97DEFINE_MNODE(mm_img, MASTER_MM_IMG, 0, MASTER_MMSYS);
98DEFINE_MNODE(mm_mdp, MASTER_MM_MDP, 0, MASTER_MMSYS);
99DEFINE_MNODE(vpusys, MASTER_VPUSYS, 0, SLAVE_DDR_EMI);
100DEFINE_MNODE(vpu_port_0, MASTER_VPU_PORT_0, 0, MASTER_VPUSYS);
101DEFINE_MNODE(vpu_port_1, MASTER_VPU_PORT_1, 0, MASTER_VPUSYS);
102DEFINE_MNODE(mdlasys, MASTER_MDLASYS, 0, SLAVE_DDR_EMI);
103DEFINE_MNODE(mdla_port_0, MASTER_MDLA_PORT_0, 0, MASTER_MDLASYS);
104DEFINE_MNODE(ufs, MASTER_UFS, 0, SLAVE_DDR_EMI);
105DEFINE_MNODE(pcie, MASTER_PCIE, 0, SLAVE_DDR_EMI);
106DEFINE_MNODE(usb, MASTER_USB, 0, SLAVE_DDR_EMI);
107DEFINE_MNODE(wifi, MASTER_WIFI, 0, SLAVE_DDR_EMI);
108DEFINE_MNODE(bt, MASTER_BT, 0, SLAVE_DDR_EMI);
109DEFINE_MNODE(netsys, MASTER_NETSYS, 0, SLAVE_DDR_EMI);
110DEFINE_MNODE(dbgif, MASTER_DBGIF, 0, SLAVE_DDR_EMI);
111
112DEFINE_MNODE(hrt_ddr_emi, SLAVE_HRT_DDR_EMI, 2);
113DEFINE_MNODE(hrt_mmsys, MASTER_HRT_MMSYS, 0, SLAVE_HRT_DDR_EMI);
114DEFINE_MNODE(hrt_mm_disp, MASTER_HRT_MM_DISP, 0, MASTER_HRT_MMSYS);
115DEFINE_MNODE(hrt_mm_vdec, MASTER_HRT_MM_VDEC, 0, MASTER_HRT_MMSYS);
116DEFINE_MNODE(hrt_mm_venc, MASTER_HRT_MM_VENC, 0, MASTER_HRT_MMSYS);
117DEFINE_MNODE(hrt_mm_cam, MASTER_HRT_MM_CAM, 0, MASTER_HRT_MMSYS);
118DEFINE_MNODE(hrt_mm_img, MASTER_HRT_MM_IMG, 0, MASTER_HRT_MMSYS);
119DEFINE_MNODE(hrt_mm_mdp, MASTER_HRT_MM_MDP, 0, MASTER_HRT_MMSYS);
120DEFINE_MNODE(hrt_dbgif, MASTER_HRT_DBGIF, 0, SLAVE_HRT_DDR_EMI);
121
122static struct mtk_icc_node *mt6873_icc_nodes[] = {
123 [MT6873_SLAVE_DDR_EMI] = &ddr_emi,
124 [MT6873_MASTER_MCUSYS] = &mcusys,
125 [MT6873_MASTER_GPUSYS] = &gpu,
126 [MT6873_MASTER_MMSYS] = &mmsys,
127 [MT6873_MASTER_MM_VPU] = &mm_vpu,
128 [MT6873_MASTER_MM_DISP] = &mm_disp,
129 [MT6873_MASTER_MM_VDEC] = &mm_vdec,
130 [MT6873_MASTER_MM_VENC] = &mm_venc,
131 [MT6873_MASTER_MM_CAM] = &mm_cam,
132 [MT6873_MASTER_MM_IMG] = &mm_img,
133 [MT6873_MASTER_MM_MDP] = &mm_mdp,
134 [MT6873_MASTER_VPUSYS] = &vpusys,
135 [MT6873_MASTER_VPU_0] = &vpu_port_0,
136 [MT6873_MASTER_VPU_1] = &vpu_port_1,
137 [MT6873_MASTER_MDLASYS] = &mdlasys,
138 [MT6873_MASTER_MDLA_0] = &mdla_port_0,
139 [MT6873_MASTER_UFS] = &ufs,
140 [MT6873_MASTER_PCIE] = &pcie,
141 [MT6873_MASTER_USB] = &usb,
142 [MT6873_MASTER_WIFI] = &wifi,
143 [MT6873_MASTER_BT] = &bt,
144 [MT6873_MASTER_NETSYS] = &netsys,
145 [MT6873_MASTER_DBGIF] = &dbgif,
146
147 [MT6873_SLAVE_HRT_DDR_EMI] = &hrt_ddr_emi,
148 [MT6873_MASTER_HRT_MMSYS] = &hrt_mmsys,
149 [MT6873_MASTER_HRT_MM_DISP] = &hrt_mm_disp,
150 [MT6873_MASTER_HRT_MM_VDEC] = &hrt_mm_vdec,
151 [MT6873_MASTER_HRT_MM_VENC] = &hrt_mm_venc,
152 [MT6873_MASTER_HRT_MM_CAM] = &hrt_mm_cam,
153 [MT6873_MASTER_HRT_MM_IMG] = &hrt_mm_img,
154 [MT6873_MASTER_HRT_MM_MDP] = &hrt_mm_mdp,
155 [MT6873_MASTER_HRT_DBGIF] = &hrt_dbgif,
156};
157
158static struct mtk_icc_desc mt6873_icc = {
159 .nodes = mt6873_icc_nodes,
160 .num_nodes = ARRAY_SIZE(mt6873_icc_nodes),
161};
162
163static const struct of_device_id emi_icc_of_match[] = {
164 { .compatible = "mediatek,mt6873-dvfsrc", .data = &mt6873_icc },
165 { .compatible = "mediatek,mt6880-dvfsrc", .data = &mt6873_icc },
166 { .compatible = "mediatek,mt6890-dvfsrc", .data = &mt6873_icc },
167 { },
168};
169MODULE_DEVICE_TABLE(of, emi_icc_of_match);
170
171static int emi_icc_aggregate(struct icc_node *node, u32 avg_bw,
172 u32 peak_bw, u32 *agg_avg, u32 *agg_peak)
173{
174 struct mtk_icc_node *in;
175
176 in = node->data;
177
178 *agg_avg += avg_bw;
179 *agg_peak = max_t(u32, *agg_peak, peak_bw);
180
181 in->sum_avg = *agg_avg;
182 in->max_peak = *agg_peak;
183
184 return 0;
185}
186
187static int emi_icc_set(struct icc_node *src, struct icc_node *dst)
188{
189 int ret = 0;
190 struct mtk_icc_node *node;
191
192 node = dst->data;
193
194 if (node->ep == 1) {
195 mtk_dvfsrc_send_request(src->provider->dev,
196 MTK_DVFSRC_CMD_PEAK_BW_REQUEST,
197 node->max_peak);
198 mtk_dvfsrc_send_request(src->provider->dev,
199 MTK_DVFSRC_CMD_BW_REQUEST,
200 node->sum_avg);
201 } else if (node->ep == 2) {
202 mtk_dvfsrc_send_request(src->provider->dev,
203 MTK_DVFSRC_CMD_HRTBW_REQUEST,
204 node->sum_avg);
205 }
206
207 return ret;
208}
209
210static int emi_icc_remove(struct platform_device *pdev);
211static int emi_icc_probe(struct platform_device *pdev)
212{
213 const struct of_device_id *match;
214 const struct mtk_icc_desc *desc;
215 struct device *dev = &pdev->dev;
216 struct icc_node *node;
217 struct icc_onecell_data *data;
218 struct icc_provider *provider;
219 struct mtk_icc_node **mnodes;
220 struct icc_node *tmp;
221 size_t num_nodes, i, j;
222 int ret;
223
224 match = of_match_node(emi_icc_of_match, dev->parent->of_node);
225
226 if (!match) {
227 dev_err(dev, "invalid compatible string\n");
228 return -ENODEV;
229 }
230
231 desc = match->data;
232 mnodes = desc->nodes;
233 num_nodes = desc->num_nodes;
234
235 provider = devm_kzalloc(dev, sizeof(*provider), GFP_KERNEL);
236 if (!provider)
237 return -ENOMEM;
238
239 data = devm_kzalloc(dev, struct_size(data, nodes, num_nodes),
240 GFP_KERNEL);
241 if (!data)
242 return -ENOMEM;
243
244 provider->dev = pdev->dev.parent;
245 provider->set = emi_icc_set;
246 provider->aggregate = emi_icc_aggregate;
247 provider->xlate = of_icc_xlate_onecell;
248 INIT_LIST_HEAD(&provider->nodes);
249 provider->data = data;
250
251 ret = icc_provider_add(provider);
252 if (ret) {
253 dev_err(dev, "error adding interconnect provider\n");
254 return ret;
255 }
256
257 for (i = 0; i < num_nodes; i++) {
258 node = icc_node_create(mnodes[i]->id);
259 if (IS_ERR(node)) {
260 ret = PTR_ERR(node);
261 goto err;
262 }
263
264 node->name = mnodes[i]->name;
265 node->data = mnodes[i];
266 icc_node_add(node, provider);
267
268 /* populate links */
269 for (j = 0; j < mnodes[i]->num_links; j++)
270 icc_link_create(node, mnodes[i]->links[j]);
271
272 data->nodes[i] = node;
273 }
274 data->num_nodes = num_nodes;
275
276 platform_set_drvdata(pdev, provider);
277
278 return 0;
279err:
280 list_for_each_entry_safe(node, tmp, &provider->nodes, node_list) {
281 icc_node_del(node);
282 icc_node_destroy(node->id);
283 }
284
285 icc_provider_del(provider);
286 return ret;
287}
288
289static int emi_icc_remove(struct platform_device *pdev)
290{
291 struct icc_provider *provider = platform_get_drvdata(pdev);
292 struct icc_node *n, *tmp;
293
294 list_for_each_entry_safe(n, tmp, &provider->nodes, node_list) {
295 icc_node_del(n);
296 icc_node_destroy(n->id);
297 }
298
299 return icc_provider_del(provider);
300}
301
302static struct platform_driver emi_icc_driver = {
303 .probe = emi_icc_probe,
304 .remove = emi_icc_remove,
305 .driver = {
306 .name = "mediatek-emi-icc",
307 },
308};
309
310static int __init mtk_emi_icc_init(void)
311{
312 return platform_driver_register(&emi_icc_driver);
313}
314subsys_initcall(mtk_emi_icc_init);
315
316static void __exit mtk_emi_icc_exit(void)
317{
318 platform_driver_unregister(&emi_icc_driver);
319}
320module_exit(mtk_emi_icc_exit);
321
322MODULE_AUTHOR("Henry Chen <henryc.chen@mediatek.com>");
323MODULE_LICENSE("GPL v2");