| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2017 MediaTek, Inc. |
| 3 | * |
| 4 | * Author: Chen Zhong <chen.zhong@mediatek.com> |
| 5 | * |
| 6 | * This software is licensed under the terms of the GNU General Public |
| 7 | * License version 2, as published by the Free Software Foundation, and |
| 8 | * may be copied, distributed, and modified under those terms. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | */ |
| 16 | #include <linux/input.h> |
| 17 | #include <linux/interrupt.h> |
| 18 | #include <linux/kernel.h> |
| 19 | #include <linux/module.h> |
| 20 | #include <linux/of.h> |
| 21 | #include <linux/of_device.h> |
| 22 | #include <linux/platform_device.h> |
| 23 | #include <linux/regmap.h> |
| 24 | #include <linux/mfd/mt6323/registers.h> |
| 25 | #include <linux/mfd/mt6359/registers.h> |
| 26 | #include <linux/mfd/mt6397/registers.h> |
| 27 | #include <linux/mfd/mt6330/registers.h> |
| 28 | //#include <linux/mfd/mt6397/core.h> |
| 29 | #include <linux/mfd/mt6330/core.h> |
| 30 | |
| 31 | #define MTK_PMIC_PWRKEY_INDEX 0 |
| 32 | #define MTK_PMIC_HOMEKEY_INDEX 1 |
| 33 | #define MTK_PMIC_MAX_KEY_COUNT 2 |
| 34 | |
| 35 | #define MT6397_PWRKEY_RST_SHIFT 6 |
| 36 | #define MT6397_HOMEKEY_RST_SHIFT 5 |
| 37 | #define MT6397_RST_DU_SHIFT 8 |
| 38 | |
| 39 | #define MT6359_PWRKEY_RST_SHIFT 9 |
| 40 | #define MT6359_HOMEKEY_RST_SHIFT 8 |
| 41 | #define MT6359_RST_DU_SHIFT 12 |
| 42 | #define MT6330_PWRKEY_RST_SHIFT 1 |
| 43 | #define MT6330_RST_DU_SHIFT 4 |
| 44 | |
| 45 | #define PWRKEY_RST_EN 0x1 |
| 46 | #define HOMEKEY_RST_EN 0x1 |
| 47 | #define RST_DU_MASK 0x3 |
| 48 | #define INVALID_VALUE 0 |
| 49 | |
| 50 | struct mtk_pmic_keys_regs { |
| 51 | u32 deb_reg; |
| 52 | u32 deb_mask; |
| 53 | u32 intsel_reg; |
| 54 | u32 intsel_mask; |
| 55 | }; |
| 56 | |
| 57 | #define MTK_PMIC_KEYS_REGS(_deb_reg, _deb_mask, \ |
| 58 | _intsel_reg, _intsel_mask) \ |
| 59 | { \ |
| 60 | .deb_reg = _deb_reg, \ |
| 61 | .deb_mask = _deb_mask, \ |
| 62 | .intsel_reg = _intsel_reg, \ |
| 63 | .intsel_mask = _intsel_mask, \ |
| 64 | } |
| 65 | |
| 66 | #define RELEASE_IRQ_INTERVAL 1 |
| 67 | |
| 68 | struct mtk_pmic_regs { |
| 69 | const struct mtk_pmic_keys_regs keys_regs[MTK_PMIC_MAX_KEY_COUNT]; |
| 70 | bool release_irq; |
| 71 | u32 pmic_rst_reg; |
| 72 | u32 pwrkey_rst_shift; |
| 73 | u32 homekey_rst_shift; |
| 74 | u32 rst_du_shift; |
| 75 | }; |
| 76 | |
| 77 | static const struct mtk_pmic_regs mt6397_regs = { |
| 78 | .keys_regs[MTK_PMIC_PWRKEY_INDEX] = |
| 79 | MTK_PMIC_KEYS_REGS(MT6397_CHRSTATUS, |
| 80 | 0x8, MT6397_INT_RSV, 0x10), |
| 81 | .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = |
| 82 | MTK_PMIC_KEYS_REGS(MT6397_OCSTATUS2, |
| 83 | 0x10, MT6397_INT_RSV, 0x8), |
| 84 | .release_irq = false, |
| 85 | .pmic_rst_reg = MT6397_TOP_RST_MISC, |
| 86 | .pwrkey_rst_shift = MT6397_PWRKEY_RST_SHIFT, |
| 87 | .homekey_rst_shift = MT6397_HOMEKEY_RST_SHIFT, |
| 88 | .rst_du_shift = MT6397_RST_DU_SHIFT, |
| 89 | }; |
| 90 | |
| 91 | static const struct mtk_pmic_regs mt6323_regs = { |
| 92 | .keys_regs[MTK_PMIC_PWRKEY_INDEX] = |
| 93 | MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS, |
| 94 | 0x2, MT6323_INT_MISC_CON, 0x10), |
| 95 | .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = |
| 96 | MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS, |
| 97 | 0x4, MT6323_INT_MISC_CON, 0x8), |
| 98 | .release_irq = false, |
| 99 | .pmic_rst_reg = MT6323_TOP_RST_MISC, |
| 100 | .pwrkey_rst_shift = MT6397_PWRKEY_RST_SHIFT, |
| 101 | .homekey_rst_shift = MT6397_HOMEKEY_RST_SHIFT, |
| 102 | .rst_du_shift = MT6397_RST_DU_SHIFT, |
| 103 | }; |
| 104 | |
| 105 | static const struct mtk_pmic_regs mt6359_regs = { |
| 106 | .keys_regs[MTK_PMIC_PWRKEY_INDEX] = |
| 107 | MTK_PMIC_KEYS_REGS(INVALID_VALUE, |
| 108 | INVALID_VALUE, MT6359_PSC_TOP_INT_CON0, 0x1), |
| 109 | .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = |
| 110 | MTK_PMIC_KEYS_REGS(INVALID_VALUE, |
| 111 | INVALID_VALUE, MT6359_PSC_TOP_INT_CON0, 0x2), |
| 112 | .release_irq = true, |
| 113 | .pmic_rst_reg = MT6359_TOP_RST_MISC, |
| 114 | .pwrkey_rst_shift = MT6359_PWRKEY_RST_SHIFT, |
| 115 | .homekey_rst_shift = MT6359_HOMEKEY_RST_SHIFT, |
| 116 | .rst_du_shift = MT6359_RST_DU_SHIFT, |
| 117 | }; |
| 118 | static const struct mtk_pmic_regs mt6330_regs = { |
| 119 | .keys_regs[MTK_PMIC_PWRKEY_INDEX] = |
| 120 | MTK_PMIC_KEYS_REGS(INVALID_VALUE, |
| 121 | INVALID_VALUE, MT6330_PSC_TOP_INT_CON0, 0x1), |
| 122 | .release_irq = true, |
| 123 | .pmic_rst_reg = MT6330_TOP_RST_MISC0, |
| 124 | .pwrkey_rst_shift = MT6330_PWRKEY_RST_SHIFT, |
| 125 | .rst_du_shift = MT6330_RST_DU_SHIFT, |
| 126 | }; |
| 127 | |
| 128 | struct mtk_pmic_keys_info { |
| 129 | struct mtk_pmic_keys *keys; |
| 130 | const struct mtk_pmic_keys_regs *regs; |
| 131 | unsigned int keycode; |
| 132 | int irq; |
| 133 | int release_irq_num; |
| 134 | bool wakeup:1; |
| 135 | }; |
| 136 | |
| 137 | struct mtk_pmic_keys { |
| 138 | struct input_dev *input_dev; |
| 139 | struct device *dev; |
| 140 | struct regmap *regmap; |
| 141 | struct mtk_pmic_keys_info keys[MTK_PMIC_MAX_KEY_COUNT]; |
| 142 | }; |
| 143 | |
| 144 | enum mtk_pmic_keys_lp_mode { |
| 145 | LP_DISABLE, |
| 146 | LP_ONEKEY, |
| 147 | LP_TWOKEY, |
| 148 | }; |
| 149 | |
| 150 | static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys, |
| 151 | const struct mtk_pmic_regs *pmic_regs) |
| 152 | { |
| 153 | int ret; |
| 154 | u32 long_press_mode, long_press_debounce; |
| 155 | u32 pmic_rst_reg = pmic_regs->pmic_rst_reg; |
| 156 | u32 pwrkey_rst = PWRKEY_RST_EN << pmic_regs->pwrkey_rst_shift; |
| 157 | u32 homekey_rst = |
| 158 | HOMEKEY_RST_EN << pmic_regs->homekey_rst_shift; |
| 159 | |
| 160 | ret = of_property_read_u32(keys->dev->of_node, |
| 161 | "power-off-time-sec", &long_press_debounce); |
| 162 | if (ret) |
| 163 | long_press_debounce = 0; |
| 164 | |
| 165 | regmap_update_bits(keys->regmap, pmic_rst_reg, |
| 166 | RST_DU_MASK << pmic_regs->rst_du_shift, |
| 167 | long_press_debounce << pmic_regs->rst_du_shift); |
| 168 | |
| 169 | ret = of_property_read_u32(keys->dev->of_node, |
| 170 | "mediatek,long-press-mode", &long_press_mode); |
| 171 | if (ret) |
| 172 | long_press_mode = LP_DISABLE; |
| 173 | |
| 174 | switch (long_press_mode) { |
| 175 | case LP_ONEKEY: |
| 176 | regmap_update_bits(keys->regmap, pmic_rst_reg, |
| 177 | pwrkey_rst, |
| 178 | pwrkey_rst); |
| 179 | regmap_update_bits(keys->regmap, pmic_rst_reg, |
| 180 | homekey_rst, |
| 181 | 0); |
| 182 | break; |
| 183 | case LP_TWOKEY: |
| 184 | regmap_update_bits(keys->regmap, pmic_rst_reg, |
| 185 | pwrkey_rst, |
| 186 | pwrkey_rst); |
| 187 | regmap_update_bits(keys->regmap, pmic_rst_reg, |
| 188 | homekey_rst, |
| 189 | homekey_rst); |
| 190 | break; |
| 191 | case LP_DISABLE: |
| 192 | regmap_update_bits(keys->regmap, pmic_rst_reg, |
| 193 | pwrkey_rst, |
| 194 | 0); |
| 195 | regmap_update_bits(keys->regmap, pmic_rst_reg, |
| 196 | homekey_rst, |
| 197 | 0); |
| 198 | break; |
| 199 | default: |
| 200 | break; |
| 201 | } |
| 202 | } |
| 203 | |
| 204 | static irqreturn_t mtk_pmic_keys_release_irq_handler_thread( |
| 205 | int irq, void *data) |
| 206 | { |
| 207 | struct mtk_pmic_keys_info *info = data; |
| 208 | |
| 209 | input_report_key(info->keys->input_dev, info->keycode, 0); |
| 210 | input_sync(info->keys->input_dev); |
| 211 | |
| 212 | pr_info("release key =%d using PMIC\n", |
| 213 | info->keycode); |
| 214 | |
| 215 | return IRQ_HANDLED; |
| 216 | } |
| 217 | |
| 218 | static irqreturn_t mtk_pmic_keys_irq_handler_thread(int irq, void *data) |
| 219 | { |
| 220 | struct mtk_pmic_keys_info *info = data; |
| 221 | u32 key_deb = 0, pressed; |
| 222 | |
| 223 | if (info->release_irq_num > 0) { |
| 224 | pressed = 1; |
| 225 | } else { |
| 226 | regmap_read(info->keys->regmap, info->regs->deb_reg, &key_deb); |
| 227 | key_deb &= info->regs->deb_mask; |
| 228 | pressed = !key_deb; |
| 229 | } |
| 230 | |
| 231 | input_report_key(info->keys->input_dev, info->keycode, pressed); |
| 232 | input_sync(info->keys->input_dev); |
| 233 | |
| 234 | pr_info("(%s) key =%d using PMIC\n", |
| 235 | pressed ? "pressed" : "released", info->keycode); |
| 236 | |
| 237 | return IRQ_HANDLED; |
| 238 | } |
| 239 | |
| 240 | static int mtk_pmic_key_setup(struct mtk_pmic_keys *keys, |
| 241 | struct mtk_pmic_keys_info *info) |
| 242 | { |
| 243 | int ret; |
| 244 | |
| 245 | info->keys = keys; |
| 246 | |
| 247 | ret = regmap_update_bits(keys->regmap, info->regs->intsel_reg, |
| 248 | info->regs->intsel_mask, |
| 249 | info->regs->intsel_mask); |
| 250 | if (ret < 0) |
| 251 | return ret; |
| 252 | |
| 253 | ret = devm_request_threaded_irq(keys->dev, info->irq, NULL, |
| 254 | mtk_pmic_keys_irq_handler_thread, |
| 255 | IRQF_ONESHOT | IRQF_TRIGGER_HIGH, |
| 256 | "mtk-pmic-keys", info); |
| 257 | if (ret) { |
| 258 | dev_dbg(keys->dev, "Failed to request IRQ: %d: %d\n", |
| 259 | info->irq, ret); |
| 260 | return ret; |
| 261 | } |
| 262 | |
| 263 | if (info->release_irq_num > 0) { |
| 264 | ret = devm_request_threaded_irq(keys->dev, |
| 265 | info->release_irq_num, |
| 266 | NULL, mtk_pmic_keys_release_irq_handler_thread, |
| 267 | IRQF_ONESHOT | IRQF_TRIGGER_HIGH, |
| 268 | "mtk-pmic-keys", info); |
| 269 | if (ret) { |
| 270 | dev_dbg(keys->dev, "Failed to request IRQ: %d: %d\n", |
| 271 | info->release_irq_num, ret); |
| 272 | return ret; |
| 273 | } |
| 274 | } |
| 275 | |
| 276 | input_set_capability(keys->input_dev, EV_KEY, info->keycode); |
| 277 | |
| 278 | return 0; |
| 279 | } |
| 280 | |
| 281 | static int __maybe_unused mtk_pmic_keys_suspend(struct device *dev) |
| 282 | { |
| 283 | struct mtk_pmic_keys *keys = dev_get_drvdata(dev); |
| 284 | int index; |
| 285 | |
| 286 | for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) { |
| 287 | if (keys->keys[index].wakeup) |
| 288 | enable_irq_wake(keys->keys[index].irq); |
| 289 | } |
| 290 | |
| 291 | return 0; |
| 292 | } |
| 293 | |
| 294 | static int __maybe_unused mtk_pmic_keys_resume(struct device *dev) |
| 295 | { |
| 296 | struct mtk_pmic_keys *keys = dev_get_drvdata(dev); |
| 297 | int index; |
| 298 | |
| 299 | for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) { |
| 300 | if (keys->keys[index].wakeup) |
| 301 | disable_irq_wake(keys->keys[index].irq); |
| 302 | } |
| 303 | |
| 304 | return 0; |
| 305 | } |
| 306 | |
| 307 | static SIMPLE_DEV_PM_OPS(mtk_pmic_keys_pm_ops, mtk_pmic_keys_suspend, |
| 308 | mtk_pmic_keys_resume); |
| 309 | |
| 310 | static const struct of_device_id of_mtk_pmic_keys_match_tbl[] = { |
| 311 | { |
| 312 | .compatible = "mediatek,mt6397-keys", |
| 313 | .data = &mt6397_regs, |
| 314 | }, { |
| 315 | .compatible = "mediatek,mt6323-keys", |
| 316 | .data = &mt6323_regs, |
| 317 | }, { |
| 318 | .compatible = "mediatek,mt6359-keys", |
| 319 | .data = &mt6359_regs, |
| 320 | }, { |
| 321 | .compatible = "mediatek,mt6330-keys", |
| 322 | .data = &mt6330_regs, |
| 323 | }, { |
| 324 | /* sentinel */ |
| 325 | } |
| 326 | }; |
| 327 | MODULE_DEVICE_TABLE(of, of_mtk_pmic_keys_match_tbl); |
| 328 | |
| 329 | static int mtk_pmic_keys_probe(struct platform_device *pdev) |
| 330 | { |
| 331 | int error, index = 0; |
| 332 | unsigned int keycount; |
| 333 | struct mt6330_chip *pmic_chip = dev_get_drvdata(pdev->dev.parent); |
| 334 | struct device_node *node = pdev->dev.of_node, *child; |
| 335 | struct mtk_pmic_keys *keys; |
| 336 | const struct mtk_pmic_regs *mtk_pmic_regs; |
| 337 | struct input_dev *input_dev; |
| 338 | const struct of_device_id *of_id = |
| 339 | of_match_device(of_mtk_pmic_keys_match_tbl, &pdev->dev); |
| 340 | |
| 341 | if(!of_id) |
| 342 | return -ENOMEM; |
| 343 | |
| 344 | keys = devm_kzalloc(&pdev->dev, sizeof(*keys), GFP_KERNEL); |
| 345 | if (!keys) |
| 346 | return -ENOMEM; |
| 347 | |
| 348 | keys->dev = &pdev->dev; |
| 349 | keys->regmap = pmic_chip->regmap; |
| 350 | mtk_pmic_regs = of_id->data; |
| 351 | |
| 352 | keys->input_dev = input_dev = devm_input_allocate_device(keys->dev); |
| 353 | if (!input_dev) { |
| 354 | dev_err(keys->dev, "input allocate device fail.\n"); |
| 355 | return -ENOMEM; |
| 356 | } |
| 357 | |
| 358 | input_dev->name = "mtk-pmic-keys"; |
| 359 | input_dev->id.bustype = BUS_HOST; |
| 360 | input_dev->id.vendor = 0x0001; |
| 361 | input_dev->id.product = 0x0001; |
| 362 | input_dev->id.version = 0x0001; |
| 363 | |
| 364 | __set_bit(EV_KEY, input_dev->evbit); |
| 365 | keycount = of_get_available_child_count(node); |
| 366 | if (keycount > MTK_PMIC_MAX_KEY_COUNT) { |
| 367 | dev_err(keys->dev, "too many keys defined (%d)\n", keycount); |
| 368 | return -EINVAL; |
| 369 | } |
| 370 | |
| 371 | for_each_child_of_node(node, child) { |
| 372 | keys->keys[index].regs = &mtk_pmic_regs->keys_regs[index]; |
| 373 | |
| 374 | keys->keys[index].irq = platform_get_irq(pdev, index); |
| 375 | if (keys->keys[index].irq < 0) |
| 376 | return keys->keys[index].irq; |
| 377 | |
| 378 | if (mtk_pmic_regs->release_irq) { |
| 379 | keys->keys[index].release_irq_num = platform_get_irq( |
| 380 | pdev, |
| 381 | index + RELEASE_IRQ_INTERVAL); |
| 382 | if (keys->keys[index].release_irq_num < 0) |
| 383 | return keys->keys[index].release_irq_num; |
| 384 | } |
| 385 | |
| 386 | error = of_property_read_u32(child, |
| 387 | "linux,keycodes", &keys->keys[index].keycode); |
| 388 | if (error) { |
| 389 | dev_err(keys->dev, |
| 390 | "failed to read key:%d linux,keycode property: %d\n", |
| 391 | index, error); |
| 392 | return error; |
| 393 | } |
| 394 | |
| 395 | if (of_property_read_bool(child, "wakeup-source")) |
| 396 | keys->keys[index].wakeup = true; |
| 397 | |
| 398 | error = mtk_pmic_key_setup(keys, &keys->keys[index]); |
| 399 | if (error) { |
| 400 | pr_info("Set key index = %d error.\n", index); |
| 401 | return error; |
| 402 | } |
| 403 | |
| 404 | index++; |
| 405 | } |
| 406 | |
| 407 | error = input_register_device(input_dev); |
| 408 | if (error) { |
| 409 | dev_err(&pdev->dev, |
| 410 | "register input device failed (%d)\n", error); |
| 411 | return error; |
| 412 | } |
| 413 | |
| 414 | mtk_pmic_keys_lp_reset_setup(keys, mtk_pmic_regs); |
| 415 | |
| 416 | platform_set_drvdata(pdev, keys); |
| 417 | |
| 418 | return 0; |
| 419 | } |
| 420 | |
| 421 | static struct platform_driver pmic_keys_pdrv = { |
| 422 | .probe = mtk_pmic_keys_probe, |
| 423 | .driver = { |
| 424 | .name = "mtk-pmic-keys", |
| 425 | .of_match_table = of_mtk_pmic_keys_match_tbl, |
| 426 | .pm = &mtk_pmic_keys_pm_ops, |
| 427 | }, |
| 428 | }; |
| 429 | |
| 430 | module_platform_driver(pmic_keys_pdrv); |
| 431 | |
| 432 | MODULE_LICENSE("GPL v2"); |
| 433 | MODULE_AUTHOR("Chen Zhong <chen.zhong@mediatek.com>"); |
| 434 | MODULE_DESCRIPTION("MTK pmic-keys driver v0.1"); |