blob: 419648a8d03914664a51495b79f4da986624cf05 [file] [log] [blame]
xjb04a4022021-11-25 15:01:52 +08001// SPDX-License-Identifier: GPL-2.0
2/*
3 * mtu3.h - MediaTek USB3 DRD header
4 *
5 * Copyright (C) 2016 MediaTek Inc.
6 *
7 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
8 */
9
10#ifndef __MTU3_H__
11#define __MTU3_H__
12
13#include <linux/device.h>
14#include <linux/dmapool.h>
15#include <linux/extcon.h>
16#include <linux/interrupt.h>
17#include <linux/list.h>
18#include <linux/phy/phy.h>
19#include <linux/regulator/consumer.h>
20#include <linux/usb.h>
21#include <linux/usb/ch9.h>
22#include <linux/usb/gadget.h>
23#include <linux/usb/otg.h>
24#include <linux/usb/role.h>
25
26struct mtu3;
27struct mtu3_ep;
28struct mtu3_request;
29
30#include "mtu3_hw_regs.h"
31#include "mtu3_qmu.h"
32#include "mtu3_md_sync.h"
33
34#define MU3D_EP_TXCR0(epnum) (U3D_TX1CSR0 + (((epnum) - 1) * 0x10))
35#define MU3D_EP_TXCR1(epnum) (U3D_TX1CSR1 + (((epnum) - 1) * 0x10))
36#define MU3D_EP_TXCR2(epnum) (U3D_TX1CSR2 + (((epnum) - 1) * 0x10))
37
38#define MU3D_EP_RXCR0(epnum) (U3D_RX1CSR0 + (((epnum) - 1) * 0x10))
39#define MU3D_EP_RXCR1(epnum) (U3D_RX1CSR1 + (((epnum) - 1) * 0x10))
40#define MU3D_EP_RXCR2(epnum) (U3D_RX1CSR2 + (((epnum) - 1) * 0x10))
41
42#define USB_QMU_TQHIAR(epnum) (U3D_TXQHIAR1 + (((epnum) - 1) * 0x4))
43#define USB_QMU_RQHIAR(epnum) (U3D_RXQHIAR1 + (((epnum) - 1) * 0x4))
44
45#define USB_QMU_RQCSR(epnum) (U3D_RXQCSR1 + (((epnum) - 1) * 0x10))
46#define USB_QMU_RQSAR(epnum) (U3D_RXQSAR1 + (((epnum) - 1) * 0x10))
47#define USB_QMU_RQCPR(epnum) (U3D_RXQCPR1 + (((epnum) - 1) * 0x10))
48
49#define USB_QMU_TQCSR(epnum) (U3D_TXQCSR1 + (((epnum) - 1) * 0x10))
50#define USB_QMU_TQSAR(epnum) (U3D_TXQSAR1 + (((epnum) - 1) * 0x10))
51#define USB_QMU_TQCPR(epnum) (U3D_TXQCPR1 + (((epnum) - 1) * 0x10))
52
53#define SSUSB_U3_CTRL(p) (U3D_SSUSB_U3_CTRL_0P + ((p) * 0x08))
54#define SSUSB_U2_CTRL(p) (U3D_SSUSB_U2_CTRL_0P + ((p) * 0x08))
55
56#define MTU3_DRIVER_NAME "mtu3"
57#define DMA_ADDR_INVALID (~(dma_addr_t)0)
58
59#define MTU3_EP_ENABLED BIT(0)
60#define MTU3_EP_STALL BIT(1)
61#define MTU3_EP_WEDGE BIT(2)
62#define MTU3_EP_BUSY BIT(3)
63
64#define MTU3_U3_IP_SLOT_DEFAULT 2
65#define MTU3_U2_IP_SLOT_DEFAULT 1
66
67#define MTU3_SW_ID_GROUND BIT(0)
68#define MTU3_SW_VBUS_VALID BIT(1)
69
70/**
71 * IP TRUNK version
72 * from 0x1003 version, USB3 Gen2 is supported, two changes affect driver:
73 * 1. MAXPKT and MULTI bits layout of TXCSR1 and RXCSR1 are adjusted,
74 * but not backward compatible
75 * 2. QMU extend buffer length supported
76 */
77#define MTU3_TRUNK_VERS_1003 0x1003
78
79/**
80 * Normally the device works on HS or SS, to simplify fifo management,
81 * devide fifo into some 512B parts, use bitmap to manage it; And
82 * 128 bits size of bitmap is large enough, that means it can manage
83 * up to 64KB fifo size.
84 * NOTE: MTU3_EP_FIFO_UNIT should be power of two
85 */
86#define MTU3_EP_FIFO_UNIT (1 << 9)
87#define MTU3_FIFO_BIT_SIZE 128
88#define MTU3_U2_IP_EP0_FIFO_SIZE 64
89
90/**
91 * Maximum size of ep0 response buffer for ch9 requests,
92 * the SET_SEL request uses 6 so far, and GET_STATUS is 2
93 */
94#define EP0_RESPONSE_BUF 6
95
96/* device operated link and speed got from DEVICE_CONF register */
97enum mtu3_speed {
98 MTU3_SPEED_INACTIVE = 0,
99 MTU3_SPEED_FULL = 1,
100 MTU3_SPEED_HIGH = 3,
101 MTU3_SPEED_SUPER = 4,
102 MTU3_SPEED_SUPER_PLUS = 5,
103};
104
105/**
106 * @MU3D_EP0_STATE_SETUP: waits for SETUP or received a SETUP
107 * without data stage.
108 * @MU3D_EP0_STATE_TX: IN data stage
109 * @MU3D_EP0_STATE_RX: OUT data stage
110 * @MU3D_EP0_STATE_TX_END: the last IN data is transferred, and
111 * waits for its completion interrupt
112 * @MU3D_EP0_STATE_STALL: ep0 is in stall status, will be auto-cleared
113 * after receives a SETUP.
114 */
115enum mtu3_g_ep0_state {
116 MU3D_EP0_STATE_SETUP = 1,
117 MU3D_EP0_STATE_TX,
118 MU3D_EP0_STATE_RX,
119 MU3D_EP0_STATE_TX_END,
120 MU3D_EP0_STATE_STALL,
121};
122
123/**
124 * MTU3_DR_FORCE_NONE: automatically switch host and periperal mode
125 * by IDPIN signal.
126 * MTU3_DR_FORCE_HOST: force to enter host mode and override OTG
127 * IDPIN signal.
128 * MTU3_DR_FORCE_DEVICE: force to enter peripheral mode.
129 */
130enum mtu3_dr_force_mode {
131 MTU3_DR_FORCE_NONE = 0,
132 MTU3_DR_FORCE_HOST,
133 MTU3_DR_FORCE_DEVICE,
134};
135
136/**
137 * MTU3_DR_OPERATION_NONE: force to tun off usb
138 * MTU3_DR_OPERATION_NORMAL: automatically switch host and
139 * periperal mode by usb role switch.
140 * MTU3_DR_OPERATION_HOST: force to enter host mode.
141 * MTU3_DR_OPERATION_DEVICE: force to enter peripheral mode.
142 */
143enum mtu3_dr_operation_mode {
144 MTU3_DR_OPERATION_NONE = 0,
145 MTU3_DR_OPERATION_NORMAL,
146 MTU3_DR_OPERATION_HOST,
147 MTU3_DR_OPERATION_DEVICE,
148};
149
150typedef enum {
151 PLAT_FPGA = 0,
152 PLAT_ASIC,
153} PLATFORM_TYPE;
154
155typedef enum {
156 NO_PHY_WORKAROUND = 0,
157 A60930_WORKAROUND = 1,
158 A60979_WORKAROUND = 2,
159 A60931_WORKAROUND = 3,
160 A60862_WORKAROUND = 4
161} PHY_WORKAROUND_MODE;
162
163
164/**
165 * @base: the base address of fifo
166 * @limit: the bitmap size in bits
167 * @bitmap: fifo bitmap in unit of @MTU3_EP_FIFO_UNIT
168 */
169struct mtu3_fifo_info {
170 u32 base;
171 u32 limit;
172 DECLARE_BITMAP(bitmap, MTU3_FIFO_BIT_SIZE);
173};
174
175/**
176 * General Purpose Descriptor (GPD):
177 * The format of TX GPD is a little different from RX one.
178 * And the size of GPD is 16 bytes.
179 *
180 * @dw0_info:
181 * bit0: Hardware Own (HWO)
182 * bit1: Buffer Descriptor Present (BDP), always 0, BD is not supported
183 * bit2: Bypass (BPS), 1: HW skips this GPD if HWO = 1
184 * bit6: [EL] Zero Length Packet (ZLP), moved from @dw3_info[29]
185 * bit7: Interrupt On Completion (IOC)
186 * bit[31:16]: ([EL] bit[31:12]) allow data buffer length (RX ONLY),
187 * the buffer length of the data to receive
188 * bit[23:16]: ([EL] bit[31:24]) extension address (TX ONLY),
189 * lower 4 bits are extension bits of @buffer,
190 * upper 4 bits are extension bits of @next_gpd
191 * @next_gpd: Physical address of the next GPD
192 * @buffer: Physical address of the data buffer
193 * @dw3_info:
194 * bit[15:0]: ([EL] bit[19:0]) data buffer length,
195 * (TX): the buffer length of the data to transmit
196 * (RX): The total length of data received
197 * bit[23:16]: ([EL] bit[31:24]) extension address (RX ONLY),
198 * lower 4 bits are extension bits of @buffer,
199 * upper 4 bits are extension bits of @next_gpd
200 * bit29: ([EL] abandoned) Zero Length Packet (ZLP) (TX ONLY)
201 */
202struct qmu_gpd {
203 __le32 dw0_info;
204 __le32 next_gpd;
205 __le32 buffer;
206 __le32 dw3_info;
207} __packed;
208
209/**
210* dma: physical base address of GPD segment
211* start: virtual base address of GPD segment
212* end: the last GPD element
213* enqueue: the first empty GPD to use
214* dequeue: the first completed GPD serviced by ISR
215* NOTE: the size of GPD ring should be >= 2
216*/
217struct mtu3_gpd_ring {
218 dma_addr_t dma;
219 struct qmu_gpd *start;
220 struct qmu_gpd *end;
221 struct qmu_gpd *enqueue;
222 struct qmu_gpd *dequeue;
223};
224
225/**
226* @vbus: vbus 5V used by host mode
227* @edev: external connector used to detect vbus and iddig changes
228* @vbus_nb: notifier for vbus detection
229* @vbus_work : work of vbus detection notifier, used to avoid sleep in
230* notifier callback which is atomic context
231* @vbus_event : event of vbus detecion notifier
232* @id_nb : notifier for iddig(idpin) detection
233* @id_work : work of iddig detection notifier
234* @id_event : event of iddig detecion notifier
235* @role_sw : use USB Role Switch to support dual-role switch, can't use
236* extcon at the same time, and extcon is deprecated.
237* @role_sw_used : true when the USB Role Switch is used.
238* @is_u3_drd: whether port0 supports usb3.0 dual-role device or not
239* @manual_drd_enabled: it's true when supports dual-role device by debugfs
240* to switch host/device modes depending on user input.
241*/
242struct otg_switch_mtk {
243 struct regulator *vbus;
244 struct extcon_dev *edev;
245 struct notifier_block vbus_nb;
246 struct work_struct vbus_work;
247 unsigned long vbus_event;
248 struct notifier_block id_nb;
249 struct work_struct id_work;
250 unsigned long id_event;
251 struct usb_role_switch *role_sw;
252 bool role_sw_used;
253 bool is_u3_drd;
254 bool manual_drd_enabled;
255 u32 sw_state;
256 enum usb_role latest_role;
257 enum mtu3_dr_operation_mode op_mode;
258};
259
260/**
261 * @mac_base: register base address of device MAC, exclude xHCI's
262 * @ippc_base: register base address of IP Power and Clock interface (IPPC)
263 * @vusb33: usb3.3V shared by device/host IP
264 * @sys_clk: system clock of mtu3, shared by device/host IP
265 * @ref_clk: reference clock
266 * @mcu_clk: mcu_bus_ck clock for AHB bus etc
267 * @dma_clk: dma_bus_ck clock for AXI bus etc
268 * @dr_mode: works in which mode:
269 * host only, device only or dual-role mode
270 * @u2_ports: number of usb2.0 host ports
271 * @u3_ports: number of usb3.0 host ports
272 * @u3p_dis_msk: mask of disabling usb3 ports, for example, bit0==1 to
273 * disable u3port0, bit1==1 to disable u3port1,... etc
274 * @dbgfs_root: only used when supports manual dual-role switch via debugfs
275 * @force_vbus: without Vbus PIN, SW need set force_vbus state for device
276 * @uwk_en: it's true when supports remote wakeup in host mode
277 * @uwk: syscon including usb wakeup glue layer between SSUSB IP and SPM
278 * @uwk_reg_base: the base address of the wakeup glue layer in @uwk
279 * @uwk_vers: the version of the wakeup glue layer
280 */
281struct ssusb_mtk {
282 struct device *dev;
283 struct mtu3 *u3d;
284 void __iomem *mac_base;
285 void __iomem *ippc_base;
286 struct phy **phys;
287 int num_phys;
288 /* common power & clock */
289 struct regulator *vusb33;
290 struct clk *sys_clk;
291 struct clk *ref_clk;
292 struct clk *mcu_clk;
293 struct clk *dma_clk;
294 /* otg */
295 struct otg_switch_mtk otg_switch;
296 enum usb_dr_mode dr_mode;
297 bool is_host;
298 int u2_ports;
299 int u3_ports;
300 int u3p_dis_msk;
301 struct dentry *dbgfs_root;
302 bool force_vbus;
303 /* usb wakeup for host mode */
304 bool uwk_en;
305 struct regmap *uwk;
306 u32 uwk_reg_base;
307 u32 uwk_vers;
308 bool clk_on;
309 bool clk_mgr;
310 PLATFORM_TYPE plat_type;
311 PHY_WORKAROUND_MODE fpga_phy_workaround;
lhb1e6a722022-08-15 22:26:40 -0700312 struct mutex mutex;
313 bool power_status;
xjb04a4022021-11-25 15:01:52 +0800314};
315
316/**
317 * @fifo_size: it is (@slot + 1) * @fifo_seg_size
318 * @fifo_seg_size: it is roundup_pow_of_two(@maxp)
319 */
320struct mtu3_ep {
321 struct usb_ep ep;
322 char name[12];
323 struct mtu3 *mtu;
324 u8 epnum;
325 u8 type;
326 u8 is_in;
327 u16 maxp;
328 int slot;
329 u32 fifo_size;
330 u32 fifo_addr;
331 u32 fifo_seg_size;
332 struct mtu3_fifo_info *fifo;
333
334 struct list_head req_list;
335 struct mtu3_gpd_ring gpd_ring;
336 const struct usb_ss_ep_comp_descriptor *comp_desc;
337 const struct usb_endpoint_descriptor *desc;
338
339 int flags;
340 u8 wedged;
341 u8 busy;
342};
343
344struct mtu3_request {
345 struct usb_request request;
346 struct list_head list;
347 struct mtu3_ep *mep;
348 struct mtu3 *mtu;
349 struct qmu_gpd *gpd;
350 int epnum;
351};
352
353struct mtu3_md_sync_data {
354 struct usb_ctrlrequest *setup;
355 usb_device_info_s_t *usb_device_info;
356 usb_speed_enum_e speed;
357 int tx_ep;
358 int rx_ep;
359};
360
361static inline struct ssusb_mtk *dev_to_ssusb(struct device *dev)
362{
363 return dev_get_drvdata(dev);
364}
365
366/**
367 * struct mtu3 - device driver instance data.
368 * @slot: MTU3_U2_IP_SLOT_DEFAULT for U2 IP only,
369 * MTU3_U3_IP_SLOT_DEFAULT for U3 IP
370 * @may_wakeup: means device's remote wakeup is enabled
371 * @is_self_powered: is reported in device status and the config descriptor
372 * @delayed_status: true when function drivers ask for delayed status
373 * @gen2cp: compatible with USB3 Gen2 IP
374 * @ep0_req: dummy request used while handling standard USB requests
375 * for GET_STATUS and SET_SEL
376 * @setup_buf: ep0 response buffer for GET_STATUS and SET_SEL requests
377 */
378struct mtu3 {
379 spinlock_t lock;
380 struct ssusb_mtk *ssusb;
381 struct device *dev;
382 void __iomem *mac_base;
383 void __iomem *ippc_base;
384 int irq;
385
386 struct mtu3_fifo_info tx_fifo;
387 struct mtu3_fifo_info rx_fifo;
388
389 struct mtu3_ep *ep_array;
390 struct mtu3_ep *in_eps;
391 struct mtu3_ep *out_eps;
392 struct mtu3_ep *ep0;
393 int num_eps;
394 int slot;
395 int active_ep;
396
397 struct dma_pool *qmu_gpd_pool;
398 enum mtu3_g_ep0_state ep0_state;
399 struct usb_gadget g; /* the gadget */
400 struct usb_gadget_driver *gadget_driver;
401 struct mtu3_request ep0_req;
402 u8 setup_buf[EP0_RESPONSE_BUF];
403 u32 max_speed;
404
405 unsigned is_active:1;
406 unsigned may_wakeup:1;
407 unsigned is_self_powered:1;
408 unsigned test_mode:1;
409 unsigned softconnect:1;
410 unsigned u1_enable:1;
411 unsigned u2_enable:1;
412 unsigned is_u3_ip:1;
413 unsigned delayed_status:1;
414 unsigned gen2cp:1;
415
416 u8 address;
417 u8 test_mode_nr;
418 u32 hw_version;
419 int ccci_usb_index;
420#ifdef CONFIG_MTU3_MD_USB_EP0_CTRL
421 struct task_struct *md_msg_polling_tsk;
422#else
423 struct task_struct *isr_count_polling_tsk;
424#endif
425 struct delayed_work forward_to_driver_work;
426 struct mtu3_md_sync_data *md_sync_data;
lh0d3f4db2022-09-17 00:16:39 -0700427 int detect_gpio;//<maybe lynq modify? 20220916>
428 int detect_irq;//<maybe lynq modify? 20220916>
xjb04a4022021-11-25 15:01:52 +0800429};
430
431static inline struct mtu3 *gadget_to_mtu3(struct usb_gadget *g)
432{
433 return container_of(g, struct mtu3, g);
434}
435
436static inline int is_first_entry(const struct list_head *list,
437 const struct list_head *head)
438{
439 return list_is_last(head, list);
440}
441
442static inline struct mtu3_request *to_mtu3_request(struct usb_request *req)
443{
444 return req ? container_of(req, struct mtu3_request, request) : NULL;
445}
446
447static inline struct mtu3_ep *to_mtu3_ep(struct usb_ep *ep)
448{
449 return ep ? container_of(ep, struct mtu3_ep, ep) : NULL;
450}
451
452static inline struct mtu3_request *next_request(struct mtu3_ep *mep)
453{
454 return list_first_entry_or_null(&mep->req_list, struct mtu3_request,
455 list);
456}
457
458static inline void mtu3_writel(void __iomem *base, u32 offset, u32 data)
459{
460 writel(data, base + offset);
461}
462
463static inline u32 mtu3_readl(void __iomem *base, u32 offset)
464{
465 return readl(base + offset);
466}
467
468static inline void mtu3_setbits(void __iomem *base, u32 offset, u32 bits)
469{
470 void __iomem *addr = base + offset;
471 u32 tmp = readl(addr);
472
473 writel((tmp | (bits)), addr);
474}
475
476static inline void mtu3_clrbits(void __iomem *base, u32 offset, u32 bits)
477{
478 void __iomem *addr = base + offset;
479 u32 tmp = readl(addr);
480
481 writel((tmp & ~(bits)), addr);
482}
483
484int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks);
485void ssusb_set_force_vbus(struct ssusb_mtk *ssusb, bool vbus_on);
486int ssusb_phy_power_on(struct ssusb_mtk *ssusb);
487void ssusb_phy_power_off(struct ssusb_mtk *ssusb);
488int ssusb_clks_enable(struct ssusb_mtk *ssusb);
489void ssusb_clks_disable(struct ssusb_mtk *ssusb);
490void ssusb_ip_sw_reset(struct ssusb_mtk *ssusb);
491struct usb_request *mtu3_alloc_request(struct usb_ep *ep, gfp_t gfp_flags);
492void mtu3_free_request(struct usb_ep *ep, struct usb_request *req);
493void mtu3_req_complete(struct mtu3_ep *mep,
494 struct usb_request *req, int status);
495
496int mtu3_config_ep(struct mtu3 *mtu, struct mtu3_ep *mep,
497 int interval, int burst, int mult);
498void mtu3_deconfig_ep(struct mtu3 *mtu, struct mtu3_ep *mep);
499void mtu3_ep_stall_set(struct mtu3_ep *mep, bool set);
500void mtu3_ep0_setup(struct mtu3 *mtu);
501void mtu3_start(struct mtu3 *mtu);
502void mtu3_stop(struct mtu3 *mtu);
503void mtu3_dev_on_off(struct mtu3 *mtu, int is_on);
504void mtu3_nuke_all_ep(struct mtu3 *mtu);
505
506int mtu3_gadget_setup(struct mtu3 *mtu);
507void mtu3_gadget_cleanup(struct mtu3 *mtu);
508void mtu3_gadget_reset(struct mtu3 *mtu);
509void mtu3_gadget_suspend(struct mtu3 *mtu);
510void mtu3_gadget_resume(struct mtu3 *mtu);
511void mtu3_gadget_disconnect(struct mtu3 *mtu);
512
rjw2e8229f2022-02-15 21:08:12 +0800513int mtu3_usb_vbus_detect_init(struct ssusb_mtk *ssusb);//tianyan@2021.11.29 modify for usb otg
514
xjb04a4022021-11-25 15:01:52 +0800515irqreturn_t mtu3_ep0_isr(struct mtu3 *mtu);
516extern const struct usb_ep_ops mtu3_ep0_ops;
517
518#ifdef CONFIG_MTU3_MD_USB_EP0_CTRL
519int
520forward_to_driver(struct mtu3 *mtu, const struct usb_ctrlrequest *setup);
521void mtu3_forward_to_driver_work(struct work_struct *data);
522#endif
523#endif