| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | /* |
| 2 | * IMG SPDIF input controller driver |
| 3 | * |
| 4 | * Copyright (C) 2015 Imagination Technologies Ltd. |
| 5 | * |
| 6 | * Author: Damien Horsley <Damien.Horsley@imgtec.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms and conditions of the GNU General Public License, |
| 10 | * version 2, as published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/clk.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/kernel.h> |
| 16 | #include <linux/module.h> |
| 17 | #include <linux/of.h> |
| 18 | #include <linux/platform_device.h> |
| 19 | #include <linux/pm_runtime.h> |
| 20 | #include <linux/reset.h> |
| 21 | |
| 22 | #include <sound/core.h> |
| 23 | #include <sound/dmaengine_pcm.h> |
| 24 | #include <sound/initval.h> |
| 25 | #include <sound/pcm.h> |
| 26 | #include <sound/pcm_params.h> |
| 27 | #include <sound/soc.h> |
| 28 | |
| 29 | #define IMG_SPDIF_IN_RX_FIFO_OFFSET 0 |
| 30 | |
| 31 | #define IMG_SPDIF_IN_CTL 0x4 |
| 32 | #define IMG_SPDIF_IN_CTL_LOCKLO_MASK 0xff |
| 33 | #define IMG_SPDIF_IN_CTL_LOCKLO_SHIFT 0 |
| 34 | #define IMG_SPDIF_IN_CTL_LOCKHI_MASK 0xff00 |
| 35 | #define IMG_SPDIF_IN_CTL_LOCKHI_SHIFT 8 |
| 36 | #define IMG_SPDIF_IN_CTL_TRK_MASK 0xff0000 |
| 37 | #define IMG_SPDIF_IN_CTL_TRK_SHIFT 16 |
| 38 | #define IMG_SPDIF_IN_CTL_SRD_MASK 0x70000000 |
| 39 | #define IMG_SPDIF_IN_CTL_SRD_SHIFT 28 |
| 40 | #define IMG_SPDIF_IN_CTL_SRT_MASK BIT(31) |
| 41 | |
| 42 | #define IMG_SPDIF_IN_STATUS 0x8 |
| 43 | #define IMG_SPDIF_IN_STATUS_SAM_MASK 0x7000 |
| 44 | #define IMG_SPDIF_IN_STATUS_SAM_SHIFT 12 |
| 45 | #define IMG_SPDIF_IN_STATUS_LOCK_MASK BIT(15) |
| 46 | #define IMG_SPDIF_IN_STATUS_LOCK_SHIFT 15 |
| 47 | |
| 48 | #define IMG_SPDIF_IN_CLKGEN 0x1c |
| 49 | #define IMG_SPDIF_IN_CLKGEN_NOM_MASK 0x3ff |
| 50 | #define IMG_SPDIF_IN_CLKGEN_NOM_SHIFT 0 |
| 51 | #define IMG_SPDIF_IN_CLKGEN_HLD_MASK 0x3ff0000 |
| 52 | #define IMG_SPDIF_IN_CLKGEN_HLD_SHIFT 16 |
| 53 | |
| 54 | #define IMG_SPDIF_IN_CSL 0x20 |
| 55 | |
| 56 | #define IMG_SPDIF_IN_CSH 0x24 |
| 57 | #define IMG_SPDIF_IN_CSH_MASK 0xff |
| 58 | #define IMG_SPDIF_IN_CSH_SHIFT 0 |
| 59 | |
| 60 | #define IMG_SPDIF_IN_SOFT_RESET 0x28 |
| 61 | #define IMG_SPDIF_IN_SOFT_RESET_MASK BIT(0) |
| 62 | |
| 63 | #define IMG_SPDIF_IN_ACLKGEN_START 0x2c |
| 64 | #define IMG_SPDIF_IN_ACLKGEN_NOM_MASK 0x3ff |
| 65 | #define IMG_SPDIF_IN_ACLKGEN_NOM_SHIFT 0 |
| 66 | #define IMG_SPDIF_IN_ACLKGEN_HLD_MASK 0xffc00 |
| 67 | #define IMG_SPDIF_IN_ACLKGEN_HLD_SHIFT 10 |
| 68 | #define IMG_SPDIF_IN_ACLKGEN_TRK_MASK 0xff00000 |
| 69 | #define IMG_SPDIF_IN_ACLKGEN_TRK_SHIFT 20 |
| 70 | |
| 71 | #define IMG_SPDIF_IN_NUM_ACLKGEN 4 |
| 72 | |
| 73 | struct img_spdif_in { |
| 74 | spinlock_t lock; |
| 75 | void __iomem *base; |
| 76 | struct clk *clk_sys; |
| 77 | struct snd_dmaengine_dai_dma_data dma_data; |
| 78 | struct device *dev; |
| 79 | unsigned int trk; |
| 80 | bool multi_freq; |
| 81 | int lock_acquire; |
| 82 | int lock_release; |
| 83 | unsigned int single_freq; |
| 84 | unsigned int multi_freqs[IMG_SPDIF_IN_NUM_ACLKGEN]; |
| 85 | bool active; |
| 86 | u32 suspend_clkgen; |
| 87 | u32 suspend_ctl; |
| 88 | |
| 89 | /* Write-only registers */ |
| 90 | unsigned int aclkgen_regs[IMG_SPDIF_IN_NUM_ACLKGEN]; |
| 91 | }; |
| 92 | |
| 93 | static int img_spdif_in_runtime_suspend(struct device *dev) |
| 94 | { |
| 95 | struct img_spdif_in *spdif = dev_get_drvdata(dev); |
| 96 | |
| 97 | clk_disable_unprepare(spdif->clk_sys); |
| 98 | |
| 99 | return 0; |
| 100 | } |
| 101 | |
| 102 | static int img_spdif_in_runtime_resume(struct device *dev) |
| 103 | { |
| 104 | struct img_spdif_in *spdif = dev_get_drvdata(dev); |
| 105 | int ret; |
| 106 | |
| 107 | ret = clk_prepare_enable(spdif->clk_sys); |
| 108 | if (ret) { |
| 109 | dev_err(dev, "Unable to enable sys clock\n"); |
| 110 | return ret; |
| 111 | } |
| 112 | |
| 113 | return 0; |
| 114 | } |
| 115 | |
| 116 | static inline void img_spdif_in_writel(struct img_spdif_in *spdif, |
| 117 | u32 val, u32 reg) |
| 118 | { |
| 119 | writel(val, spdif->base + reg); |
| 120 | } |
| 121 | |
| 122 | static inline u32 img_spdif_in_readl(struct img_spdif_in *spdif, u32 reg) |
| 123 | { |
| 124 | return readl(spdif->base + reg); |
| 125 | } |
| 126 | |
| 127 | static inline void img_spdif_in_aclkgen_writel(struct img_spdif_in *spdif, |
| 128 | u32 index) |
| 129 | { |
| 130 | img_spdif_in_writel(spdif, spdif->aclkgen_regs[index], |
| 131 | IMG_SPDIF_IN_ACLKGEN_START + (index * 0x4)); |
| 132 | } |
| 133 | |
| 134 | static int img_spdif_in_check_max_rate(struct img_spdif_in *spdif, |
| 135 | unsigned int sample_rate, unsigned long *actual_freq) |
| 136 | { |
| 137 | unsigned long min_freq, freq_t; |
| 138 | |
| 139 | /* Clock rate must be at least 24x the bit rate */ |
| 140 | min_freq = sample_rate * 2 * 32 * 24; |
| 141 | |
| 142 | freq_t = clk_get_rate(spdif->clk_sys); |
| 143 | |
| 144 | if (freq_t < min_freq) |
| 145 | return -EINVAL; |
| 146 | |
| 147 | *actual_freq = freq_t; |
| 148 | |
| 149 | return 0; |
| 150 | } |
| 151 | |
| 152 | static int img_spdif_in_do_clkgen_calc(unsigned int rate, unsigned int *pnom, |
| 153 | unsigned int *phld, unsigned long clk_rate) |
| 154 | { |
| 155 | unsigned int ori, nom, hld; |
| 156 | |
| 157 | /* |
| 158 | * Calculate oversampling ratio, nominal phase increment and hold |
| 159 | * increment for the given rate / frequency |
| 160 | */ |
| 161 | |
| 162 | if (!rate) |
| 163 | return -EINVAL; |
| 164 | |
| 165 | ori = clk_rate / (rate * 64); |
| 166 | |
| 167 | if (!ori) |
| 168 | return -EINVAL; |
| 169 | |
| 170 | nom = (4096 / ori) + 1; |
| 171 | do |
| 172 | hld = 4096 - (--nom * (ori - 1)); |
| 173 | while (hld < 120); |
| 174 | |
| 175 | *pnom = nom; |
| 176 | *phld = hld; |
| 177 | |
| 178 | return 0; |
| 179 | } |
| 180 | |
| 181 | static int img_spdif_in_do_clkgen_single(struct img_spdif_in *spdif, |
| 182 | unsigned int rate) |
| 183 | { |
| 184 | unsigned int nom, hld; |
| 185 | unsigned long flags, clk_rate; |
| 186 | int ret = 0; |
| 187 | u32 reg; |
| 188 | |
| 189 | ret = img_spdif_in_check_max_rate(spdif, rate, &clk_rate); |
| 190 | if (ret) |
| 191 | return ret; |
| 192 | |
| 193 | ret = img_spdif_in_do_clkgen_calc(rate, &nom, &hld, clk_rate); |
| 194 | if (ret) |
| 195 | return ret; |
| 196 | |
| 197 | reg = (nom << IMG_SPDIF_IN_CLKGEN_NOM_SHIFT) & |
| 198 | IMG_SPDIF_IN_CLKGEN_NOM_MASK; |
| 199 | reg |= (hld << IMG_SPDIF_IN_CLKGEN_HLD_SHIFT) & |
| 200 | IMG_SPDIF_IN_CLKGEN_HLD_MASK; |
| 201 | |
| 202 | spin_lock_irqsave(&spdif->lock, flags); |
| 203 | |
| 204 | if (spdif->active) { |
| 205 | spin_unlock_irqrestore(&spdif->lock, flags); |
| 206 | return -EBUSY; |
| 207 | } |
| 208 | |
| 209 | img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CLKGEN); |
| 210 | |
| 211 | spdif->single_freq = rate; |
| 212 | |
| 213 | spin_unlock_irqrestore(&spdif->lock, flags); |
| 214 | |
| 215 | return 0; |
| 216 | } |
| 217 | |
| 218 | static int img_spdif_in_do_clkgen_multi(struct img_spdif_in *spdif, |
| 219 | unsigned int multi_freqs[]) |
| 220 | { |
| 221 | unsigned int nom, hld, rate, max_rate = 0; |
| 222 | unsigned long flags, clk_rate; |
| 223 | int i, ret = 0; |
| 224 | u32 reg, trk_reg, temp_regs[IMG_SPDIF_IN_NUM_ACLKGEN]; |
| 225 | |
| 226 | for (i = 0; i < IMG_SPDIF_IN_NUM_ACLKGEN; i++) |
| 227 | if (multi_freqs[i] > max_rate) |
| 228 | max_rate = multi_freqs[i]; |
| 229 | |
| 230 | ret = img_spdif_in_check_max_rate(spdif, max_rate, &clk_rate); |
| 231 | if (ret) |
| 232 | return ret; |
| 233 | |
| 234 | for (i = 0; i < IMG_SPDIF_IN_NUM_ACLKGEN; i++) { |
| 235 | rate = multi_freqs[i]; |
| 236 | |
| 237 | ret = img_spdif_in_do_clkgen_calc(rate, &nom, &hld, clk_rate); |
| 238 | if (ret) |
| 239 | return ret; |
| 240 | |
| 241 | reg = (nom << IMG_SPDIF_IN_ACLKGEN_NOM_SHIFT) & |
| 242 | IMG_SPDIF_IN_ACLKGEN_NOM_MASK; |
| 243 | reg |= (hld << IMG_SPDIF_IN_ACLKGEN_HLD_SHIFT) & |
| 244 | IMG_SPDIF_IN_ACLKGEN_HLD_MASK; |
| 245 | temp_regs[i] = reg; |
| 246 | } |
| 247 | |
| 248 | spin_lock_irqsave(&spdif->lock, flags); |
| 249 | |
| 250 | if (spdif->active) { |
| 251 | spin_unlock_irqrestore(&spdif->lock, flags); |
| 252 | return -EBUSY; |
| 253 | } |
| 254 | |
| 255 | trk_reg = spdif->trk << IMG_SPDIF_IN_ACLKGEN_TRK_SHIFT; |
| 256 | |
| 257 | for (i = 0; i < IMG_SPDIF_IN_NUM_ACLKGEN; i++) { |
| 258 | spdif->aclkgen_regs[i] = temp_regs[i] | trk_reg; |
| 259 | img_spdif_in_aclkgen_writel(spdif, i); |
| 260 | } |
| 261 | |
| 262 | spdif->multi_freq = true; |
| 263 | spdif->multi_freqs[0] = multi_freqs[0]; |
| 264 | spdif->multi_freqs[1] = multi_freqs[1]; |
| 265 | spdif->multi_freqs[2] = multi_freqs[2]; |
| 266 | spdif->multi_freqs[3] = multi_freqs[3]; |
| 267 | |
| 268 | spin_unlock_irqrestore(&spdif->lock, flags); |
| 269 | |
| 270 | return 0; |
| 271 | } |
| 272 | |
| 273 | static int img_spdif_in_iec958_info(struct snd_kcontrol *kcontrol, |
| 274 | struct snd_ctl_elem_info *uinfo) |
| 275 | { |
| 276 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; |
| 277 | uinfo->count = 1; |
| 278 | |
| 279 | return 0; |
| 280 | } |
| 281 | |
| 282 | static int img_spdif_in_get_status_mask(struct snd_kcontrol *kcontrol, |
| 283 | struct snd_ctl_elem_value *ucontrol) |
| 284 | { |
| 285 | ucontrol->value.iec958.status[0] = 0xff; |
| 286 | ucontrol->value.iec958.status[1] = 0xff; |
| 287 | ucontrol->value.iec958.status[2] = 0xff; |
| 288 | ucontrol->value.iec958.status[3] = 0xff; |
| 289 | ucontrol->value.iec958.status[4] = 0xff; |
| 290 | |
| 291 | return 0; |
| 292 | } |
| 293 | |
| 294 | static int img_spdif_in_get_status(struct snd_kcontrol *kcontrol, |
| 295 | struct snd_ctl_elem_value *ucontrol) |
| 296 | { |
| 297 | struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); |
| 298 | struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai); |
| 299 | u32 reg; |
| 300 | |
| 301 | reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CSL); |
| 302 | ucontrol->value.iec958.status[0] = reg & 0xff; |
| 303 | ucontrol->value.iec958.status[1] = (reg >> 8) & 0xff; |
| 304 | ucontrol->value.iec958.status[2] = (reg >> 16) & 0xff; |
| 305 | ucontrol->value.iec958.status[3] = (reg >> 24) & 0xff; |
| 306 | reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CSH); |
| 307 | ucontrol->value.iec958.status[4] = (reg & IMG_SPDIF_IN_CSH_MASK) |
| 308 | >> IMG_SPDIF_IN_CSH_SHIFT; |
| 309 | |
| 310 | return 0; |
| 311 | } |
| 312 | |
| 313 | static int img_spdif_in_info_multi_freq(struct snd_kcontrol *kcontrol, |
| 314 | struct snd_ctl_elem_info *uinfo) |
| 315 | { |
| 316 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; |
| 317 | uinfo->count = IMG_SPDIF_IN_NUM_ACLKGEN; |
| 318 | uinfo->value.integer.min = 0; |
| 319 | uinfo->value.integer.max = LONG_MAX; |
| 320 | |
| 321 | return 0; |
| 322 | } |
| 323 | |
| 324 | static int img_spdif_in_get_multi_freq(struct snd_kcontrol *kcontrol, |
| 325 | struct snd_ctl_elem_value *ucontrol) |
| 326 | { |
| 327 | struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); |
| 328 | struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai); |
| 329 | unsigned long flags; |
| 330 | |
| 331 | spin_lock_irqsave(&spdif->lock, flags); |
| 332 | if (spdif->multi_freq) { |
| 333 | ucontrol->value.integer.value[0] = spdif->multi_freqs[0]; |
| 334 | ucontrol->value.integer.value[1] = spdif->multi_freqs[1]; |
| 335 | ucontrol->value.integer.value[2] = spdif->multi_freqs[2]; |
| 336 | ucontrol->value.integer.value[3] = spdif->multi_freqs[3]; |
| 337 | } else { |
| 338 | ucontrol->value.integer.value[0] = 0; |
| 339 | ucontrol->value.integer.value[1] = 0; |
| 340 | ucontrol->value.integer.value[2] = 0; |
| 341 | ucontrol->value.integer.value[3] = 0; |
| 342 | } |
| 343 | spin_unlock_irqrestore(&spdif->lock, flags); |
| 344 | |
| 345 | return 0; |
| 346 | } |
| 347 | |
| 348 | static int img_spdif_in_set_multi_freq(struct snd_kcontrol *kcontrol, |
| 349 | struct snd_ctl_elem_value *ucontrol) |
| 350 | { |
| 351 | struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); |
| 352 | struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai); |
| 353 | unsigned int multi_freqs[IMG_SPDIF_IN_NUM_ACLKGEN]; |
| 354 | bool multi_freq; |
| 355 | unsigned long flags; |
| 356 | |
| 357 | if ((ucontrol->value.integer.value[0] == 0) && |
| 358 | (ucontrol->value.integer.value[1] == 0) && |
| 359 | (ucontrol->value.integer.value[2] == 0) && |
| 360 | (ucontrol->value.integer.value[3] == 0)) { |
| 361 | multi_freq = false; |
| 362 | } else { |
| 363 | multi_freqs[0] = ucontrol->value.integer.value[0]; |
| 364 | multi_freqs[1] = ucontrol->value.integer.value[1]; |
| 365 | multi_freqs[2] = ucontrol->value.integer.value[2]; |
| 366 | multi_freqs[3] = ucontrol->value.integer.value[3]; |
| 367 | multi_freq = true; |
| 368 | } |
| 369 | |
| 370 | if (multi_freq) |
| 371 | return img_spdif_in_do_clkgen_multi(spdif, multi_freqs); |
| 372 | |
| 373 | spin_lock_irqsave(&spdif->lock, flags); |
| 374 | |
| 375 | if (spdif->active) { |
| 376 | spin_unlock_irqrestore(&spdif->lock, flags); |
| 377 | return -EBUSY; |
| 378 | } |
| 379 | |
| 380 | spdif->multi_freq = false; |
| 381 | |
| 382 | spin_unlock_irqrestore(&spdif->lock, flags); |
| 383 | |
| 384 | return 0; |
| 385 | } |
| 386 | |
| 387 | static int img_spdif_in_info_lock_freq(struct snd_kcontrol *kcontrol, |
| 388 | struct snd_ctl_elem_info *uinfo) |
| 389 | { |
| 390 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; |
| 391 | uinfo->count = 1; |
| 392 | uinfo->value.integer.min = 0; |
| 393 | uinfo->value.integer.max = LONG_MAX; |
| 394 | |
| 395 | return 0; |
| 396 | } |
| 397 | |
| 398 | static int img_spdif_in_get_lock_freq(struct snd_kcontrol *kcontrol, |
| 399 | struct snd_ctl_elem_value *uc) |
| 400 | { |
| 401 | struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); |
| 402 | struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai); |
| 403 | u32 reg; |
| 404 | int i; |
| 405 | unsigned long flags; |
| 406 | |
| 407 | spin_lock_irqsave(&spdif->lock, flags); |
| 408 | |
| 409 | reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_STATUS); |
| 410 | if (reg & IMG_SPDIF_IN_STATUS_LOCK_MASK) { |
| 411 | if (spdif->multi_freq) { |
| 412 | i = ((reg & IMG_SPDIF_IN_STATUS_SAM_MASK) >> |
| 413 | IMG_SPDIF_IN_STATUS_SAM_SHIFT) - 1; |
| 414 | uc->value.integer.value[0] = spdif->multi_freqs[i]; |
| 415 | } else { |
| 416 | uc->value.integer.value[0] = spdif->single_freq; |
| 417 | } |
| 418 | } else { |
| 419 | uc->value.integer.value[0] = 0; |
| 420 | } |
| 421 | |
| 422 | spin_unlock_irqrestore(&spdif->lock, flags); |
| 423 | |
| 424 | return 0; |
| 425 | } |
| 426 | |
| 427 | static int img_spdif_in_info_trk(struct snd_kcontrol *kcontrol, |
| 428 | struct snd_ctl_elem_info *uinfo) |
| 429 | { |
| 430 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; |
| 431 | uinfo->count = 1; |
| 432 | uinfo->value.integer.min = 0; |
| 433 | uinfo->value.integer.max = 255; |
| 434 | |
| 435 | return 0; |
| 436 | } |
| 437 | |
| 438 | static int img_spdif_in_get_trk(struct snd_kcontrol *kcontrol, |
| 439 | struct snd_ctl_elem_value *ucontrol) |
| 440 | { |
| 441 | struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); |
| 442 | struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai); |
| 443 | |
| 444 | ucontrol->value.integer.value[0] = spdif->trk; |
| 445 | |
| 446 | return 0; |
| 447 | } |
| 448 | |
| 449 | static int img_spdif_in_set_trk(struct snd_kcontrol *kcontrol, |
| 450 | struct snd_ctl_elem_value *ucontrol) |
| 451 | { |
| 452 | struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); |
| 453 | struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai); |
| 454 | unsigned long flags; |
| 455 | int i; |
| 456 | u32 reg; |
| 457 | |
| 458 | spin_lock_irqsave(&spdif->lock, flags); |
| 459 | |
| 460 | if (spdif->active) { |
| 461 | spin_unlock_irqrestore(&spdif->lock, flags); |
| 462 | return -EBUSY; |
| 463 | } |
| 464 | |
| 465 | spdif->trk = ucontrol->value.integer.value[0]; |
| 466 | |
| 467 | reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL); |
| 468 | reg &= ~IMG_SPDIF_IN_CTL_TRK_MASK; |
| 469 | reg |= spdif->trk << IMG_SPDIF_IN_CTL_TRK_SHIFT; |
| 470 | img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL); |
| 471 | |
| 472 | for (i = 0; i < IMG_SPDIF_IN_NUM_ACLKGEN; i++) { |
| 473 | spdif->aclkgen_regs[i] = (spdif->aclkgen_regs[i] & |
| 474 | ~IMG_SPDIF_IN_ACLKGEN_TRK_MASK) | |
| 475 | (spdif->trk << IMG_SPDIF_IN_ACLKGEN_TRK_SHIFT); |
| 476 | |
| 477 | img_spdif_in_aclkgen_writel(spdif, i); |
| 478 | } |
| 479 | |
| 480 | spin_unlock_irqrestore(&spdif->lock, flags); |
| 481 | |
| 482 | return 0; |
| 483 | } |
| 484 | |
| 485 | static int img_spdif_in_info_lock(struct snd_kcontrol *kcontrol, |
| 486 | struct snd_ctl_elem_info *uinfo) |
| 487 | { |
| 488 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; |
| 489 | uinfo->count = 1; |
| 490 | uinfo->value.integer.min = -128; |
| 491 | uinfo->value.integer.max = 127; |
| 492 | |
| 493 | return 0; |
| 494 | } |
| 495 | |
| 496 | static int img_spdif_in_get_lock_acquire(struct snd_kcontrol *kcontrol, |
| 497 | struct snd_ctl_elem_value *ucontrol) |
| 498 | { |
| 499 | struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); |
| 500 | struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai); |
| 501 | |
| 502 | ucontrol->value.integer.value[0] = spdif->lock_acquire; |
| 503 | |
| 504 | return 0; |
| 505 | } |
| 506 | |
| 507 | static int img_spdif_in_set_lock_acquire(struct snd_kcontrol *kcontrol, |
| 508 | struct snd_ctl_elem_value *ucontrol) |
| 509 | { |
| 510 | struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); |
| 511 | struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai); |
| 512 | unsigned long flags; |
| 513 | u32 reg; |
| 514 | |
| 515 | spin_lock_irqsave(&spdif->lock, flags); |
| 516 | |
| 517 | if (spdif->active) { |
| 518 | spin_unlock_irqrestore(&spdif->lock, flags); |
| 519 | return -EBUSY; |
| 520 | } |
| 521 | |
| 522 | spdif->lock_acquire = ucontrol->value.integer.value[0]; |
| 523 | |
| 524 | reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL); |
| 525 | reg &= ~IMG_SPDIF_IN_CTL_LOCKHI_MASK; |
| 526 | reg |= (spdif->lock_acquire << IMG_SPDIF_IN_CTL_LOCKHI_SHIFT) & |
| 527 | IMG_SPDIF_IN_CTL_LOCKHI_MASK; |
| 528 | img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL); |
| 529 | |
| 530 | spin_unlock_irqrestore(&spdif->lock, flags); |
| 531 | |
| 532 | return 0; |
| 533 | } |
| 534 | |
| 535 | static int img_spdif_in_get_lock_release(struct snd_kcontrol *kcontrol, |
| 536 | struct snd_ctl_elem_value *ucontrol) |
| 537 | { |
| 538 | struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); |
| 539 | struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai); |
| 540 | |
| 541 | ucontrol->value.integer.value[0] = spdif->lock_release; |
| 542 | |
| 543 | return 0; |
| 544 | } |
| 545 | |
| 546 | static int img_spdif_in_set_lock_release(struct snd_kcontrol *kcontrol, |
| 547 | struct snd_ctl_elem_value *ucontrol) |
| 548 | { |
| 549 | struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); |
| 550 | struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai); |
| 551 | unsigned long flags; |
| 552 | u32 reg; |
| 553 | |
| 554 | spin_lock_irqsave(&spdif->lock, flags); |
| 555 | |
| 556 | if (spdif->active) { |
| 557 | spin_unlock_irqrestore(&spdif->lock, flags); |
| 558 | return -EBUSY; |
| 559 | } |
| 560 | |
| 561 | spdif->lock_release = ucontrol->value.integer.value[0]; |
| 562 | |
| 563 | reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL); |
| 564 | reg &= ~IMG_SPDIF_IN_CTL_LOCKLO_MASK; |
| 565 | reg |= (spdif->lock_release << IMG_SPDIF_IN_CTL_LOCKLO_SHIFT) & |
| 566 | IMG_SPDIF_IN_CTL_LOCKLO_MASK; |
| 567 | img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL); |
| 568 | |
| 569 | spin_unlock_irqrestore(&spdif->lock, flags); |
| 570 | |
| 571 | return 0; |
| 572 | } |
| 573 | |
| 574 | static struct snd_kcontrol_new img_spdif_in_controls[] = { |
| 575 | { |
| 576 | .access = SNDRV_CTL_ELEM_ACCESS_READ, |
| 577 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
| 578 | .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK), |
| 579 | .info = img_spdif_in_iec958_info, |
| 580 | .get = img_spdif_in_get_status_mask |
| 581 | }, |
| 582 | { |
| 583 | .access = SNDRV_CTL_ELEM_ACCESS_READ | |
| 584 | SNDRV_CTL_ELEM_ACCESS_VOLATILE, |
| 585 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
| 586 | .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT), |
| 587 | .info = img_spdif_in_iec958_info, |
| 588 | .get = img_spdif_in_get_status |
| 589 | }, |
| 590 | { |
| 591 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
| 592 | .name = "SPDIF In Multi Frequency Acquire", |
| 593 | .info = img_spdif_in_info_multi_freq, |
| 594 | .get = img_spdif_in_get_multi_freq, |
| 595 | .put = img_spdif_in_set_multi_freq |
| 596 | }, |
| 597 | { |
| 598 | .access = SNDRV_CTL_ELEM_ACCESS_READ | |
| 599 | SNDRV_CTL_ELEM_ACCESS_VOLATILE, |
| 600 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
| 601 | .name = "SPDIF In Lock Frequency", |
| 602 | .info = img_spdif_in_info_lock_freq, |
| 603 | .get = img_spdif_in_get_lock_freq |
| 604 | }, |
| 605 | { |
| 606 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
| 607 | .name = "SPDIF In Lock TRK", |
| 608 | .info = img_spdif_in_info_trk, |
| 609 | .get = img_spdif_in_get_trk, |
| 610 | .put = img_spdif_in_set_trk |
| 611 | }, |
| 612 | { |
| 613 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
| 614 | .name = "SPDIF In Lock Acquire Threshold", |
| 615 | .info = img_spdif_in_info_lock, |
| 616 | .get = img_spdif_in_get_lock_acquire, |
| 617 | .put = img_spdif_in_set_lock_acquire |
| 618 | }, |
| 619 | { |
| 620 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
| 621 | .name = "SPDIF In Lock Release Threshold", |
| 622 | .info = img_spdif_in_info_lock, |
| 623 | .get = img_spdif_in_get_lock_release, |
| 624 | .put = img_spdif_in_set_lock_release |
| 625 | } |
| 626 | }; |
| 627 | |
| 628 | static int img_spdif_in_trigger(struct snd_pcm_substream *substream, int cmd, |
| 629 | struct snd_soc_dai *dai) |
| 630 | { |
| 631 | unsigned long flags; |
| 632 | struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(dai); |
| 633 | int ret = 0; |
| 634 | u32 reg; |
| 635 | |
| 636 | spin_lock_irqsave(&spdif->lock, flags); |
| 637 | |
| 638 | switch (cmd) { |
| 639 | case SNDRV_PCM_TRIGGER_START: |
| 640 | case SNDRV_PCM_TRIGGER_RESUME: |
| 641 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
| 642 | reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL); |
| 643 | if (spdif->multi_freq) |
| 644 | reg &= ~IMG_SPDIF_IN_CTL_SRD_MASK; |
| 645 | else |
| 646 | reg |= (1UL << IMG_SPDIF_IN_CTL_SRD_SHIFT); |
| 647 | reg |= IMG_SPDIF_IN_CTL_SRT_MASK; |
| 648 | img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL); |
| 649 | spdif->active = true; |
| 650 | break; |
| 651 | case SNDRV_PCM_TRIGGER_STOP: |
| 652 | case SNDRV_PCM_TRIGGER_SUSPEND: |
| 653 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
| 654 | reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL); |
| 655 | reg &= ~IMG_SPDIF_IN_CTL_SRT_MASK; |
| 656 | img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL); |
| 657 | spdif->active = false; |
| 658 | break; |
| 659 | default: |
| 660 | ret = -EINVAL; |
| 661 | } |
| 662 | |
| 663 | spin_unlock_irqrestore(&spdif->lock, flags); |
| 664 | |
| 665 | return ret; |
| 666 | } |
| 667 | |
| 668 | static int img_spdif_in_hw_params(struct snd_pcm_substream *substream, |
| 669 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) |
| 670 | { |
| 671 | struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(dai); |
| 672 | unsigned int rate, channels; |
| 673 | snd_pcm_format_t format; |
| 674 | |
| 675 | rate = params_rate(params); |
| 676 | channels = params_channels(params); |
| 677 | format = params_format(params); |
| 678 | |
| 679 | if (format != SNDRV_PCM_FORMAT_S32_LE) |
| 680 | return -EINVAL; |
| 681 | |
| 682 | if (channels != 2) |
| 683 | return -EINVAL; |
| 684 | |
| 685 | return img_spdif_in_do_clkgen_single(spdif, rate); |
| 686 | } |
| 687 | |
| 688 | static const struct snd_soc_dai_ops img_spdif_in_dai_ops = { |
| 689 | .trigger = img_spdif_in_trigger, |
| 690 | .hw_params = img_spdif_in_hw_params |
| 691 | }; |
| 692 | |
| 693 | static int img_spdif_in_dai_probe(struct snd_soc_dai *dai) |
| 694 | { |
| 695 | struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(dai); |
| 696 | |
| 697 | snd_soc_dai_init_dma_data(dai, NULL, &spdif->dma_data); |
| 698 | |
| 699 | snd_soc_add_dai_controls(dai, img_spdif_in_controls, |
| 700 | ARRAY_SIZE(img_spdif_in_controls)); |
| 701 | |
| 702 | return 0; |
| 703 | } |
| 704 | |
| 705 | static struct snd_soc_dai_driver img_spdif_in_dai = { |
| 706 | .probe = img_spdif_in_dai_probe, |
| 707 | .capture = { |
| 708 | .channels_min = 2, |
| 709 | .channels_max = 2, |
| 710 | .rates = SNDRV_PCM_RATE_8000_192000, |
| 711 | .formats = SNDRV_PCM_FMTBIT_S32_LE |
| 712 | }, |
| 713 | .ops = &img_spdif_in_dai_ops |
| 714 | }; |
| 715 | |
| 716 | static const struct snd_soc_component_driver img_spdif_in_component = { |
| 717 | .name = "img-spdif-in" |
| 718 | }; |
| 719 | |
| 720 | static int img_spdif_in_probe(struct platform_device *pdev) |
| 721 | { |
| 722 | struct img_spdif_in *spdif; |
| 723 | struct resource *res; |
| 724 | void __iomem *base; |
| 725 | int ret; |
| 726 | struct reset_control *rst; |
| 727 | u32 reg; |
| 728 | struct device *dev = &pdev->dev; |
| 729 | |
| 730 | spdif = devm_kzalloc(&pdev->dev, sizeof(*spdif), GFP_KERNEL); |
| 731 | if (!spdif) |
| 732 | return -ENOMEM; |
| 733 | |
| 734 | platform_set_drvdata(pdev, spdif); |
| 735 | |
| 736 | spdif->dev = &pdev->dev; |
| 737 | |
| 738 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 739 | base = devm_ioremap_resource(&pdev->dev, res); |
| 740 | if (IS_ERR(base)) |
| 741 | return PTR_ERR(base); |
| 742 | |
| 743 | spdif->base = base; |
| 744 | |
| 745 | spdif->clk_sys = devm_clk_get(dev, "sys"); |
| 746 | if (IS_ERR(spdif->clk_sys)) { |
| 747 | if (PTR_ERR(spdif->clk_sys) != -EPROBE_DEFER) |
| 748 | dev_err(dev, "Failed to acquire clock 'sys'\n"); |
| 749 | return PTR_ERR(spdif->clk_sys); |
| 750 | } |
| 751 | |
| 752 | pm_runtime_enable(&pdev->dev); |
| 753 | if (!pm_runtime_enabled(&pdev->dev)) { |
| 754 | ret = img_spdif_in_runtime_resume(&pdev->dev); |
| 755 | if (ret) |
| 756 | goto err_pm_disable; |
| 757 | } |
| 758 | ret = pm_runtime_get_sync(&pdev->dev); |
| 759 | if (ret < 0) |
| 760 | goto err_suspend; |
| 761 | |
| 762 | rst = devm_reset_control_get_exclusive(&pdev->dev, "rst"); |
| 763 | if (IS_ERR(rst)) { |
| 764 | if (PTR_ERR(rst) == -EPROBE_DEFER) { |
| 765 | ret = -EPROBE_DEFER; |
| 766 | goto err_pm_put; |
| 767 | } |
| 768 | dev_dbg(dev, "No top level reset found\n"); |
| 769 | img_spdif_in_writel(spdif, IMG_SPDIF_IN_SOFT_RESET_MASK, |
| 770 | IMG_SPDIF_IN_SOFT_RESET); |
| 771 | img_spdif_in_writel(spdif, 0, IMG_SPDIF_IN_SOFT_RESET); |
| 772 | } else { |
| 773 | reset_control_assert(rst); |
| 774 | reset_control_deassert(rst); |
| 775 | } |
| 776 | |
| 777 | spin_lock_init(&spdif->lock); |
| 778 | |
| 779 | spdif->dma_data.addr = res->start + IMG_SPDIF_IN_RX_FIFO_OFFSET; |
| 780 | spdif->dma_data.addr_width = 4; |
| 781 | spdif->dma_data.maxburst = 4; |
| 782 | spdif->trk = 0x80; |
| 783 | spdif->lock_acquire = 4; |
| 784 | spdif->lock_release = -128; |
| 785 | |
| 786 | reg = (spdif->lock_acquire << IMG_SPDIF_IN_CTL_LOCKHI_SHIFT) & |
| 787 | IMG_SPDIF_IN_CTL_LOCKHI_MASK; |
| 788 | reg |= (spdif->lock_release << IMG_SPDIF_IN_CTL_LOCKLO_SHIFT) & |
| 789 | IMG_SPDIF_IN_CTL_LOCKLO_MASK; |
| 790 | reg |= (spdif->trk << IMG_SPDIF_IN_CTL_TRK_SHIFT) & |
| 791 | IMG_SPDIF_IN_CTL_TRK_MASK; |
| 792 | img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL); |
| 793 | |
| 794 | pm_runtime_put(&pdev->dev); |
| 795 | |
| 796 | ret = devm_snd_soc_register_component(&pdev->dev, |
| 797 | &img_spdif_in_component, &img_spdif_in_dai, 1); |
| 798 | if (ret) |
| 799 | goto err_suspend; |
| 800 | |
| 801 | ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); |
| 802 | if (ret) |
| 803 | goto err_suspend; |
| 804 | |
| 805 | return 0; |
| 806 | |
| 807 | err_pm_put: |
| 808 | pm_runtime_put(&pdev->dev); |
| 809 | err_suspend: |
| 810 | if (!pm_runtime_enabled(&pdev->dev)) |
| 811 | img_spdif_in_runtime_suspend(&pdev->dev); |
| 812 | err_pm_disable: |
| 813 | pm_runtime_disable(&pdev->dev); |
| 814 | |
| 815 | return ret; |
| 816 | } |
| 817 | |
| 818 | static int img_spdif_in_dev_remove(struct platform_device *pdev) |
| 819 | { |
| 820 | pm_runtime_disable(&pdev->dev); |
| 821 | if (!pm_runtime_status_suspended(&pdev->dev)) |
| 822 | img_spdif_in_runtime_suspend(&pdev->dev); |
| 823 | |
| 824 | return 0; |
| 825 | } |
| 826 | |
| 827 | #ifdef CONFIG_PM_SLEEP |
| 828 | static int img_spdif_in_suspend(struct device *dev) |
| 829 | { |
| 830 | struct img_spdif_in *spdif = dev_get_drvdata(dev); |
| 831 | int ret; |
| 832 | |
| 833 | if (pm_runtime_status_suspended(dev)) { |
| 834 | ret = img_spdif_in_runtime_resume(dev); |
| 835 | if (ret) |
| 836 | return ret; |
| 837 | } |
| 838 | |
| 839 | spdif->suspend_clkgen = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CLKGEN); |
| 840 | spdif->suspend_ctl = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL); |
| 841 | |
| 842 | img_spdif_in_runtime_suspend(dev); |
| 843 | |
| 844 | return 0; |
| 845 | } |
| 846 | |
| 847 | static int img_spdif_in_resume(struct device *dev) |
| 848 | { |
| 849 | struct img_spdif_in *spdif = dev_get_drvdata(dev); |
| 850 | int i, ret; |
| 851 | |
| 852 | ret = img_spdif_in_runtime_resume(dev); |
| 853 | if (ret) |
| 854 | return ret; |
| 855 | |
| 856 | for (i = 0; i < IMG_SPDIF_IN_NUM_ACLKGEN; i++) |
| 857 | img_spdif_in_aclkgen_writel(spdif, i); |
| 858 | |
| 859 | img_spdif_in_writel(spdif, spdif->suspend_clkgen, IMG_SPDIF_IN_CLKGEN); |
| 860 | img_spdif_in_writel(spdif, spdif->suspend_ctl, IMG_SPDIF_IN_CTL); |
| 861 | |
| 862 | if (pm_runtime_status_suspended(dev)) |
| 863 | img_spdif_in_runtime_suspend(dev); |
| 864 | |
| 865 | return 0; |
| 866 | } |
| 867 | #endif |
| 868 | |
| 869 | static const struct of_device_id img_spdif_in_of_match[] = { |
| 870 | { .compatible = "img,spdif-in" }, |
| 871 | {} |
| 872 | }; |
| 873 | MODULE_DEVICE_TABLE(of, img_spdif_in_of_match); |
| 874 | |
| 875 | static const struct dev_pm_ops img_spdif_in_pm_ops = { |
| 876 | SET_RUNTIME_PM_OPS(img_spdif_in_runtime_suspend, |
| 877 | img_spdif_in_runtime_resume, NULL) |
| 878 | SET_SYSTEM_SLEEP_PM_OPS(img_spdif_in_suspend, img_spdif_in_resume) |
| 879 | }; |
| 880 | |
| 881 | static struct platform_driver img_spdif_in_driver = { |
| 882 | .driver = { |
| 883 | .name = "img-spdif-in", |
| 884 | .of_match_table = img_spdif_in_of_match, |
| 885 | .pm = &img_spdif_in_pm_ops |
| 886 | }, |
| 887 | .probe = img_spdif_in_probe, |
| 888 | .remove = img_spdif_in_dev_remove |
| 889 | }; |
| 890 | module_platform_driver(img_spdif_in_driver); |
| 891 | |
| 892 | MODULE_AUTHOR("Damien Horsley <Damien.Horsley@imgtec.com>"); |
| 893 | MODULE_DESCRIPTION("IMG SPDIF Input driver"); |
| 894 | MODULE_LICENSE("GPL v2"); |