| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * linux/arch/arm/mach-sa1100/shannon.c |
| 4 | */ |
| 5 | |
| 6 | #include <linux/init.h> |
| 7 | #include <linux/device.h> |
| 8 | #include <linux/gpio/machine.h> |
| 9 | #include <linux/kernel.h> |
| 10 | #include <linux/platform_data/sa11x0-serial.h> |
| 11 | #include <linux/tty.h> |
| 12 | #include <linux/mtd/mtd.h> |
| 13 | #include <linux/mtd/partitions.h> |
| 14 | #include <linux/regulator/fixed.h> |
| 15 | #include <linux/regulator/machine.h> |
| 16 | |
| 17 | #include <video/sa1100fb.h> |
| 18 | |
| 19 | #include <mach/hardware.h> |
| 20 | #include <asm/mach-types.h> |
| 21 | #include <asm/setup.h> |
| 22 | |
| 23 | #include <asm/mach/arch.h> |
| 24 | #include <asm/mach/flash.h> |
| 25 | #include <asm/mach/map.h> |
| 26 | #include <linux/platform_data/mfd-mcp-sa11x0.h> |
| 27 | #include <mach/shannon.h> |
| 28 | #include <mach/irqs.h> |
| 29 | |
| 30 | #include "generic.h" |
| 31 | |
| 32 | static struct mtd_partition shannon_partitions[] = { |
| 33 | { |
| 34 | .name = "BLOB boot loader", |
| 35 | .offset = 0, |
| 36 | .size = 0x20000 |
| 37 | }, |
| 38 | { |
| 39 | .name = "kernel", |
| 40 | .offset = MTDPART_OFS_APPEND, |
| 41 | .size = 0xe0000 |
| 42 | }, |
| 43 | { |
| 44 | .name = "initrd", |
| 45 | .offset = MTDPART_OFS_APPEND, |
| 46 | .size = MTDPART_SIZ_FULL |
| 47 | } |
| 48 | }; |
| 49 | |
| 50 | static struct flash_platform_data shannon_flash_data = { |
| 51 | .map_name = "cfi_probe", |
| 52 | .parts = shannon_partitions, |
| 53 | .nr_parts = ARRAY_SIZE(shannon_partitions), |
| 54 | }; |
| 55 | |
| 56 | static struct resource shannon_flash_resource = |
| 57 | DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_4M); |
| 58 | |
| 59 | static struct mcp_plat_data shannon_mcp_data = { |
| 60 | .mccr0 = MCCR0_ADM, |
| 61 | .sclk_rate = 11981000, |
| 62 | }; |
| 63 | |
| 64 | static struct sa1100fb_mach_info shannon_lcd_info = { |
| 65 | .pixclock = 152500, .bpp = 8, |
| 66 | .xres = 640, .yres = 480, |
| 67 | |
| 68 | .hsync_len = 4, .vsync_len = 3, |
| 69 | .left_margin = 2, .upper_margin = 0, |
| 70 | .right_margin = 1, .lower_margin = 0, |
| 71 | |
| 72 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
| 73 | |
| 74 | .lccr0 = LCCR0_Color | LCCR0_Dual | LCCR0_Pas, |
| 75 | .lccr3 = LCCR3_ACBsDiv(512), |
| 76 | }; |
| 77 | |
| 78 | static struct gpiod_lookup_table shannon_pcmcia0_gpio_table = { |
| 79 | .dev_id = "sa11x0-pcmcia.0", |
| 80 | .table = { |
| 81 | GPIO_LOOKUP("gpio", 24, "detect", GPIO_ACTIVE_LOW), |
| 82 | GPIO_LOOKUP("gpio", 26, "ready", GPIO_ACTIVE_HIGH), |
| 83 | { }, |
| 84 | }, |
| 85 | }; |
| 86 | |
| 87 | static struct gpiod_lookup_table shannon_pcmcia1_gpio_table = { |
| 88 | .dev_id = "sa11x0-pcmcia.1", |
| 89 | .table = { |
| 90 | GPIO_LOOKUP("gpio", 25, "detect", GPIO_ACTIVE_LOW), |
| 91 | GPIO_LOOKUP("gpio", 27, "ready", GPIO_ACTIVE_HIGH), |
| 92 | { }, |
| 93 | }, |
| 94 | }; |
| 95 | |
| 96 | static struct regulator_consumer_supply shannon_cf_vcc_consumers[] = { |
| 97 | REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.0"), |
| 98 | REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.1"), |
| 99 | }; |
| 100 | |
| 101 | static struct fixed_voltage_config shannon_cf_vcc_pdata __initdata = { |
| 102 | .supply_name = "cf-power", |
| 103 | .microvolts = 3300000, |
| 104 | .enabled_at_boot = 1, |
| 105 | .gpio = -EINVAL, |
| 106 | }; |
| 107 | |
| 108 | static void __init shannon_init(void) |
| 109 | { |
| 110 | sa11x0_register_fixed_regulator(0, &shannon_cf_vcc_pdata, |
| 111 | shannon_cf_vcc_consumers, |
| 112 | ARRAY_SIZE(shannon_cf_vcc_consumers)); |
| 113 | sa11x0_register_pcmcia(0, &shannon_pcmcia0_gpio_table); |
| 114 | sa11x0_register_pcmcia(1, &shannon_pcmcia1_gpio_table); |
| 115 | sa11x0_ppc_configure_mcp(); |
| 116 | sa11x0_register_lcd(&shannon_lcd_info); |
| 117 | sa11x0_register_mtd(&shannon_flash_data, &shannon_flash_resource, 1); |
| 118 | sa11x0_register_mcp(&shannon_mcp_data); |
| 119 | } |
| 120 | |
| 121 | static void __init shannon_map_io(void) |
| 122 | { |
| 123 | sa1100_map_io(); |
| 124 | |
| 125 | sa1100_register_uart(0, 3); |
| 126 | sa1100_register_uart(1, 1); |
| 127 | |
| 128 | Ser1SDCR0 |= SDCR0_SUS; |
| 129 | GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD); |
| 130 | GPDR |= GPIO_UART_TXD | SHANNON_GPIO_CODEC_RESET; |
| 131 | GPDR &= ~GPIO_UART_RXD; |
| 132 | PPAR |= PPAR_UPR; |
| 133 | |
| 134 | /* reset the codec */ |
| 135 | GPCR = SHANNON_GPIO_CODEC_RESET; |
| 136 | GPSR = SHANNON_GPIO_CODEC_RESET; |
| 137 | } |
| 138 | |
| 139 | MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)") |
| 140 | .atag_offset = 0x100, |
| 141 | .map_io = shannon_map_io, |
| 142 | .nr_irqs = SA1100_NR_IRQS, |
| 143 | .init_irq = sa1100_init_irq, |
| 144 | .init_time = sa1100_timer_init, |
| 145 | .init_machine = shannon_init, |
| 146 | .init_late = sa11x0_init_late, |
| 147 | .restart = sa11x0_restart, |
| 148 | MACHINE_END |