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xjb04a4022021-11-25 15:01:52 +08001/*
2 * Copyright (c) 2014 MediaTek Inc.
3 * Author: James Liao <jamesjj.liao@mediatek.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14#ifndef __DRV_CLK_GATE_H
15#define __DRV_CLK_GATE_H
16#include <linux/regmap.h>
17#include <linux/clk-provider.h>
18struct clk;
19/*
20 * define pwr status information.
21 * including offsets/mask.
22 */
23struct pwr_status {
24 s32 pwr_ofs;
25 s32 pwr2_ofs;
26 s32 other_ofs;
27 u32 mask;
28 u32 val;
29};
30struct mtk_clk_gate {
31 struct clk_hw hw;
32 struct regmap *regmap;
33 int set_ofs;
34 int clr_ofs;
35 int sta_ofs;
36 u8 bit;
37 struct pwr_status *pwr_stat;
38 struct regmap *pwr_regmap;
39};
40static inline struct mtk_clk_gate *to_mtk_clk_gate(struct clk_hw *hw)
41{
42 return container_of(hw, struct mtk_clk_gate, hw);
43}
44extern const struct clk_ops mtk_clk_gate_ops_setclr;
45extern const struct clk_ops mtk_clk_gate_ops_setclr_inv;
46extern const struct clk_ops mtk_clk_gate_ops_no_setclr;
47extern const struct clk_ops mtk_clk_gate_ops_no_setclr_inv;
48struct clk *mtk_clk_register_gate(
49 const char *name,
50 const char *parent_name,
51 struct regmap *regmap,
52 int set_ofs,
53 int clr_ofs,
54 int sta_ofs,
55 u8 bit,
56 const struct clk_ops *ops,
57 unsigned long flags,
58 struct pwr_status *pwr_stat,
59 struct regmap *pwr_regmap);
60#define GATE_PWR_STAT(_pwr_ofs, _pwr2_ofs, _other_ofs, _mask, _val) { \
61 .pwr_ofs = _pwr_ofs, \
62 .pwr2_ofs = _pwr2_ofs, \
63 .other_ofs = _other_ofs, \
64 .mask = _mask, \
65 .val = _val, \
66}
67#endif /* __DRV_CLK_GATE_H */