| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * CAAM/SEC 4.x driver backend |
| 4 | * Private/internal definitions between modules |
| 5 | * |
| 6 | * Copyright 2008-2011 Freescale Semiconductor, Inc. |
| 7 | * |
| 8 | */ |
| 9 | |
| 10 | #ifndef INTERN_H |
| 11 | #define INTERN_H |
| 12 | |
| 13 | /* Currently comes from Kconfig param as a ^2 (driver-required) */ |
| 14 | #define JOBR_DEPTH (1 << CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE) |
| 15 | |
| 16 | /* Kconfig params for interrupt coalescing if selected (else zero) */ |
| 17 | #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_INTC |
| 18 | #define JOBR_INTC JRCFG_ICEN |
| 19 | #define JOBR_INTC_TIME_THLD CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD |
| 20 | #define JOBR_INTC_COUNT_THLD CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_COUNT_THLD |
| 21 | #else |
| 22 | #define JOBR_INTC 0 |
| 23 | #define JOBR_INTC_TIME_THLD 0 |
| 24 | #define JOBR_INTC_COUNT_THLD 0 |
| 25 | #endif |
| 26 | |
| 27 | /* |
| 28 | * Storage for tracking each in-process entry moving across a ring |
| 29 | * Each entry on an output ring needs one of these |
| 30 | */ |
| 31 | struct caam_jrentry_info { |
| 32 | void (*callbk)(struct device *dev, u32 *desc, u32 status, void *arg); |
| 33 | void *cbkarg; /* Argument per ring entry */ |
| 34 | u32 *desc_addr_virt; /* Stored virt addr for postprocessing */ |
| 35 | dma_addr_t desc_addr_dma; /* Stored bus addr for done matching */ |
| 36 | u32 desc_size; /* Stored size for postprocessing, header derived */ |
| 37 | }; |
| 38 | |
| 39 | /* Private sub-storage for a single JobR */ |
| 40 | struct caam_drv_private_jr { |
| 41 | struct list_head list_node; /* Job Ring device list */ |
| 42 | struct device *dev; |
| 43 | int ridx; |
| 44 | struct caam_job_ring __iomem *rregs; /* JobR's register space */ |
| 45 | struct tasklet_struct irqtask; |
| 46 | int irq; /* One per queue */ |
| 47 | |
| 48 | /* Number of scatterlist crypt transforms active on the JobR */ |
| 49 | atomic_t tfm_count ____cacheline_aligned; |
| 50 | |
| 51 | /* Job ring info */ |
| 52 | int ringsize; /* Size of rings (assume input = output) */ |
| 53 | struct caam_jrentry_info *entinfo; /* Alloc'ed 1 per ring entry */ |
| 54 | spinlock_t inplock ____cacheline_aligned; /* Input ring index lock */ |
| 55 | int inp_ring_write_index; /* Input index "tail" */ |
| 56 | int head; /* entinfo (s/w ring) head index */ |
| 57 | dma_addr_t *inpring; /* Base of input ring, alloc DMA-safe */ |
| 58 | spinlock_t outlock ____cacheline_aligned; /* Output ring index lock */ |
| 59 | int out_ring_read_index; /* Output index "tail" */ |
| 60 | int tail; /* entinfo (s/w ring) tail index */ |
| 61 | struct jr_outentry *outring; /* Base of output ring, DMA-safe */ |
| 62 | }; |
| 63 | |
| 64 | /* |
| 65 | * Driver-private storage for a single CAAM block instance |
| 66 | */ |
| 67 | struct caam_drv_private { |
| 68 | #ifdef CONFIG_CAAM_QI |
| 69 | struct device *qidev; |
| 70 | #endif |
| 71 | |
| 72 | /* Physical-presence section */ |
| 73 | struct caam_ctrl __iomem *ctrl; /* controller region */ |
| 74 | struct caam_deco __iomem *deco; /* DECO/CCB views */ |
| 75 | struct caam_assurance __iomem *assure; |
| 76 | struct caam_queue_if __iomem *qi; /* QI control region */ |
| 77 | struct caam_job_ring __iomem *jr[4]; /* JobR's register space */ |
| 78 | |
| 79 | /* |
| 80 | * Detected geometry block. Filled in from device tree if powerpc, |
| 81 | * or from register-based version detection code |
| 82 | */ |
| 83 | u8 total_jobrs; /* Total Job Rings in device */ |
| 84 | u8 qi_present; /* Nonzero if QI present in device */ |
| 85 | u8 mc_en; /* Nonzero if MC f/w is active */ |
| 86 | int secvio_irq; /* Security violation interrupt number */ |
| 87 | int virt_en; /* Virtualization enabled in CAAM */ |
| 88 | int era; /* CAAM Era (internal HW revision) */ |
| 89 | |
| 90 | #define RNG4_MAX_HANDLES 2 |
| 91 | /* RNG4 block */ |
| 92 | u32 rng4_sh_init; /* This bitmap shows which of the State |
| 93 | Handles of the RNG4 block are initialized |
| 94 | by this driver */ |
| 95 | |
| 96 | struct clk *caam_ipg; |
| 97 | struct clk *caam_mem; |
| 98 | struct clk *caam_aclk; |
| 99 | struct clk *caam_emi_slow; |
| 100 | |
| 101 | /* |
| 102 | * debugfs entries for developer view into driver/device |
| 103 | * variables at runtime. |
| 104 | */ |
| 105 | #ifdef CONFIG_DEBUG_FS |
| 106 | struct dentry *dfs_root; |
| 107 | struct dentry *ctl; /* controller dir */ |
| 108 | struct debugfs_blob_wrapper ctl_kek_wrap, ctl_tkek_wrap, ctl_tdsk_wrap; |
| 109 | struct dentry *ctl_kek, *ctl_tkek, *ctl_tdsk; |
| 110 | #endif |
| 111 | }; |
| 112 | |
| 113 | void caam_jr_algapi_init(struct device *dev); |
| 114 | void caam_jr_algapi_remove(struct device *dev); |
| 115 | |
| 116 | #ifdef CONFIG_DEBUG_FS |
| 117 | static int caam_debugfs_u64_get(void *data, u64 *val) |
| 118 | { |
| 119 | *val = caam64_to_cpu(*(u64 *)data); |
| 120 | return 0; |
| 121 | } |
| 122 | |
| 123 | static int caam_debugfs_u32_get(void *data, u64 *val) |
| 124 | { |
| 125 | *val = caam32_to_cpu(*(u32 *)data); |
| 126 | return 0; |
| 127 | } |
| 128 | |
| 129 | DEFINE_SIMPLE_ATTRIBUTE(caam_fops_u32_ro, caam_debugfs_u32_get, NULL, "%llu\n"); |
| 130 | DEFINE_SIMPLE_ATTRIBUTE(caam_fops_u64_ro, caam_debugfs_u64_get, NULL, "%llu\n"); |
| 131 | #endif |
| 132 | |
| 133 | #endif /* INTERN_H */ |