| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Copyright (C) 2017 Gateworks Corporation |
| 4 | */ |
| 5 | #ifndef _DT_BINDINGS_MEDIA_TDA1997X_H |
| 6 | #define _DT_BINDINGS_MEDIA_TDA1997X_H |
| 7 | |
| 8 | /* TDA19973 36bit Video Port control registers */ |
| 9 | #define TDA1997X_VP36_35_32 0 |
| 10 | #define TDA1997X_VP36_31_28 1 |
| 11 | #define TDA1997X_VP36_27_24 2 |
| 12 | #define TDA1997X_VP36_23_20 3 |
| 13 | #define TDA1997X_VP36_19_16 4 |
| 14 | #define TDA1997X_VP36_15_12 5 |
| 15 | #define TDA1997X_VP36_11_08 6 |
| 16 | #define TDA1997X_VP36_07_04 7 |
| 17 | #define TDA1997X_VP36_03_00 8 |
| 18 | |
| 19 | /* TDA19971 24bit Video Port control registers */ |
| 20 | #define TDA1997X_VP24_V23_20 0 |
| 21 | #define TDA1997X_VP24_V19_16 1 |
| 22 | #define TDA1997X_VP24_V15_12 3 |
| 23 | #define TDA1997X_VP24_V11_08 4 |
| 24 | #define TDA1997X_VP24_V07_04 6 |
| 25 | #define TDA1997X_VP24_V03_00 7 |
| 26 | |
| 27 | /* Pin groups */ |
| 28 | #define TDA1997X_VP_OUT_EN 0x80 /* enable output group */ |
| 29 | #define TDA1997X_VP_HIZ 0x40 /* hi-Z output group when not used */ |
| 30 | #define TDA1997X_VP_SWP 0x10 /* pin-swap output group */ |
| 31 | #define TDA1997X_R_CR_CBCR_3_0 (0 | TDA1997X_VP_OUT_EN | TDA1997X_VP_HIZ) |
| 32 | #define TDA1997X_R_CR_CBCR_7_4 (1 | TDA1997X_VP_OUT_EN | TDA1997X_VP_HIZ) |
| 33 | #define TDA1997X_R_CR_CBCR_11_8 (2 | TDA1997X_VP_OUT_EN | TDA1997X_VP_HIZ) |
| 34 | #define TDA1997X_B_CB_3_0 (3 | TDA1997X_VP_OUT_EN | TDA1997X_VP_HIZ) |
| 35 | #define TDA1997X_B_CB_7_4 (4 | TDA1997X_VP_OUT_EN | TDA1997X_VP_HIZ) |
| 36 | #define TDA1997X_B_CB_11_8 (5 | TDA1997X_VP_OUT_EN | TDA1997X_VP_HIZ) |
| 37 | #define TDA1997X_G_Y_3_0 (6 | TDA1997X_VP_OUT_EN | TDA1997X_VP_HIZ) |
| 38 | #define TDA1997X_G_Y_7_4 (7 | TDA1997X_VP_OUT_EN | TDA1997X_VP_HIZ) |
| 39 | #define TDA1997X_G_Y_11_8 (8 | TDA1997X_VP_OUT_EN | TDA1997X_VP_HIZ) |
| 40 | /* pinswapped groups */ |
| 41 | #define TDA1997X_R_CR_CBCR_3_0_S (TDA1997X_R_CR_CBCR_3_0 | TDA1997X_VP_SWAP) |
| 42 | #define TDA1997X_R_CR_CBCR_7_4_S (TDA1997X_R_CR_CBCR_7_4 | TDA1997X_VP_SWAP) |
| 43 | #define TDA1997X_R_CR_CBCR_11_8_S (TDA1997X_R_CR_CBCR_11_8 | TDA1997X_VP_SWAP) |
| 44 | #define TDA1997X_B_CB_3_0_S (TDA1997X_B_CB_3_0 | TDA1997X_VP_SWAP) |
| 45 | #define TDA1997X_B_CB_7_4_S (TDA1997X_B_CB_7_4 | TDA1997X_VP_SWAP) |
| 46 | #define TDA1997X_B_CB_11_8_S (TDA1997X_B_CB_11_8 | TDA1997X_VP_SWAP) |
| 47 | #define TDA1997X_G_Y_3_0_S (TDA1997X_G_Y_3_0 | TDA1997X_VP_SWAP) |
| 48 | #define TDA1997X_G_Y_7_4_S (TDA1997X_G_Y_7_4 | TDA1997X_VP_SWAP) |
| 49 | #define TDA1997X_G_Y_11_8_S (TDA1997X_G_Y_11_8 | TDA1997X_VP_SWAP) |
| 50 | |
| 51 | /* Audio bus DAI format */ |
| 52 | #define TDA1997X_I2S16 1 /* I2S 16bit */ |
| 53 | #define TDA1997X_I2S32 2 /* I2S 32bit */ |
| 54 | #define TDA1997X_SPDIF 3 /* SPDIF */ |
| 55 | #define TDA1997X_OBA 4 /* One Bit Audio */ |
| 56 | #define TDA1997X_DST 5 /* Direct Stream Transfer */ |
| 57 | #define TDA1997X_I2S16_HBR 6 /* HBR straight in I2S 16bit mode */ |
| 58 | #define TDA1997X_I2S16_HBR_DEMUX 7 /* HBR demux in I2S 16bit mode */ |
| 59 | #define TDA1997X_I2S32_HBR_DEMUX 8 /* HBR demux in I2S 32bit mode */ |
| 60 | #define TDA1997X_SPDIF_HBR_DEMUX 9 /* HBR demux in SPDIF mode */ |
| 61 | |
| 62 | /* Audio bus channel layout */ |
| 63 | #define TDA1997X_LAYOUT0 0 /* 2-channel */ |
| 64 | #define TDA1997X_LAYOUT1 1 /* 8-channel */ |
| 65 | |
| 66 | /* Audio bus clock */ |
| 67 | #define TDA1997X_ACLK_16FS 0 |
| 68 | #define TDA1997X_ACLK_32FS 1 |
| 69 | #define TDA1997X_ACLK_64FS 2 |
| 70 | #define TDA1997X_ACLK_128FS 3 |
| 71 | #define TDA1997X_ACLK_256FS 4 |
| 72 | #define TDA1997X_ACLK_512FS 5 |
| 73 | |
| 74 | #endif /* _DT_BINDINGS_MEDIA_TDA1997X_H */ |