blob: 34343bc10007850e502844bdeded13c2ee64a3a6 [file] [log] [blame]
xjb04a4022021-11-25 15:01:52 +08001/*
2 * Driver for the OV5645 camera sensor.
3 *
4 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
5 * Copyright (C) 2015 By Tech Design S.L. All Rights Reserved.
6 * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
7 *
8 * Based on:
9 * - the OV5645 driver from QC msm-3.10 kernel on codeaurora.org:
10 * https://us.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/
11 * media/platform/msm/camera_v2/sensor/ov5645.c?h=LA.BR.1.2.4_rb1.41
12 * - the OV5640 driver posted on linux-media:
13 * https://www.mail-archive.com/linux-media%40vger.kernel.org/msg92671.html
14 */
15
16/*
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
21
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 */
27
28#include <linux/bitops.h>
29#include <linux/clk.h>
30#include <linux/delay.h>
31#include <linux/device.h>
32#include <linux/gpio/consumer.h>
33#include <linux/i2c.h>
34#include <linux/init.h>
35#include <linux/module.h>
36#include <linux/of.h>
37#include <linux/of_graph.h>
38#include <linux/regulator/consumer.h>
39#include <linux/slab.h>
40#include <linux/types.h>
41#include <media/v4l2-ctrls.h>
42#include <media/v4l2-fwnode.h>
43#include <media/v4l2-subdev.h>
44
45#define OV5645_VOLTAGE_ANALOG 2800000
46#define OV5645_VOLTAGE_DIGITAL_CORE 1500000
47#define OV5645_VOLTAGE_DIGITAL_IO 1800000
48
49#define OV5645_SYSTEM_CTRL0 0x3008
50#define OV5645_SYSTEM_CTRL0_START 0x02
51#define OV5645_SYSTEM_CTRL0_STOP 0x42
52#define OV5645_CHIP_ID_HIGH 0x300a
53#define OV5645_CHIP_ID_HIGH_BYTE 0x56
54#define OV5645_CHIP_ID_LOW 0x300b
55#define OV5645_CHIP_ID_LOW_BYTE 0x45
56#define OV5645_IO_MIPI_CTRL00 0x300e
57#define OV5645_PAD_OUTPUT00 0x3019
58#define OV5645_AWB_MANUAL_CONTROL 0x3406
59#define OV5645_AWB_MANUAL_ENABLE BIT(0)
60#define OV5645_AEC_PK_MANUAL 0x3503
61#define OV5645_AEC_MANUAL_ENABLE BIT(0)
62#define OV5645_AGC_MANUAL_ENABLE BIT(1)
63#define OV5645_TIMING_TC_REG20 0x3820
64#define OV5645_SENSOR_VFLIP BIT(1)
65#define OV5645_ISP_VFLIP BIT(2)
66#define OV5645_TIMING_TC_REG21 0x3821
67#define OV5645_SENSOR_MIRROR BIT(1)
68#define OV5645_MIPI_CTRL00 0x4800
69#define OV5645_PRE_ISP_TEST_SETTING_1 0x503d
70#define OV5645_TEST_PATTERN_MASK 0x3
71#define OV5645_SET_TEST_PATTERN(x) ((x) & OV5645_TEST_PATTERN_MASK)
72#define OV5645_TEST_PATTERN_ENABLE BIT(7)
73#define OV5645_SDE_SAT_U 0x5583
74#define OV5645_SDE_SAT_V 0x5584
75
76struct reg_value {
77 u16 reg;
78 u8 val;
79};
80
81struct ov5645_mode_info {
82 u32 width;
83 u32 height;
84 const struct reg_value *data;
85 u32 data_size;
86 u32 pixel_clock;
87 u32 link_freq;
88};
89
90struct ov5645 {
91 struct i2c_client *i2c_client;
92 struct device *dev;
93 struct v4l2_subdev sd;
94 struct media_pad pad;
95 struct v4l2_fwnode_endpoint ep;
96 struct v4l2_mbus_framefmt fmt;
97 struct v4l2_rect crop;
98 struct clk *xclk;
99
100 struct regulator *io_regulator;
101 struct regulator *core_regulator;
102 struct regulator *analog_regulator;
103
104 const struct ov5645_mode_info *current_mode;
105
106 struct v4l2_ctrl_handler ctrls;
107 struct v4l2_ctrl *pixel_clock;
108 struct v4l2_ctrl *link_freq;
109
110 /* Cached register values */
111 u8 aec_pk_manual;
112 u8 timing_tc_reg20;
113 u8 timing_tc_reg21;
114
115 struct mutex power_lock; /* lock to protect power state */
116 int power_count;
117
118 struct gpio_desc *enable_gpio;
119 struct gpio_desc *rst_gpio;
120};
121
122static inline struct ov5645 *to_ov5645(struct v4l2_subdev *sd)
123{
124 return container_of(sd, struct ov5645, sd);
125}
126
127static const struct reg_value ov5645_global_init_setting[] = {
128 { 0x3103, 0x11 },
129 { 0x3008, 0x82 },
130 { 0x3008, 0x42 },
131 { 0x3103, 0x03 },
132 { 0x3503, 0x07 },
133 { 0x3002, 0x1c },
134 { 0x3006, 0xc3 },
135 { 0x3017, 0x00 },
136 { 0x3018, 0x00 },
137 { 0x302e, 0x0b },
138 { 0x3037, 0x13 },
139 { 0x3108, 0x01 },
140 { 0x3611, 0x06 },
141 { 0x3500, 0x00 },
142 { 0x3501, 0x01 },
143 { 0x3502, 0x00 },
144 { 0x350a, 0x00 },
145 { 0x350b, 0x3f },
146 { 0x3620, 0x33 },
147 { 0x3621, 0xe0 },
148 { 0x3622, 0x01 },
149 { 0x3630, 0x2e },
150 { 0x3631, 0x00 },
151 { 0x3632, 0x32 },
152 { 0x3633, 0x52 },
153 { 0x3634, 0x70 },
154 { 0x3635, 0x13 },
155 { 0x3636, 0x03 },
156 { 0x3703, 0x5a },
157 { 0x3704, 0xa0 },
158 { 0x3705, 0x1a },
159 { 0x3709, 0x12 },
160 { 0x370b, 0x61 },
161 { 0x370f, 0x10 },
162 { 0x3715, 0x78 },
163 { 0x3717, 0x01 },
164 { 0x371b, 0x20 },
165 { 0x3731, 0x12 },
166 { 0x3901, 0x0a },
167 { 0x3905, 0x02 },
168 { 0x3906, 0x10 },
169 { 0x3719, 0x86 },
170 { 0x3810, 0x00 },
171 { 0x3811, 0x10 },
172 { 0x3812, 0x00 },
173 { 0x3821, 0x01 },
174 { 0x3824, 0x01 },
175 { 0x3826, 0x03 },
176 { 0x3828, 0x08 },
177 { 0x3a19, 0xf8 },
178 { 0x3c01, 0x34 },
179 { 0x3c04, 0x28 },
180 { 0x3c05, 0x98 },
181 { 0x3c07, 0x07 },
182 { 0x3c09, 0xc2 },
183 { 0x3c0a, 0x9c },
184 { 0x3c0b, 0x40 },
185 { 0x3c01, 0x34 },
186 { 0x4001, 0x02 },
187 { 0x4514, 0x00 },
188 { 0x4520, 0xb0 },
189 { 0x460b, 0x37 },
190 { 0x460c, 0x20 },
191 { 0x4818, 0x01 },
192 { 0x481d, 0xf0 },
193 { 0x481f, 0x50 },
194 { 0x4823, 0x70 },
195 { 0x4831, 0x14 },
196 { 0x5000, 0xa7 },
197 { 0x5001, 0x83 },
198 { 0x501d, 0x00 },
199 { 0x501f, 0x00 },
200 { 0x503d, 0x00 },
201 { 0x505c, 0x30 },
202 { 0x5181, 0x59 },
203 { 0x5183, 0x00 },
204 { 0x5191, 0xf0 },
205 { 0x5192, 0x03 },
206 { 0x5684, 0x10 },
207 { 0x5685, 0xa0 },
208 { 0x5686, 0x0c },
209 { 0x5687, 0x78 },
210 { 0x5a00, 0x08 },
211 { 0x5a21, 0x00 },
212 { 0x5a24, 0x00 },
213 { 0x3008, 0x02 },
214 { 0x3503, 0x00 },
215 { 0x5180, 0xff },
216 { 0x5181, 0xf2 },
217 { 0x5182, 0x00 },
218 { 0x5183, 0x14 },
219 { 0x5184, 0x25 },
220 { 0x5185, 0x24 },
221 { 0x5186, 0x09 },
222 { 0x5187, 0x09 },
223 { 0x5188, 0x0a },
224 { 0x5189, 0x75 },
225 { 0x518a, 0x52 },
226 { 0x518b, 0xea },
227 { 0x518c, 0xa8 },
228 { 0x518d, 0x42 },
229 { 0x518e, 0x38 },
230 { 0x518f, 0x56 },
231 { 0x5190, 0x42 },
232 { 0x5191, 0xf8 },
233 { 0x5192, 0x04 },
234 { 0x5193, 0x70 },
235 { 0x5194, 0xf0 },
236 { 0x5195, 0xf0 },
237 { 0x5196, 0x03 },
238 { 0x5197, 0x01 },
239 { 0x5198, 0x04 },
240 { 0x5199, 0x12 },
241 { 0x519a, 0x04 },
242 { 0x519b, 0x00 },
243 { 0x519c, 0x06 },
244 { 0x519d, 0x82 },
245 { 0x519e, 0x38 },
246 { 0x5381, 0x1e },
247 { 0x5382, 0x5b },
248 { 0x5383, 0x08 },
249 { 0x5384, 0x0a },
250 { 0x5385, 0x7e },
251 { 0x5386, 0x88 },
252 { 0x5387, 0x7c },
253 { 0x5388, 0x6c },
254 { 0x5389, 0x10 },
255 { 0x538a, 0x01 },
256 { 0x538b, 0x98 },
257 { 0x5300, 0x08 },
258 { 0x5301, 0x30 },
259 { 0x5302, 0x10 },
260 { 0x5303, 0x00 },
261 { 0x5304, 0x08 },
262 { 0x5305, 0x30 },
263 { 0x5306, 0x08 },
264 { 0x5307, 0x16 },
265 { 0x5309, 0x08 },
266 { 0x530a, 0x30 },
267 { 0x530b, 0x04 },
268 { 0x530c, 0x06 },
269 { 0x5480, 0x01 },
270 { 0x5481, 0x08 },
271 { 0x5482, 0x14 },
272 { 0x5483, 0x28 },
273 { 0x5484, 0x51 },
274 { 0x5485, 0x65 },
275 { 0x5486, 0x71 },
276 { 0x5487, 0x7d },
277 { 0x5488, 0x87 },
278 { 0x5489, 0x91 },
279 { 0x548a, 0x9a },
280 { 0x548b, 0xaa },
281 { 0x548c, 0xb8 },
282 { 0x548d, 0xcd },
283 { 0x548e, 0xdd },
284 { 0x548f, 0xea },
285 { 0x5490, 0x1d },
286 { 0x5580, 0x02 },
287 { 0x5583, 0x40 },
288 { 0x5584, 0x10 },
289 { 0x5589, 0x10 },
290 { 0x558a, 0x00 },
291 { 0x558b, 0xf8 },
292 { 0x5800, 0x3f },
293 { 0x5801, 0x16 },
294 { 0x5802, 0x0e },
295 { 0x5803, 0x0d },
296 { 0x5804, 0x17 },
297 { 0x5805, 0x3f },
298 { 0x5806, 0x0b },
299 { 0x5807, 0x06 },
300 { 0x5808, 0x04 },
301 { 0x5809, 0x04 },
302 { 0x580a, 0x06 },
303 { 0x580b, 0x0b },
304 { 0x580c, 0x09 },
305 { 0x580d, 0x03 },
306 { 0x580e, 0x00 },
307 { 0x580f, 0x00 },
308 { 0x5810, 0x03 },
309 { 0x5811, 0x08 },
310 { 0x5812, 0x0a },
311 { 0x5813, 0x03 },
312 { 0x5814, 0x00 },
313 { 0x5815, 0x00 },
314 { 0x5816, 0x04 },
315 { 0x5817, 0x09 },
316 { 0x5818, 0x0f },
317 { 0x5819, 0x08 },
318 { 0x581a, 0x06 },
319 { 0x581b, 0x06 },
320 { 0x581c, 0x08 },
321 { 0x581d, 0x0c },
322 { 0x581e, 0x3f },
323 { 0x581f, 0x1e },
324 { 0x5820, 0x12 },
325 { 0x5821, 0x13 },
326 { 0x5822, 0x21 },
327 { 0x5823, 0x3f },
328 { 0x5824, 0x68 },
329 { 0x5825, 0x28 },
330 { 0x5826, 0x2c },
331 { 0x5827, 0x28 },
332 { 0x5828, 0x08 },
333 { 0x5829, 0x48 },
334 { 0x582a, 0x64 },
335 { 0x582b, 0x62 },
336 { 0x582c, 0x64 },
337 { 0x582d, 0x28 },
338 { 0x582e, 0x46 },
339 { 0x582f, 0x62 },
340 { 0x5830, 0x60 },
341 { 0x5831, 0x62 },
342 { 0x5832, 0x26 },
343 { 0x5833, 0x48 },
344 { 0x5834, 0x66 },
345 { 0x5835, 0x44 },
346 { 0x5836, 0x64 },
347 { 0x5837, 0x28 },
348 { 0x5838, 0x66 },
349 { 0x5839, 0x48 },
350 { 0x583a, 0x2c },
351 { 0x583b, 0x28 },
352 { 0x583c, 0x26 },
353 { 0x583d, 0xae },
354 { 0x5025, 0x00 },
355 { 0x3a0f, 0x30 },
356 { 0x3a10, 0x28 },
357 { 0x3a1b, 0x30 },
358 { 0x3a1e, 0x26 },
359 { 0x3a11, 0x60 },
360 { 0x3a1f, 0x14 },
361 { 0x0601, 0x02 },
362 { 0x3008, 0x42 },
363 { 0x3008, 0x02 },
364 { OV5645_IO_MIPI_CTRL00, 0x40 },
365 { OV5645_MIPI_CTRL00, 0x24 },
366 { OV5645_PAD_OUTPUT00, 0x70 }
367};
368
369static const struct reg_value ov5645_setting_sxga[] = {
370 { 0x3612, 0xa9 },
371 { 0x3614, 0x50 },
372 { 0x3618, 0x00 },
373 { 0x3034, 0x18 },
374 { 0x3035, 0x21 },
375 { 0x3036, 0x70 },
376 { 0x3600, 0x09 },
377 { 0x3601, 0x43 },
378 { 0x3708, 0x66 },
379 { 0x370c, 0xc3 },
380 { 0x3800, 0x00 },
381 { 0x3801, 0x00 },
382 { 0x3802, 0x00 },
383 { 0x3803, 0x06 },
384 { 0x3804, 0x0a },
385 { 0x3805, 0x3f },
386 { 0x3806, 0x07 },
387 { 0x3807, 0x9d },
388 { 0x3808, 0x05 },
389 { 0x3809, 0x00 },
390 { 0x380a, 0x03 },
391 { 0x380b, 0xc0 },
392 { 0x380c, 0x07 },
393 { 0x380d, 0x68 },
394 { 0x380e, 0x03 },
395 { 0x380f, 0xd8 },
396 { 0x3813, 0x06 },
397 { 0x3814, 0x31 },
398 { 0x3815, 0x31 },
399 { 0x3820, 0x47 },
400 { 0x3a02, 0x03 },
401 { 0x3a03, 0xd8 },
402 { 0x3a08, 0x01 },
403 { 0x3a09, 0xf8 },
404 { 0x3a0a, 0x01 },
405 { 0x3a0b, 0xa4 },
406 { 0x3a0e, 0x02 },
407 { 0x3a0d, 0x02 },
408 { 0x3a14, 0x03 },
409 { 0x3a15, 0xd8 },
410 { 0x3a18, 0x00 },
411 { 0x4004, 0x02 },
412 { 0x4005, 0x18 },
413 { 0x4300, 0x32 },
414 { 0x4202, 0x00 }
415};
416
417static const struct reg_value ov5645_setting_1080p[] = {
418 { 0x3612, 0xab },
419 { 0x3614, 0x50 },
420 { 0x3618, 0x04 },
421 { 0x3034, 0x18 },
422 { 0x3035, 0x11 },
423 { 0x3036, 0x54 },
424 { 0x3600, 0x08 },
425 { 0x3601, 0x33 },
426 { 0x3708, 0x63 },
427 { 0x370c, 0xc0 },
428 { 0x3800, 0x01 },
429 { 0x3801, 0x50 },
430 { 0x3802, 0x01 },
431 { 0x3803, 0xb2 },
432 { 0x3804, 0x08 },
433 { 0x3805, 0xef },
434 { 0x3806, 0x05 },
435 { 0x3807, 0xf1 },
436 { 0x3808, 0x07 },
437 { 0x3809, 0x80 },
438 { 0x380a, 0x04 },
439 { 0x380b, 0x38 },
440 { 0x380c, 0x09 },
441 { 0x380d, 0xc4 },
442 { 0x380e, 0x04 },
443 { 0x380f, 0x60 },
444 { 0x3813, 0x04 },
445 { 0x3814, 0x11 },
446 { 0x3815, 0x11 },
447 { 0x3820, 0x47 },
448 { 0x4514, 0x88 },
449 { 0x3a02, 0x04 },
450 { 0x3a03, 0x60 },
451 { 0x3a08, 0x01 },
452 { 0x3a09, 0x50 },
453 { 0x3a0a, 0x01 },
454 { 0x3a0b, 0x18 },
455 { 0x3a0e, 0x03 },
456 { 0x3a0d, 0x04 },
457 { 0x3a14, 0x04 },
458 { 0x3a15, 0x60 },
459 { 0x3a18, 0x00 },
460 { 0x4004, 0x06 },
461 { 0x4005, 0x18 },
462 { 0x4300, 0x32 },
463 { 0x4202, 0x00 },
464 { 0x4837, 0x0b }
465};
466
467static const struct reg_value ov5645_setting_full[] = {
468 { 0x3612, 0xab },
469 { 0x3614, 0x50 },
470 { 0x3618, 0x04 },
471 { 0x3034, 0x18 },
472 { 0x3035, 0x11 },
473 { 0x3036, 0x54 },
474 { 0x3600, 0x08 },
475 { 0x3601, 0x33 },
476 { 0x3708, 0x63 },
477 { 0x370c, 0xc0 },
478 { 0x3800, 0x00 },
479 { 0x3801, 0x00 },
480 { 0x3802, 0x00 },
481 { 0x3803, 0x00 },
482 { 0x3804, 0x0a },
483 { 0x3805, 0x3f },
484 { 0x3806, 0x07 },
485 { 0x3807, 0x9f },
486 { 0x3808, 0x0a },
487 { 0x3809, 0x20 },
488 { 0x380a, 0x07 },
489 { 0x380b, 0x98 },
490 { 0x380c, 0x0b },
491 { 0x380d, 0x1c },
492 { 0x380e, 0x07 },
493 { 0x380f, 0xb0 },
494 { 0x3813, 0x06 },
495 { 0x3814, 0x11 },
496 { 0x3815, 0x11 },
497 { 0x3820, 0x47 },
498 { 0x4514, 0x88 },
499 { 0x3a02, 0x07 },
500 { 0x3a03, 0xb0 },
501 { 0x3a08, 0x01 },
502 { 0x3a09, 0x27 },
503 { 0x3a0a, 0x00 },
504 { 0x3a0b, 0xf6 },
505 { 0x3a0e, 0x06 },
506 { 0x3a0d, 0x08 },
507 { 0x3a14, 0x07 },
508 { 0x3a15, 0xb0 },
509 { 0x3a18, 0x01 },
510 { 0x4004, 0x06 },
511 { 0x4005, 0x18 },
512 { 0x4300, 0x32 },
513 { 0x4837, 0x0b },
514 { 0x4202, 0x00 }
515};
516
517static const s64 link_freq[] = {
518 224000000,
519 336000000
520};
521
522static const struct ov5645_mode_info ov5645_mode_info_data[] = {
523 {
524 .width = 1280,
525 .height = 960,
526 .data = ov5645_setting_sxga,
527 .data_size = ARRAY_SIZE(ov5645_setting_sxga),
528 .pixel_clock = 112000000,
529 .link_freq = 0 /* an index in link_freq[] */
530 },
531 {
532 .width = 1920,
533 .height = 1080,
534 .data = ov5645_setting_1080p,
535 .data_size = ARRAY_SIZE(ov5645_setting_1080p),
536 .pixel_clock = 168000000,
537 .link_freq = 1 /* an index in link_freq[] */
538 },
539 {
540 .width = 2592,
541 .height = 1944,
542 .data = ov5645_setting_full,
543 .data_size = ARRAY_SIZE(ov5645_setting_full),
544 .pixel_clock = 168000000,
545 .link_freq = 1 /* an index in link_freq[] */
546 },
547};
548
549static int ov5645_regulators_enable(struct ov5645 *ov5645)
550{
551 int ret;
552
553 ret = regulator_enable(ov5645->io_regulator);
554 if (ret < 0) {
555 dev_err(ov5645->dev, "set io voltage failed\n");
556 return ret;
557 }
558
559 ret = regulator_enable(ov5645->analog_regulator);
560 if (ret) {
561 dev_err(ov5645->dev, "set analog voltage failed\n");
562 goto err_disable_io;
563 }
564
565 ret = regulator_enable(ov5645->core_regulator);
566 if (ret) {
567 dev_err(ov5645->dev, "set core voltage failed\n");
568 goto err_disable_analog;
569 }
570
571 return 0;
572
573err_disable_analog:
574 regulator_disable(ov5645->analog_regulator);
575err_disable_io:
576 regulator_disable(ov5645->io_regulator);
577
578 return ret;
579}
580
581static void ov5645_regulators_disable(struct ov5645 *ov5645)
582{
583 int ret;
584
585 ret = regulator_disable(ov5645->core_regulator);
586 if (ret < 0)
587 dev_err(ov5645->dev, "core regulator disable failed\n");
588
589 ret = regulator_disable(ov5645->analog_regulator);
590 if (ret < 0)
591 dev_err(ov5645->dev, "analog regulator disable failed\n");
592
593 ret = regulator_disable(ov5645->io_regulator);
594 if (ret < 0)
595 dev_err(ov5645->dev, "io regulator disable failed\n");
596}
597
598static int ov5645_write_reg(struct ov5645 *ov5645, u16 reg, u8 val)
599{
600 u8 regbuf[3];
601 int ret;
602
603 regbuf[0] = reg >> 8;
604 regbuf[1] = reg & 0xff;
605 regbuf[2] = val;
606
607 ret = i2c_master_send(ov5645->i2c_client, regbuf, 3);
608 if (ret < 0) {
609 dev_err(ov5645->dev, "%s: write reg error %d: reg=%x, val=%x\n",
610 __func__, ret, reg, val);
611 return ret;
612 }
613
614 return 0;
615}
616
617static int ov5645_read_reg(struct ov5645 *ov5645, u16 reg, u8 *val)
618{
619 u8 regbuf[2];
620 int ret;
621
622 regbuf[0] = reg >> 8;
623 regbuf[1] = reg & 0xff;
624
625 ret = i2c_master_send(ov5645->i2c_client, regbuf, 2);
626 if (ret < 0) {
627 dev_err(ov5645->dev, "%s: write reg error %d: reg=%x\n",
628 __func__, ret, reg);
629 return ret;
630 }
631
632 ret = i2c_master_recv(ov5645->i2c_client, val, 1);
633 if (ret < 0) {
634 dev_err(ov5645->dev, "%s: read reg error %d: reg=%x\n",
635 __func__, ret, reg);
636 return ret;
637 }
638
639 return 0;
640}
641
642static int ov5645_set_aec_mode(struct ov5645 *ov5645, u32 mode)
643{
644 u8 val = ov5645->aec_pk_manual;
645 int ret;
646
647 if (mode == V4L2_EXPOSURE_AUTO)
648 val &= ~OV5645_AEC_MANUAL_ENABLE;
649 else /* V4L2_EXPOSURE_MANUAL */
650 val |= OV5645_AEC_MANUAL_ENABLE;
651
652 ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
653 if (!ret)
654 ov5645->aec_pk_manual = val;
655
656 return ret;
657}
658
659static int ov5645_set_agc_mode(struct ov5645 *ov5645, u32 enable)
660{
661 u8 val = ov5645->aec_pk_manual;
662 int ret;
663
664 if (enable)
665 val &= ~OV5645_AGC_MANUAL_ENABLE;
666 else
667 val |= OV5645_AGC_MANUAL_ENABLE;
668
669 ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
670 if (!ret)
671 ov5645->aec_pk_manual = val;
672
673 return ret;
674}
675
676static int ov5645_set_register_array(struct ov5645 *ov5645,
677 const struct reg_value *settings,
678 unsigned int num_settings)
679{
680 unsigned int i;
681 int ret;
682
683 for (i = 0; i < num_settings; ++i, ++settings) {
684 ret = ov5645_write_reg(ov5645, settings->reg, settings->val);
685 if (ret < 0)
686 return ret;
687 }
688
689 return 0;
690}
691
692static int ov5645_set_power_on(struct ov5645 *ov5645)
693{
694 int ret;
695
696 ret = ov5645_regulators_enable(ov5645);
697 if (ret < 0) {
698 return ret;
699 }
700
701 ret = clk_prepare_enable(ov5645->xclk);
702 if (ret < 0) {
703 dev_err(ov5645->dev, "clk prepare enable failed\n");
704 ov5645_regulators_disable(ov5645);
705 return ret;
706 }
707
708 usleep_range(5000, 15000);
709 gpiod_set_value_cansleep(ov5645->enable_gpio, 1);
710
711 usleep_range(1000, 2000);
712 gpiod_set_value_cansleep(ov5645->rst_gpio, 0);
713
714 msleep(20);
715
716 return 0;
717}
718
719static void ov5645_set_power_off(struct ov5645 *ov5645)
720{
721 gpiod_set_value_cansleep(ov5645->rst_gpio, 1);
722 gpiod_set_value_cansleep(ov5645->enable_gpio, 0);
723 clk_disable_unprepare(ov5645->xclk);
724 ov5645_regulators_disable(ov5645);
725}
726
727static int ov5645_s_power(struct v4l2_subdev *sd, int on)
728{
729 struct ov5645 *ov5645 = to_ov5645(sd);
730 int ret = 0;
731
732 mutex_lock(&ov5645->power_lock);
733
734 /* If the power count is modified from 0 to != 0 or from != 0 to 0,
735 * update the power state.
736 */
737 if (ov5645->power_count == !on) {
738 if (on) {
739 ret = ov5645_set_power_on(ov5645);
740 if (ret < 0)
741 goto exit;
742
743 ret = ov5645_set_register_array(ov5645,
744 ov5645_global_init_setting,
745 ARRAY_SIZE(ov5645_global_init_setting));
746 if (ret < 0) {
747 dev_err(ov5645->dev,
748 "could not set init registers\n");
749 ov5645_set_power_off(ov5645);
750 goto exit;
751 }
752
753 usleep_range(500, 1000);
754 } else {
755 ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x58);
756 ov5645_set_power_off(ov5645);
757 }
758 }
759
760 /* Update the power count. */
761 ov5645->power_count += on ? 1 : -1;
762 WARN_ON(ov5645->power_count < 0);
763
764exit:
765 mutex_unlock(&ov5645->power_lock);
766
767 return ret;
768}
769
770static int ov5645_set_saturation(struct ov5645 *ov5645, s32 value)
771{
772 u32 reg_value = (value * 0x10) + 0x40;
773 int ret;
774
775 ret = ov5645_write_reg(ov5645, OV5645_SDE_SAT_U, reg_value);
776 if (ret < 0)
777 return ret;
778
779 return ov5645_write_reg(ov5645, OV5645_SDE_SAT_V, reg_value);
780}
781
782static int ov5645_set_hflip(struct ov5645 *ov5645, s32 value)
783{
784 u8 val = ov5645->timing_tc_reg21;
785 int ret;
786
787 if (value == 0)
788 val &= ~(OV5645_SENSOR_MIRROR);
789 else
790 val |= (OV5645_SENSOR_MIRROR);
791
792 ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG21, val);
793 if (!ret)
794 ov5645->timing_tc_reg21 = val;
795
796 return ret;
797}
798
799static int ov5645_set_vflip(struct ov5645 *ov5645, s32 value)
800{
801 u8 val = ov5645->timing_tc_reg20;
802 int ret;
803
804 if (value == 0)
805 val |= (OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
806 else
807 val &= ~(OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
808
809 ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG20, val);
810 if (!ret)
811 ov5645->timing_tc_reg20 = val;
812
813 return ret;
814}
815
816static int ov5645_set_test_pattern(struct ov5645 *ov5645, s32 value)
817{
818 u8 val = 0;
819
820 if (value) {
821 val = OV5645_SET_TEST_PATTERN(value - 1);
822 val |= OV5645_TEST_PATTERN_ENABLE;
823 }
824
825 return ov5645_write_reg(ov5645, OV5645_PRE_ISP_TEST_SETTING_1, val);
826}
827
828static const char * const ov5645_test_pattern_menu[] = {
829 "Disabled",
830 "Vertical Color Bars",
831 "Pseudo-Random Data",
832 "Color Square",
833 "Black Image",
834};
835
836static int ov5645_set_awb(struct ov5645 *ov5645, s32 enable_auto)
837{
838 u8 val = 0;
839
840 if (!enable_auto)
841 val = OV5645_AWB_MANUAL_ENABLE;
842
843 return ov5645_write_reg(ov5645, OV5645_AWB_MANUAL_CONTROL, val);
844}
845
846static int ov5645_s_ctrl(struct v4l2_ctrl *ctrl)
847{
848 struct ov5645 *ov5645 = container_of(ctrl->handler,
849 struct ov5645, ctrls);
850 int ret;
851
852 mutex_lock(&ov5645->power_lock);
853 if (!ov5645->power_count) {
854 mutex_unlock(&ov5645->power_lock);
855 return 0;
856 }
857
858 switch (ctrl->id) {
859 case V4L2_CID_SATURATION:
860 ret = ov5645_set_saturation(ov5645, ctrl->val);
861 break;
862 case V4L2_CID_AUTO_WHITE_BALANCE:
863 ret = ov5645_set_awb(ov5645, ctrl->val);
864 break;
865 case V4L2_CID_AUTOGAIN:
866 ret = ov5645_set_agc_mode(ov5645, ctrl->val);
867 break;
868 case V4L2_CID_EXPOSURE_AUTO:
869 ret = ov5645_set_aec_mode(ov5645, ctrl->val);
870 break;
871 case V4L2_CID_TEST_PATTERN:
872 ret = ov5645_set_test_pattern(ov5645, ctrl->val);
873 break;
874 case V4L2_CID_HFLIP:
875 ret = ov5645_set_hflip(ov5645, ctrl->val);
876 break;
877 case V4L2_CID_VFLIP:
878 ret = ov5645_set_vflip(ov5645, ctrl->val);
879 break;
880 default:
881 ret = -EINVAL;
882 break;
883 }
884
885 mutex_unlock(&ov5645->power_lock);
886
887 return ret;
888}
889
890static struct v4l2_ctrl_ops ov5645_ctrl_ops = {
891 .s_ctrl = ov5645_s_ctrl,
892};
893
894static int ov5645_enum_mbus_code(struct v4l2_subdev *sd,
895 struct v4l2_subdev_pad_config *cfg,
896 struct v4l2_subdev_mbus_code_enum *code)
897{
898 if (code->index > 0)
899 return -EINVAL;
900
901 code->code = MEDIA_BUS_FMT_UYVY8_2X8;
902
903 return 0;
904}
905
906static int ov5645_enum_frame_size(struct v4l2_subdev *subdev,
907 struct v4l2_subdev_pad_config *cfg,
908 struct v4l2_subdev_frame_size_enum *fse)
909{
910 if (fse->code != MEDIA_BUS_FMT_UYVY8_2X8)
911 return -EINVAL;
912
913 if (fse->index >= ARRAY_SIZE(ov5645_mode_info_data))
914 return -EINVAL;
915
916 fse->min_width = ov5645_mode_info_data[fse->index].width;
917 fse->max_width = ov5645_mode_info_data[fse->index].width;
918 fse->min_height = ov5645_mode_info_data[fse->index].height;
919 fse->max_height = ov5645_mode_info_data[fse->index].height;
920
921 return 0;
922}
923
924static struct v4l2_mbus_framefmt *
925__ov5645_get_pad_format(struct ov5645 *ov5645,
926 struct v4l2_subdev_pad_config *cfg,
927 unsigned int pad,
928 enum v4l2_subdev_format_whence which)
929{
930 switch (which) {
931 case V4L2_SUBDEV_FORMAT_TRY:
932 return v4l2_subdev_get_try_format(&ov5645->sd, cfg, pad);
933 case V4L2_SUBDEV_FORMAT_ACTIVE:
934 return &ov5645->fmt;
935 default:
936 return NULL;
937 }
938}
939
940static int ov5645_get_format(struct v4l2_subdev *sd,
941 struct v4l2_subdev_pad_config *cfg,
942 struct v4l2_subdev_format *format)
943{
944 struct ov5645 *ov5645 = to_ov5645(sd);
945
946 format->format = *__ov5645_get_pad_format(ov5645, cfg, format->pad,
947 format->which);
948 return 0;
949}
950
951static struct v4l2_rect *
952__ov5645_get_pad_crop(struct ov5645 *ov5645, struct v4l2_subdev_pad_config *cfg,
953 unsigned int pad, enum v4l2_subdev_format_whence which)
954{
955 switch (which) {
956 case V4L2_SUBDEV_FORMAT_TRY:
957 return v4l2_subdev_get_try_crop(&ov5645->sd, cfg, pad);
958 case V4L2_SUBDEV_FORMAT_ACTIVE:
959 return &ov5645->crop;
960 default:
961 return NULL;
962 }
963}
964
965static int ov5645_set_format(struct v4l2_subdev *sd,
966 struct v4l2_subdev_pad_config *cfg,
967 struct v4l2_subdev_format *format)
968{
969 struct ov5645 *ov5645 = to_ov5645(sd);
970 struct v4l2_mbus_framefmt *__format;
971 struct v4l2_rect *__crop;
972 const struct ov5645_mode_info *new_mode;
973 int ret;
974
975 __crop = __ov5645_get_pad_crop(ov5645, cfg, format->pad,
976 format->which);
977
978 new_mode = v4l2_find_nearest_size(ov5645_mode_info_data,
979 ARRAY_SIZE(ov5645_mode_info_data),
980 width, height,
981 format->format.width, format->format.height);
982
983 __crop->width = new_mode->width;
984 __crop->height = new_mode->height;
985
986 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
987 ret = v4l2_ctrl_s_ctrl_int64(ov5645->pixel_clock,
988 new_mode->pixel_clock);
989 if (ret < 0)
990 return ret;
991
992 ret = v4l2_ctrl_s_ctrl(ov5645->link_freq,
993 new_mode->link_freq);
994 if (ret < 0)
995 return ret;
996
997 ov5645->current_mode = new_mode;
998 }
999
1000 __format = __ov5645_get_pad_format(ov5645, cfg, format->pad,
1001 format->which);
1002 __format->width = __crop->width;
1003 __format->height = __crop->height;
1004 __format->code = MEDIA_BUS_FMT_UYVY8_2X8;
1005 __format->field = V4L2_FIELD_NONE;
1006 __format->colorspace = V4L2_COLORSPACE_SRGB;
1007
1008 format->format = *__format;
1009
1010 return 0;
1011}
1012
1013static int ov5645_entity_init_cfg(struct v4l2_subdev *subdev,
1014 struct v4l2_subdev_pad_config *cfg)
1015{
1016 struct v4l2_subdev_format fmt = { 0 };
1017
1018 fmt.which = cfg ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
1019 fmt.format.width = 1920;
1020 fmt.format.height = 1080;
1021
1022 ov5645_set_format(subdev, cfg, &fmt);
1023
1024 return 0;
1025}
1026
1027static int ov5645_get_selection(struct v4l2_subdev *sd,
1028 struct v4l2_subdev_pad_config *cfg,
1029 struct v4l2_subdev_selection *sel)
1030{
1031 struct ov5645 *ov5645 = to_ov5645(sd);
1032
1033 if (sel->target != V4L2_SEL_TGT_CROP)
1034 return -EINVAL;
1035
1036 sel->r = *__ov5645_get_pad_crop(ov5645, cfg, sel->pad,
1037 sel->which);
1038 return 0;
1039}
1040
1041static int ov5645_s_stream(struct v4l2_subdev *subdev, int enable)
1042{
1043 struct ov5645 *ov5645 = to_ov5645(subdev);
1044 int ret;
1045
1046 if (enable) {
1047 ret = ov5645_set_register_array(ov5645,
1048 ov5645->current_mode->data,
1049 ov5645->current_mode->data_size);
1050 if (ret < 0) {
1051 dev_err(ov5645->dev, "could not set mode %dx%d\n",
1052 ov5645->current_mode->width,
1053 ov5645->current_mode->height);
1054 return ret;
1055 }
1056 ret = v4l2_ctrl_handler_setup(&ov5645->ctrls);
1057 if (ret < 0) {
1058 dev_err(ov5645->dev, "could not sync v4l2 controls\n");
1059 return ret;
1060 }
1061
1062 ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x45);
1063 if (ret < 0)
1064 return ret;
1065
1066 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
1067 OV5645_SYSTEM_CTRL0_START);
1068 if (ret < 0)
1069 return ret;
1070 } else {
1071 ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x40);
1072 if (ret < 0)
1073 return ret;
1074
1075 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
1076 OV5645_SYSTEM_CTRL0_STOP);
1077 if (ret < 0)
1078 return ret;
1079 }
1080
1081 return 0;
1082}
1083
1084static const struct v4l2_subdev_core_ops ov5645_core_ops = {
1085 .s_power = ov5645_s_power,
1086};
1087
1088static const struct v4l2_subdev_video_ops ov5645_video_ops = {
1089 .s_stream = ov5645_s_stream,
1090};
1091
1092static const struct v4l2_subdev_pad_ops ov5645_subdev_pad_ops = {
1093 .init_cfg = ov5645_entity_init_cfg,
1094 .enum_mbus_code = ov5645_enum_mbus_code,
1095 .enum_frame_size = ov5645_enum_frame_size,
1096 .get_fmt = ov5645_get_format,
1097 .set_fmt = ov5645_set_format,
1098 .get_selection = ov5645_get_selection,
1099};
1100
1101static const struct v4l2_subdev_ops ov5645_subdev_ops = {
1102 .core = &ov5645_core_ops,
1103 .video = &ov5645_video_ops,
1104 .pad = &ov5645_subdev_pad_ops,
1105};
1106
1107static int ov5645_probe(struct i2c_client *client,
1108 const struct i2c_device_id *id)
1109{
1110 struct device *dev = &client->dev;
1111 struct device_node *endpoint;
1112 struct ov5645 *ov5645;
1113 u8 chip_id_high, chip_id_low;
1114 u32 xclk_freq;
1115 int ret;
1116
1117 ov5645 = devm_kzalloc(dev, sizeof(struct ov5645), GFP_KERNEL);
1118 if (!ov5645)
1119 return -ENOMEM;
1120
1121 ov5645->i2c_client = client;
1122 ov5645->dev = dev;
1123
1124 endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
1125 if (!endpoint) {
1126 dev_err(dev, "endpoint node not found\n");
1127 return -EINVAL;
1128 }
1129
1130 ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint),
1131 &ov5645->ep);
1132
1133 of_node_put(endpoint);
1134
1135 if (ret < 0) {
1136 dev_err(dev, "parsing endpoint node failed\n");
1137 return ret;
1138 }
1139
1140 if (ov5645->ep.bus_type != V4L2_MBUS_CSI2) {
1141 dev_err(dev, "invalid bus type, must be CSI2\n");
1142 return -EINVAL;
1143 }
1144
1145 /* get system clock (xclk) */
1146 ov5645->xclk = devm_clk_get(dev, "xclk");
1147 if (IS_ERR(ov5645->xclk)) {
1148 dev_err(dev, "could not get xclk");
1149 return PTR_ERR(ov5645->xclk);
1150 }
1151
1152 ret = of_property_read_u32(dev->of_node, "clock-frequency", &xclk_freq);
1153 if (ret) {
1154 dev_err(dev, "could not get xclk frequency\n");
1155 return ret;
1156 }
1157
1158 /* external clock must be 24MHz, allow 1% tolerance */
1159 if (xclk_freq < 23760000 || xclk_freq > 24240000) {
1160 dev_err(dev, "external clock frequency %u is not supported\n",
1161 xclk_freq);
1162 return -EINVAL;
1163 }
1164
1165 ret = clk_set_rate(ov5645->xclk, xclk_freq);
1166 if (ret) {
1167 dev_err(dev, "could not set xclk frequency\n");
1168 return ret;
1169 }
1170
1171 ov5645->io_regulator = devm_regulator_get(dev, "vdddo");
1172 if (IS_ERR(ov5645->io_regulator)) {
1173 dev_err(dev, "cannot get io regulator\n");
1174 return PTR_ERR(ov5645->io_regulator);
1175 }
1176
1177 ret = regulator_set_voltage(ov5645->io_regulator,
1178 OV5645_VOLTAGE_DIGITAL_IO,
1179 OV5645_VOLTAGE_DIGITAL_IO);
1180 if (ret < 0) {
1181 dev_err(dev, "cannot set io voltage\n");
1182 return ret;
1183 }
1184
1185 ov5645->core_regulator = devm_regulator_get(dev, "vddd");
1186 if (IS_ERR(ov5645->core_regulator)) {
1187 dev_err(dev, "cannot get core regulator\n");
1188 return PTR_ERR(ov5645->core_regulator);
1189 }
1190
1191 ret = regulator_set_voltage(ov5645->core_regulator,
1192 OV5645_VOLTAGE_DIGITAL_CORE,
1193 OV5645_VOLTAGE_DIGITAL_CORE);
1194 if (ret < 0) {
1195 dev_err(dev, "cannot set core voltage\n");
1196 return ret;
1197 }
1198
1199 ov5645->analog_regulator = devm_regulator_get(dev, "vdda");
1200 if (IS_ERR(ov5645->analog_regulator)) {
1201 dev_err(dev, "cannot get analog regulator\n");
1202 return PTR_ERR(ov5645->analog_regulator);
1203 }
1204
1205 ret = regulator_set_voltage(ov5645->analog_regulator,
1206 OV5645_VOLTAGE_ANALOG,
1207 OV5645_VOLTAGE_ANALOG);
1208 if (ret < 0) {
1209 dev_err(dev, "cannot set analog voltage\n");
1210 return ret;
1211 }
1212
1213 ov5645->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_HIGH);
1214 if (IS_ERR(ov5645->enable_gpio)) {
1215 dev_err(dev, "cannot get enable gpio\n");
1216 return PTR_ERR(ov5645->enable_gpio);
1217 }
1218
1219 ov5645->rst_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
1220 if (IS_ERR(ov5645->rst_gpio)) {
1221 dev_err(dev, "cannot get reset gpio\n");
1222 return PTR_ERR(ov5645->rst_gpio);
1223 }
1224
1225 mutex_init(&ov5645->power_lock);
1226
1227 v4l2_ctrl_handler_init(&ov5645->ctrls, 9);
1228 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1229 V4L2_CID_SATURATION, -4, 4, 1, 0);
1230 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1231 V4L2_CID_HFLIP, 0, 1, 1, 0);
1232 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1233 V4L2_CID_VFLIP, 0, 1, 1, 0);
1234 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1235 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
1236 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1237 V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
1238 v4l2_ctrl_new_std_menu(&ov5645->ctrls, &ov5645_ctrl_ops,
1239 V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL,
1240 0, V4L2_EXPOSURE_AUTO);
1241 v4l2_ctrl_new_std_menu_items(&ov5645->ctrls, &ov5645_ctrl_ops,
1242 V4L2_CID_TEST_PATTERN,
1243 ARRAY_SIZE(ov5645_test_pattern_menu) - 1,
1244 0, 0, ov5645_test_pattern_menu);
1245 ov5645->pixel_clock = v4l2_ctrl_new_std(&ov5645->ctrls,
1246 &ov5645_ctrl_ops,
1247 V4L2_CID_PIXEL_RATE,
1248 1, INT_MAX, 1, 1);
1249 ov5645->link_freq = v4l2_ctrl_new_int_menu(&ov5645->ctrls,
1250 &ov5645_ctrl_ops,
1251 V4L2_CID_LINK_FREQ,
1252 ARRAY_SIZE(link_freq) - 1,
1253 0, link_freq);
1254 if (ov5645->link_freq)
1255 ov5645->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1256
1257 ov5645->sd.ctrl_handler = &ov5645->ctrls;
1258
1259 if (ov5645->ctrls.error) {
1260 dev_err(dev, "%s: control initialization error %d\n",
1261 __func__, ov5645->ctrls.error);
1262 ret = ov5645->ctrls.error;
1263 goto free_ctrl;
1264 }
1265
1266 v4l2_i2c_subdev_init(&ov5645->sd, client, &ov5645_subdev_ops);
1267 ov5645->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1268 ov5645->pad.flags = MEDIA_PAD_FL_SOURCE;
1269 ov5645->sd.dev = &client->dev;
1270 ov5645->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1271
1272 ret = media_entity_pads_init(&ov5645->sd.entity, 1, &ov5645->pad);
1273 if (ret < 0) {
1274 dev_err(dev, "could not register media entity\n");
1275 goto free_ctrl;
1276 }
1277
1278 ret = ov5645_s_power(&ov5645->sd, true);
1279 if (ret < 0) {
1280 dev_err(dev, "could not power up OV5645\n");
1281 goto free_entity;
1282 }
1283
1284 ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_HIGH, &chip_id_high);
1285 if (ret < 0 || chip_id_high != OV5645_CHIP_ID_HIGH_BYTE) {
1286 dev_err(dev, "could not read ID high\n");
1287 ret = -ENODEV;
1288 goto power_down;
1289 }
1290 ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_LOW, &chip_id_low);
1291 if (ret < 0 || chip_id_low != OV5645_CHIP_ID_LOW_BYTE) {
1292 dev_err(dev, "could not read ID low\n");
1293 ret = -ENODEV;
1294 goto power_down;
1295 }
1296
1297 dev_info(dev, "OV5645 detected at address 0x%02x\n", client->addr);
1298
1299 ret = ov5645_read_reg(ov5645, OV5645_AEC_PK_MANUAL,
1300 &ov5645->aec_pk_manual);
1301 if (ret < 0) {
1302 dev_err(dev, "could not read AEC/AGC mode\n");
1303 ret = -ENODEV;
1304 goto power_down;
1305 }
1306
1307 ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG20,
1308 &ov5645->timing_tc_reg20);
1309 if (ret < 0) {
1310 dev_err(dev, "could not read vflip value\n");
1311 ret = -ENODEV;
1312 goto power_down;
1313 }
1314
1315 ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG21,
1316 &ov5645->timing_tc_reg21);
1317 if (ret < 0) {
1318 dev_err(dev, "could not read hflip value\n");
1319 ret = -ENODEV;
1320 goto power_down;
1321 }
1322
1323 ov5645_s_power(&ov5645->sd, false);
1324
1325 ret = v4l2_async_register_subdev(&ov5645->sd);
1326 if (ret < 0) {
1327 dev_err(dev, "could not register v4l2 device\n");
1328 goto free_entity;
1329 }
1330
1331 ov5645_entity_init_cfg(&ov5645->sd, NULL);
1332
1333 return 0;
1334
1335power_down:
1336 ov5645_s_power(&ov5645->sd, false);
1337free_entity:
1338 media_entity_cleanup(&ov5645->sd.entity);
1339free_ctrl:
1340 v4l2_ctrl_handler_free(&ov5645->ctrls);
1341 mutex_destroy(&ov5645->power_lock);
1342
1343 return ret;
1344}
1345
1346static int ov5645_remove(struct i2c_client *client)
1347{
1348 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1349 struct ov5645 *ov5645 = to_ov5645(sd);
1350
1351 v4l2_async_unregister_subdev(&ov5645->sd);
1352 media_entity_cleanup(&ov5645->sd.entity);
1353 v4l2_ctrl_handler_free(&ov5645->ctrls);
1354 mutex_destroy(&ov5645->power_lock);
1355
1356 return 0;
1357}
1358
1359static const struct i2c_device_id ov5645_id[] = {
1360 { "ov5645", 0 },
1361 {}
1362};
1363MODULE_DEVICE_TABLE(i2c, ov5645_id);
1364
1365static const struct of_device_id ov5645_of_match[] = {
1366 { .compatible = "ovti,ov5645" },
1367 { /* sentinel */ }
1368};
1369MODULE_DEVICE_TABLE(of, ov5645_of_match);
1370
1371static struct i2c_driver ov5645_i2c_driver = {
1372 .driver = {
1373 .of_match_table = of_match_ptr(ov5645_of_match),
1374 .name = "ov5645",
1375 },
1376 .probe = ov5645_probe,
1377 .remove = ov5645_remove,
1378 .id_table = ov5645_id,
1379};
1380
1381module_i2c_driver(ov5645_i2c_driver);
1382
1383MODULE_DESCRIPTION("Omnivision OV5645 Camera Driver");
1384MODULE_AUTHOR("Todor Tomov <todor.tomov@linaro.org>");
1385MODULE_LICENSE("GPL v2");