| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Copyright (c) 2018, The Linux Foundation. All rights reserved. |
| 4 | */ |
| 5 | |
| 6 | #ifndef _DT_BINDINGS_CLK_SDM_VIDEO_CC_SDM845_H |
| 7 | #define _DT_BINDINGS_CLK_SDM_VIDEO_CC_SDM845_H |
| 8 | |
| 9 | /* VIDEO_CC clock registers */ |
| 10 | #define VIDEO_CC_APB_CLK 0 |
| 11 | #define VIDEO_CC_AT_CLK 1 |
| 12 | #define VIDEO_CC_QDSS_TRIG_CLK 2 |
| 13 | #define VIDEO_CC_QDSS_TSCTR_DIV8_CLK 3 |
| 14 | #define VIDEO_CC_VCODEC0_AXI_CLK 4 |
| 15 | #define VIDEO_CC_VCODEC0_CORE_CLK 5 |
| 16 | #define VIDEO_CC_VCODEC1_AXI_CLK 6 |
| 17 | #define VIDEO_CC_VCODEC1_CORE_CLK 7 |
| 18 | #define VIDEO_CC_VENUS_AHB_CLK 8 |
| 19 | #define VIDEO_CC_VENUS_CLK_SRC 9 |
| 20 | #define VIDEO_CC_VENUS_CTL_AXI_CLK 10 |
| 21 | #define VIDEO_CC_VENUS_CTL_CORE_CLK 11 |
| 22 | #define VIDEO_PLL0 12 |
| 23 | |
| 24 | /* VIDEO_CC Resets */ |
| 25 | #define VIDEO_CC_VENUS_BCR 0 |
| 26 | #define VIDEO_CC_VCODEC0_BCR 1 |
| 27 | #define VIDEO_CC_VCODEC1_BCR 2 |
| 28 | #define VIDEO_CC_INTERFACE_BCR 3 |
| 29 | |
| 30 | /* VIDEO_CC GDSCRs */ |
| 31 | #define VENUS_GDSC 0 |
| 32 | #define VCODEC0_GDSC 1 |
| 33 | #define VCODEC1_GDSC 2 |
| 34 | |
| 35 | #endif |