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xjb04a4022021-11-25 15:01:52 +08001// SPDX-License-Identifier: GPL-2.0
2//
3// Audio driver for AK4458 DAC
4//
5// Copyright (C) 2016 Asahi Kasei Microdevices Corporation
6// Copyright 2018 NXP
7
8#include <linux/delay.h>
9#include <linux/gpio/consumer.h>
10#include <linux/i2c.h>
11#include <linux/module.h>
12#include <linux/of_device.h>
13#include <linux/of_gpio.h>
14#include <linux/pm_runtime.h>
15#include <linux/slab.h>
16#include <sound/initval.h>
17#include <sound/pcm_params.h>
18#include <sound/soc.h>
19#include <sound/soc-dapm.h>
20#include <sound/tlv.h>
21
22#include "ak4458.h"
23
24/* AK4458 Codec Private Data */
25struct ak4458_priv {
26 struct device *dev;
27 struct regmap *regmap;
28 struct gpio_desc *reset_gpiod;
29 struct gpio_desc *mute_gpiod;
30 int digfil; /* SSLOW, SD, SLOW bits */
31 int fs; /* sampling rate */
32 int fmt;
33 int slots;
34 int slot_width;
35};
36
37static const struct reg_default ak4458_reg_defaults[] = {
38 { 0x00, 0x0C }, /* 0x00 AK4458_00_CONTROL1 */
39 { 0x01, 0x22 }, /* 0x01 AK4458_01_CONTROL2 */
40 { 0x02, 0x00 }, /* 0x02 AK4458_02_CONTROL3 */
41 { 0x03, 0xFF }, /* 0x03 AK4458_03_LCHATT */
42 { 0x04, 0xFF }, /* 0x04 AK4458_04_RCHATT */
43 { 0x05, 0x00 }, /* 0x05 AK4458_05_CONTROL4 */
44 { 0x06, 0x00 }, /* 0x06 AK4458_06_DSD1 */
45 { 0x07, 0x03 }, /* 0x07 AK4458_07_CONTROL5 */
46 { 0x08, 0x00 }, /* 0x08 AK4458_08_SOUND_CONTROL */
47 { 0x09, 0x00 }, /* 0x09 AK4458_09_DSD2 */
48 { 0x0A, 0x0D }, /* 0x0A AK4458_0A_CONTROL6 */
49 { 0x0B, 0x0C }, /* 0x0B AK4458_0B_CONTROL7 */
50 { 0x0C, 0x00 }, /* 0x0C AK4458_0C_CONTROL8 */
51 { 0x0D, 0x00 }, /* 0x0D AK4458_0D_CONTROL9 */
52 { 0x0E, 0x50 }, /* 0x0E AK4458_0E_CONTROL10 */
53 { 0x0F, 0xFF }, /* 0x0F AK4458_0F_L2CHATT */
54 { 0x10, 0xFF }, /* 0x10 AK4458_10_R2CHATT */
55 { 0x11, 0xFF }, /* 0x11 AK4458_11_L3CHATT */
56 { 0x12, 0xFF }, /* 0x12 AK4458_12_R3CHATT */
57 { 0x13, 0xFF }, /* 0x13 AK4458_13_L4CHATT */
58 { 0x14, 0xFF }, /* 0x14 AK4458_14_R4CHATT */
59};
60
61/*
62 * Volume control:
63 * from -127 to 0 dB in 0.5 dB steps (mute instead of -127.5 dB)
64 */
65static DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
66
67/*
68 * DEM1 bit DEM0 bit Mode
69 * 0 0 44.1kHz
70 * 0 1 OFF (default)
71 * 1 0 48kHz
72 * 1 1 32kHz
73 */
74static const char * const ak4458_dem_select_texts[] = {
75 "44.1kHz", "OFF", "48kHz", "32kHz"
76};
77
78/*
79 * SSLOW, SD, SLOW bits Digital Filter Setting
80 * 0, 0, 0 : Sharp Roll-Off Filter
81 * 0, 0, 1 : Slow Roll-Off Filter
82 * 0, 1, 0 : Short delay Sharp Roll-Off Filter
83 * 0, 1, 1 : Short delay Slow Roll-Off Filter
84 * 1, *, * : Super Slow Roll-Off Filter
85 */
86static const char * const ak4458_digfil_select_texts[] = {
87 "Sharp Roll-Off Filter",
88 "Slow Roll-Off Filter",
89 "Short delay Sharp Roll-Off Filter",
90 "Short delay Slow Roll-Off Filter",
91 "Super Slow Roll-Off Filter"
92};
93
94/*
95 * DZFB: Inverting Enable of DZF
96 * 0: DZF goes H at Zero Detection
97 * 1: DZF goes L at Zero Detection
98 */
99static const char * const ak4458_dzfb_select_texts[] = {"H", "L"};
100
101/*
102 * SC1-0 bits: Sound Mode Setting
103 * 0 0 : Sound Mode 0
104 * 0 1 : Sound Mode 1
105 * 1 0 : Sound Mode 2
106 * 1 1 : Reserved
107 */
108static const char * const ak4458_sc_select_texts[] = {
109 "Sound Mode 0", "Sound Mode 1", "Sound Mode 2"
110};
111
112/* FIR2-0 bits: FIR Filter Mode Setting */
113static const char * const ak4458_fir_select_texts[] = {
114 "Mode 0", "Mode 1", "Mode 2", "Mode 3",
115 "Mode 4", "Mode 5", "Mode 6", "Mode 7",
116};
117
118/* ATS1-0 bits Attenuation Speed */
119static const char * const ak4458_ats_select_texts[] = {
120 "4080/fs", "2040/fs", "510/fs", "255/fs",
121};
122
123/* DIF2 bit Audio Interface Format Setting(BICK fs) */
124static const char * const ak4458_dif_select_texts[] = {"32fs,48fs", "64fs",};
125
126static const struct soc_enum ak4458_dac1_dem_enum =
127 SOC_ENUM_SINGLE(AK4458_01_CONTROL2, 1,
128 ARRAY_SIZE(ak4458_dem_select_texts),
129 ak4458_dem_select_texts);
130static const struct soc_enum ak4458_dac2_dem_enum =
131 SOC_ENUM_SINGLE(AK4458_0A_CONTROL6, 0,
132 ARRAY_SIZE(ak4458_dem_select_texts),
133 ak4458_dem_select_texts);
134static const struct soc_enum ak4458_dac3_dem_enum =
135 SOC_ENUM_SINGLE(AK4458_0E_CONTROL10, 4,
136 ARRAY_SIZE(ak4458_dem_select_texts),
137 ak4458_dem_select_texts);
138static const struct soc_enum ak4458_dac4_dem_enum =
139 SOC_ENUM_SINGLE(AK4458_0E_CONTROL10, 6,
140 ARRAY_SIZE(ak4458_dem_select_texts),
141 ak4458_dem_select_texts);
142static const struct soc_enum ak4458_digfil_enum =
143 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(ak4458_digfil_select_texts),
144 ak4458_digfil_select_texts);
145static const struct soc_enum ak4458_dzfb_enum =
146 SOC_ENUM_SINGLE(AK4458_02_CONTROL3, 2,
147 ARRAY_SIZE(ak4458_dzfb_select_texts),
148 ak4458_dzfb_select_texts);
149static const struct soc_enum ak4458_sm_enum =
150 SOC_ENUM_SINGLE(AK4458_08_SOUND_CONTROL, 0,
151 ARRAY_SIZE(ak4458_sc_select_texts),
152 ak4458_sc_select_texts);
153static const struct soc_enum ak4458_fir_enum =
154 SOC_ENUM_SINGLE(AK4458_0C_CONTROL8, 0,
155 ARRAY_SIZE(ak4458_fir_select_texts),
156 ak4458_fir_select_texts);
157static const struct soc_enum ak4458_ats_enum =
158 SOC_ENUM_SINGLE(AK4458_0B_CONTROL7, 6,
159 ARRAY_SIZE(ak4458_ats_select_texts),
160 ak4458_ats_select_texts);
161static const struct soc_enum ak4458_dif_enum =
162 SOC_ENUM_SINGLE(AK4458_00_CONTROL1, 3,
163 ARRAY_SIZE(ak4458_dif_select_texts),
164 ak4458_dif_select_texts);
165
166static int get_digfil(struct snd_kcontrol *kcontrol,
167 struct snd_ctl_elem_value *ucontrol)
168{
169 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
170 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
171
172 ucontrol->value.enumerated.item[0] = ak4458->digfil;
173
174 return 0;
175}
176
177static int set_digfil(struct snd_kcontrol *kcontrol,
178 struct snd_ctl_elem_value *ucontrol)
179{
180 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
181 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
182 int num;
183
184 num = ucontrol->value.enumerated.item[0];
185 if (num > 4)
186 return -EINVAL;
187
188 ak4458->digfil = num;
189
190 /* write SD bit */
191 snd_soc_component_update_bits(component, AK4458_01_CONTROL2,
192 AK4458_SD_MASK,
193 ((ak4458->digfil & 0x02) << 4));
194
195 /* write SLOW bit */
196 snd_soc_component_update_bits(component, AK4458_02_CONTROL3,
197 AK4458_SLOW_MASK,
198 (ak4458->digfil & 0x01));
199
200 /* write SSLOW bit */
201 snd_soc_component_update_bits(component, AK4458_05_CONTROL4,
202 AK4458_SSLOW_MASK,
203 ((ak4458->digfil & 0x04) >> 2));
204
205 return 0;
206}
207
208static const struct snd_kcontrol_new ak4458_snd_controls[] = {
209 SOC_DOUBLE_R_TLV("DAC1 Playback Volume", AK4458_03_LCHATT,
210 AK4458_04_RCHATT, 0, 0xFF, 0, dac_tlv),
211 SOC_DOUBLE_R_TLV("DAC2 Playback Volume", AK4458_0F_L2CHATT,
212 AK4458_10_R2CHATT, 0, 0xFF, 0, dac_tlv),
213 SOC_DOUBLE_R_TLV("DAC3 Playback Volume", AK4458_11_L3CHATT,
214 AK4458_12_R3CHATT, 0, 0xFF, 0, dac_tlv),
215 SOC_DOUBLE_R_TLV("DAC4 Playback Volume", AK4458_13_L4CHATT,
216 AK4458_14_R4CHATT, 0, 0xFF, 0, dac_tlv),
217 SOC_ENUM("AK4458 De-emphasis Response DAC1", ak4458_dac1_dem_enum),
218 SOC_ENUM("AK4458 De-emphasis Response DAC2", ak4458_dac2_dem_enum),
219 SOC_ENUM("AK4458 De-emphasis Response DAC3", ak4458_dac3_dem_enum),
220 SOC_ENUM("AK4458 De-emphasis Response DAC4", ak4458_dac4_dem_enum),
221 SOC_ENUM_EXT("AK4458 Digital Filter Setting", ak4458_digfil_enum,
222 get_digfil, set_digfil),
223 SOC_ENUM("AK4458 Inverting Enable of DZFB", ak4458_dzfb_enum),
224 SOC_ENUM("AK4458 Sound Mode", ak4458_sm_enum),
225 SOC_ENUM("AK4458 FIR Filter Mode Setting", ak4458_fir_enum),
226 SOC_ENUM("AK4458 Attenuation transition Time Setting",
227 ak4458_ats_enum),
228 SOC_ENUM("AK4458 BICK fs Setting", ak4458_dif_enum),
229};
230
231/* ak4458 dapm widgets */
232static const struct snd_soc_dapm_widget ak4458_dapm_widgets[] = {
233 SND_SOC_DAPM_DAC("AK4458 DAC1", NULL, AK4458_0A_CONTROL6, 2, 0),/*pw*/
234 SND_SOC_DAPM_AIF_IN("AK4458 SDTI", "Playback", 0, SND_SOC_NOPM, 0, 0),
235 SND_SOC_DAPM_OUTPUT("AK4458 AOUTA"),
236
237 SND_SOC_DAPM_DAC("AK4458 DAC2", NULL, AK4458_0A_CONTROL6, 3, 0),/*pw*/
238 SND_SOC_DAPM_OUTPUT("AK4458 AOUTB"),
239
240 SND_SOC_DAPM_DAC("AK4458 DAC3", NULL, AK4458_0B_CONTROL7, 2, 0),/*pw*/
241 SND_SOC_DAPM_OUTPUT("AK4458 AOUTC"),
242
243 SND_SOC_DAPM_DAC("AK4458 DAC4", NULL, AK4458_0B_CONTROL7, 3, 0),/*pw*/
244 SND_SOC_DAPM_OUTPUT("AK4458 AOUTD"),
245};
246
247static const struct snd_soc_dapm_route ak4458_intercon[] = {
248 {"AK4458 DAC1", NULL, "AK4458 SDTI"},
249 {"AK4458 AOUTA", NULL, "AK4458 DAC1"},
250
251 {"AK4458 DAC2", NULL, "AK4458 SDTI"},
252 {"AK4458 AOUTB", NULL, "AK4458 DAC2"},
253
254 {"AK4458 DAC3", NULL, "AK4458 SDTI"},
255 {"AK4458 AOUTC", NULL, "AK4458 DAC3"},
256
257 {"AK4458 DAC4", NULL, "AK4458 SDTI"},
258 {"AK4458 AOUTD", NULL, "AK4458 DAC4"},
259};
260
261static int ak4458_rstn_control(struct snd_soc_component *component, int bit)
262{
263 int ret;
264
265 if (bit)
266 ret = snd_soc_component_update_bits(component,
267 AK4458_00_CONTROL1,
268 AK4458_RSTN_MASK,
269 0x1);
270 else
271 ret = snd_soc_component_update_bits(component,
272 AK4458_00_CONTROL1,
273 AK4458_RSTN_MASK,
274 0x0);
275 if (ret < 0)
276 return ret;
277
278 return 0;
279}
280
281static int ak4458_hw_params(struct snd_pcm_substream *substream,
282 struct snd_pcm_hw_params *params,
283 struct snd_soc_dai *dai)
284{
285 struct snd_soc_component *component = dai->component;
286 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
287 int pcm_width = max(params_physical_width(params), ak4458->slot_width);
288 int nfs1;
289 u8 format;
290
291 nfs1 = params_rate(params);
292 ak4458->fs = nfs1;
293
294 /* Master Clock Frequency Auto Setting Mode Enable */
295 snd_soc_component_update_bits(component, AK4458_00_CONTROL1, 0x80, 0x80);
296
297 switch (pcm_width) {
298 case 16:
299 if (ak4458->fmt == SND_SOC_DAIFMT_I2S)
300 format = AK4458_DIF_24BIT_I2S;
301 else
302 format = AK4458_DIF_16BIT_LSB;
303 break;
304 case 32:
305 switch (ak4458->fmt) {
306 case SND_SOC_DAIFMT_I2S:
307 format = AK4458_DIF_32BIT_I2S;
308 break;
309 case SND_SOC_DAIFMT_LEFT_J:
310 format = AK4458_DIF_32BIT_MSB;
311 break;
312 case SND_SOC_DAIFMT_RIGHT_J:
313 format = AK4458_DIF_32BIT_LSB;
314 break;
315 case SND_SOC_DAIFMT_DSP_B:
316 format = AK4458_DIF_32BIT_MSB;
317 break;
318 default:
319 return -EINVAL;
320 }
321 break;
322 default:
323 return -EINVAL;
324 }
325
326 snd_soc_component_update_bits(component, AK4458_00_CONTROL1,
327 AK4458_DIF_MASK, format);
328
329 ak4458_rstn_control(component, 0);
330 ak4458_rstn_control(component, 1);
331
332 return 0;
333}
334
335static int ak4458_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
336{
337 struct snd_soc_component *component = dai->component;
338 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
339
340 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
341 case SND_SOC_DAIFMT_CBS_CFS: /* Slave Mode */
342 break;
343 case SND_SOC_DAIFMT_CBM_CFM: /* Master Mode is not supported */
344 case SND_SOC_DAIFMT_CBS_CFM:
345 case SND_SOC_DAIFMT_CBM_CFS:
346 default:
347 dev_err(component->dev, "Master mode unsupported\n");
348 return -EINVAL;
349 }
350
351 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
352 case SND_SOC_DAIFMT_I2S:
353 case SND_SOC_DAIFMT_LEFT_J:
354 case SND_SOC_DAIFMT_RIGHT_J:
355 case SND_SOC_DAIFMT_DSP_B:
356 ak4458->fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
357 break;
358 default:
359 dev_err(component->dev, "Audio format 0x%02X unsupported\n",
360 fmt & SND_SOC_DAIFMT_FORMAT_MASK);
361 return -EINVAL;
362 }
363
364 ak4458_rstn_control(component, 0);
365 ak4458_rstn_control(component, 1);
366
367 return 0;
368}
369
370static const int att_speed[] = { 4080, 2040, 510, 255 };
371
372static int ak4458_set_dai_mute(struct snd_soc_dai *dai, int mute)
373{
374 struct snd_soc_component *component = dai->component;
375 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
376 int nfs, ndt, ret, reg;
377 int ats;
378
379 nfs = ak4458->fs;
380
381 reg = snd_soc_component_read32(component, AK4458_0B_CONTROL7);
382 ats = (reg & AK4458_ATS_MASK) >> AK4458_ATS_SHIFT;
383
384 ndt = att_speed[ats] / (nfs / 1000);
385
386 if (mute) {
387 ret = snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 0x01, 1);
388 mdelay(ndt);
389 if (ak4458->mute_gpiod)
390 gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
391 } else {
392 if (ak4458->mute_gpiod)
393 gpiod_set_value_cansleep(ak4458->mute_gpiod, 0);
394 ret = snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 0x01, 0);
395 mdelay(ndt);
396 }
397
398 return 0;
399}
400
401static int ak4458_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
402 unsigned int rx_mask, int slots, int slot_width)
403{
404 struct snd_soc_component *component = dai->component;
405 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
406 int mode;
407
408 ak4458->slots = slots;
409 ak4458->slot_width = slot_width;
410
411 switch (slots * slot_width) {
412 case 128:
413 mode = AK4458_MODE_TDM128;
414 break;
415 case 256:
416 mode = AK4458_MODE_TDM256;
417 break;
418 case 512:
419 mode = AK4458_MODE_TDM512;
420 break;
421 default:
422 mode = AK4458_MODE_NORMAL;
423 break;
424 }
425
426 snd_soc_component_update_bits(component, AK4458_0A_CONTROL6,
427 AK4458_MODE_MASK,
428 mode);
429
430 return 0;
431}
432
433#define AK4458_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
434 SNDRV_PCM_FMTBIT_S24_LE |\
435 SNDRV_PCM_FMTBIT_S32_LE)
436
437static const unsigned int ak4458_rates[] = {
438 8000, 11025, 16000, 22050,
439 32000, 44100, 48000, 88200,
440 96000, 176400, 192000, 352800,
441 384000, 705600, 768000, 1411200,
442 2822400,
443};
444
445static const struct snd_pcm_hw_constraint_list ak4458_rate_constraints = {
446 .count = ARRAY_SIZE(ak4458_rates),
447 .list = ak4458_rates,
448};
449
450static int ak4458_startup(struct snd_pcm_substream *substream,
451 struct snd_soc_dai *dai)
452{
453 int ret;
454
455 ret = snd_pcm_hw_constraint_list(substream->runtime, 0,
456 SNDRV_PCM_HW_PARAM_RATE,
457 &ak4458_rate_constraints);
458
459 return ret;
460}
461
462static struct snd_soc_dai_ops ak4458_dai_ops = {
463 .startup = ak4458_startup,
464 .hw_params = ak4458_hw_params,
465 .set_fmt = ak4458_set_dai_fmt,
466 .digital_mute = ak4458_set_dai_mute,
467 .set_tdm_slot = ak4458_set_tdm_slot,
468};
469
470static struct snd_soc_dai_driver ak4458_dai = {
471 .name = "ak4458-aif",
472 .playback = {
473 .stream_name = "Playback",
474 .channels_min = 1,
475 .channels_max = 8,
476 .rates = SNDRV_PCM_RATE_KNOT,
477 .formats = AK4458_FORMATS,
478 },
479 .ops = &ak4458_dai_ops,
480};
481
482static void ak4458_power_off(struct ak4458_priv *ak4458)
483{
484 if (ak4458->reset_gpiod) {
485 gpiod_set_value_cansleep(ak4458->reset_gpiod, 0);
486 usleep_range(1000, 2000);
487 }
488}
489
490static void ak4458_power_on(struct ak4458_priv *ak4458)
491{
492 if (ak4458->reset_gpiod) {
493 gpiod_set_value_cansleep(ak4458->reset_gpiod, 1);
494 usleep_range(1000, 2000);
495 }
496}
497
498static int ak4458_init(struct snd_soc_component *component)
499{
500 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
501 int ret;
502
503 /* External Mute ON */
504 if (ak4458->mute_gpiod)
505 gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
506
507 ak4458_power_on(ak4458);
508
509 ret = snd_soc_component_update_bits(component, AK4458_00_CONTROL1,
510 0x80, 0x80); /* ACKS bit = 1; 10000000 */
511 if (ret < 0)
512 return ret;
513
514 return ak4458_rstn_control(component, 1);
515}
516
517static int ak4458_probe(struct snd_soc_component *component)
518{
519 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
520
521 ak4458->fs = 48000;
522
523 return ak4458_init(component);
524}
525
526static void ak4458_remove(struct snd_soc_component *component)
527{
528 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
529
530 ak4458_power_off(ak4458);
531}
532
533#ifdef CONFIG_PM
534static int __maybe_unused ak4458_runtime_suspend(struct device *dev)
535{
536 struct ak4458_priv *ak4458 = dev_get_drvdata(dev);
537
538 regcache_cache_only(ak4458->regmap, true);
539
540 ak4458_power_off(ak4458);
541
542 if (ak4458->mute_gpiod)
543 gpiod_set_value_cansleep(ak4458->mute_gpiod, 0);
544
545 return 0;
546}
547
548static int __maybe_unused ak4458_runtime_resume(struct device *dev)
549{
550 struct ak4458_priv *ak4458 = dev_get_drvdata(dev);
551
552 if (ak4458->mute_gpiod)
553 gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
554
555 ak4458_power_off(ak4458);
556 ak4458_power_on(ak4458);
557
558 regcache_cache_only(ak4458->regmap, false);
559 regcache_mark_dirty(ak4458->regmap);
560
561 return regcache_sync(ak4458->regmap);
562}
563#endif /* CONFIG_PM */
564
565static const struct snd_soc_component_driver soc_codec_dev_ak4458 = {
566 .probe = ak4458_probe,
567 .remove = ak4458_remove,
568 .controls = ak4458_snd_controls,
569 .num_controls = ARRAY_SIZE(ak4458_snd_controls),
570 .dapm_widgets = ak4458_dapm_widgets,
571 .num_dapm_widgets = ARRAY_SIZE(ak4458_dapm_widgets),
572 .dapm_routes = ak4458_intercon,
573 .num_dapm_routes = ARRAY_SIZE(ak4458_intercon),
574 .idle_bias_on = 1,
575 .use_pmdown_time = 1,
576 .endianness = 1,
577 .non_legacy_dai_naming = 1,
578};
579
580static const struct regmap_config ak4458_regmap = {
581 .reg_bits = 8,
582 .val_bits = 8,
583
584 .max_register = AK4458_14_R4CHATT,
585 .reg_defaults = ak4458_reg_defaults,
586 .num_reg_defaults = ARRAY_SIZE(ak4458_reg_defaults),
587 .cache_type = REGCACHE_RBTREE,
588};
589
590static const struct dev_pm_ops ak4458_pm = {
591 SET_RUNTIME_PM_OPS(ak4458_runtime_suspend, ak4458_runtime_resume, NULL)
592 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
593 pm_runtime_force_resume)
594};
595
596static int ak4458_i2c_probe(struct i2c_client *i2c)
597{
598 struct ak4458_priv *ak4458;
599 int ret;
600
601 ak4458 = devm_kzalloc(&i2c->dev, sizeof(*ak4458), GFP_KERNEL);
602 if (!ak4458)
603 return -ENOMEM;
604
605 ak4458->regmap = devm_regmap_init_i2c(i2c, &ak4458_regmap);
606 if (IS_ERR(ak4458->regmap))
607 return PTR_ERR(ak4458->regmap);
608
609 i2c_set_clientdata(i2c, ak4458);
610 ak4458->dev = &i2c->dev;
611
612 ak4458->reset_gpiod = devm_gpiod_get_optional(ak4458->dev, "reset",
613 GPIOD_OUT_LOW);
614 if (IS_ERR(ak4458->reset_gpiod))
615 return PTR_ERR(ak4458->reset_gpiod);
616
617 ak4458->mute_gpiod = devm_gpiod_get_optional(ak4458->dev, "mute",
618 GPIOD_OUT_LOW);
619 if (IS_ERR(ak4458->mute_gpiod))
620 return PTR_ERR(ak4458->mute_gpiod);
621
622 ret = devm_snd_soc_register_component(ak4458->dev, &soc_codec_dev_ak4458,
623 &ak4458_dai, 1);
624 if (ret < 0) {
625 dev_err(ak4458->dev, "Failed to register CODEC: %d\n", ret);
626 return ret;
627 }
628
629 pm_runtime_enable(&i2c->dev);
630
631 return 0;
632}
633
634static int ak4458_i2c_remove(struct i2c_client *i2c)
635{
636 pm_runtime_disable(&i2c->dev);
637
638 return 0;
639}
640
641static const struct of_device_id ak4458_of_match[] = {
642 { .compatible = "asahi-kasei,ak4458", },
643 { },
644};
645
646static struct i2c_driver ak4458_i2c_driver = {
647 .driver = {
648 .name = "ak4458",
649 .pm = &ak4458_pm,
650 .of_match_table = ak4458_of_match,
651 },
652 .probe_new = ak4458_i2c_probe,
653 .remove = ak4458_i2c_remove,
654};
655
656module_i2c_driver(ak4458_i2c_driver);
657
658MODULE_AUTHOR("Junichi Wakasugi <wakasugi.jb@om.asahi-kasei.co.jp>");
659MODULE_AUTHOR("Mihai Serban <mihai.serban@nxp.com>");
660MODULE_DESCRIPTION("ASoC AK4458 DAC driver");
661MODULE_LICENSE("GPL v2");