| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Interrupt handler for OMAP-1510 FPGA |
| 3 | * |
| 4 | * Copyright (C) 2001 RidgeRun, Inc. |
| 5 | * Author: Greg Lonnon <glonnon@ridgerun.com> |
| 6 | * |
| 7 | * Copyright (C) 2002 MontaVista Software, Inc. |
| 8 | * |
| 9 | * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6 |
| 10 | * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com> |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or modify |
| 13 | * it under the terms of the GNU General Public License version 2 as |
| 14 | * published by the Free Software Foundation. |
| 15 | */ |
| 16 | |
| 17 | #ifndef __ASM_ARCH_OMAP_FPGA_H |
| 18 | #define __ASM_ARCH_OMAP_FPGA_H |
| 19 | |
| 20 | /* |
| 21 | * --------------------------------------------------------------------------- |
| 22 | * H2/P2 Debug board FPGA |
| 23 | * --------------------------------------------------------------------------- |
| 24 | */ |
| 25 | /* maps in the FPGA registers and the ETHR registers */ |
| 26 | #define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */ |
| 27 | #define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */ |
| 28 | #define H2P2_DBG_FPGA_START 0x04000000 /* PA */ |
| 29 | |
| 30 | #define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300) |
| 31 | #define H2P2_DBG_FPGA_FPGA_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */ |
| 32 | #define H2P2_DBG_FPGA_BOARD_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x12) /* Board Revision */ |
| 33 | #define H2P2_DBG_FPGA_GPIO IOMEM(H2P2_DBG_FPGA_BASE + 0x14) /* GPIO outputs */ |
| 34 | #define H2P2_DBG_FPGA_LEDS IOMEM(H2P2_DBG_FPGA_BASE + 0x16) /* LEDs outputs */ |
| 35 | #define H2P2_DBG_FPGA_MISC_INPUTS IOMEM(H2P2_DBG_FPGA_BASE + 0x18) /* Misc inputs */ |
| 36 | #define H2P2_DBG_FPGA_LAN_STATUS IOMEM(H2P2_DBG_FPGA_BASE + 0x1A) /* LAN Status line */ |
| 37 | #define H2P2_DBG_FPGA_LAN_RESET IOMEM(H2P2_DBG_FPGA_BASE + 0x1C) /* LAN Reset line */ |
| 38 | |
| 39 | /* LEDs definition on debug board (16 LEDs, all physically green) */ |
| 40 | #define H2P2_DBG_FPGA_LED_GREEN (1 << 15) |
| 41 | #define H2P2_DBG_FPGA_LED_AMBER (1 << 14) |
| 42 | #define H2P2_DBG_FPGA_LED_RED (1 << 13) |
| 43 | #define H2P2_DBG_FPGA_LED_BLUE (1 << 12) |
| 44 | /* cpu0 load-meter LEDs */ |
| 45 | #define H2P2_DBG_FPGA_LOAD_METER (1 << 0) // A bit of fun on our board ... |
| 46 | #define H2P2_DBG_FPGA_LOAD_METER_SIZE 11 |
| 47 | #define H2P2_DBG_FPGA_LOAD_METER_MASK ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1) |
| 48 | |
| 49 | #define H2P2_DBG_FPGA_P2_LED_TIMER (1 << 0) |
| 50 | #define H2P2_DBG_FPGA_P2_LED_IDLE (1 << 1) |
| 51 | |
| 52 | #endif |