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192.168.1.100 / T800 / c3f84494b58ff76e52f13f1cce19bc2066845f47 / . / src / kernel / linux / v4.19 / arch / powerpc / kvm / book3s.c
blob: cc05f346e04219d0c737948c463d890f55bf6deb [file] [log] [blame]
xjb04a4022021-11-25 15:01:52 +0800[diff] [blame]1/*
2 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
3 *
4 * Authors:
5 * Alexander Graf <agraf@suse.de>
6 * Kevin Wolf <mail@kevin-wolf.de>
7 *
8 * Description:
9 * This file is derived from arch/powerpc/kvm/44x.c,
10 * by Hollis Blanchard <hollisb@us.ibm.com>.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License, version 2, as
14 * published by the Free Software Foundation.
15 */
16
17#include <linux/kvm_host.h>
18#include <linux/err.h>
19#include <linux/export.h>
20#include <linux/slab.h>
21#include <linux/module.h>
22#include <linux/miscdevice.h>
23#include <linux/gfp.h>
24#include <linux/sched.h>
25#include <linux/vmalloc.h>
26#include <linux/highmem.h>
27
28#include <asm/reg.h>
29#include <asm/cputable.h>
30#include <asm/cacheflush.h>
31#include <linux/uaccess.h>
32#include <asm/io.h>
33#include <asm/kvm_ppc.h>
34#include <asm/kvm_book3s.h>
35#include <asm/mmu_context.h>
36#include <asm/page.h>
37#include <asm/xive.h>
38
39#include "book3s.h"
40#include "trace.h"
41
42#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
43
44/* #define EXIT_DEBUG */
45
46struct kvm_stats_debugfs_item debugfs_entries[] = {
47 { "exits", VCPU_STAT(sum_exits) },
48 { "mmio", VCPU_STAT(mmio_exits) },
49 { "sig", VCPU_STAT(signal_exits) },
50 { "sysc", VCPU_STAT(syscall_exits) },
51 { "inst_emu", VCPU_STAT(emulated_inst_exits) },
52 { "dec", VCPU_STAT(dec_exits) },
53 { "ext_intr", VCPU_STAT(ext_intr_exits) },
54 { "queue_intr", VCPU_STAT(queue_intr) },
55 { "halt_poll_success_ns", VCPU_STAT(halt_poll_success_ns) },
56 { "halt_poll_fail_ns", VCPU_STAT(halt_poll_fail_ns) },
57 { "halt_wait_ns", VCPU_STAT(halt_wait_ns) },
58 { "halt_successful_poll", VCPU_STAT(halt_successful_poll), },
59 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll), },
60 { "halt_successful_wait", VCPU_STAT(halt_successful_wait) },
61 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
62 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
63 { "pf_storage", VCPU_STAT(pf_storage) },
64 { "sp_storage", VCPU_STAT(sp_storage) },
65 { "pf_instruc", VCPU_STAT(pf_instruc) },
66 { "sp_instruc", VCPU_STAT(sp_instruc) },
67 { "ld", VCPU_STAT(ld) },
68 { "ld_slow", VCPU_STAT(ld_slow) },
69 { "st", VCPU_STAT(st) },
70 { "st_slow", VCPU_STAT(st_slow) },
71 { "pthru_all", VCPU_STAT(pthru_all) },
72 { "pthru_host", VCPU_STAT(pthru_host) },
73 { "pthru_bad_aff", VCPU_STAT(pthru_bad_aff) },
74 { NULL }
75};
76
77void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu)
78{
79 if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) {
80 ulong pc = kvmppc_get_pc(vcpu);
81 ulong lr = kvmppc_get_lr(vcpu);
82 if ((pc & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)
83 kvmppc_set_pc(vcpu, pc & ~SPLIT_HACK_MASK);
84 if ((lr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)
85 kvmppc_set_lr(vcpu, lr & ~SPLIT_HACK_MASK);
86 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SPLIT_HACK;
87 }
88}
89EXPORT_SYMBOL_GPL(kvmppc_unfixup_split_real);
90
91static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
92{
93 if (!is_kvmppc_hv_enabled(vcpu->kvm))
94 return to_book3s(vcpu)->hior;
95 return 0;
96}
97
98static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
99 unsigned long pending_now, unsigned long old_pending)
100{
101 if (is_kvmppc_hv_enabled(vcpu->kvm))
102 return;
103 if (pending_now)
104 kvmppc_set_int_pending(vcpu, 1);
105 else if (old_pending)
106 kvmppc_set_int_pending(vcpu, 0);
107}
108
109static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
110{
111 ulong crit_raw;
112 ulong crit_r1;
113 bool crit;
114
115 if (is_kvmppc_hv_enabled(vcpu->kvm))
116 return false;
117
118 crit_raw = kvmppc_get_critical(vcpu);
119 crit_r1 = kvmppc_get_gpr(vcpu, 1);
120
121 /* Truncate crit indicators in 32 bit mode */
122 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
123 crit_raw &= 0xffffffff;
124 crit_r1 &= 0xffffffff;
125 }
126
127 /* Critical section when crit == r1 */
128 crit = (crit_raw == crit_r1);
129 /* ... and we're in supervisor mode */
130 crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR);
131
132 return crit;
133}
134
135void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
136{
137 kvmppc_unfixup_split_real(vcpu);
138 kvmppc_set_srr0(vcpu, kvmppc_get_pc(vcpu));
139 kvmppc_set_srr1(vcpu, (kvmppc_get_msr(vcpu) & ~0x783f0000ul) | flags);
140 kvmppc_set_pc(vcpu, kvmppc_interrupt_offset(vcpu) + vec);
141 vcpu->arch.mmu.reset_msr(vcpu);
142}
143
144static int kvmppc_book3s_vec2irqprio(unsigned int vec)
145{
146 unsigned int prio;
147
148 switch (vec) {
149 case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break;
150 case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break;
151 case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break;
152 case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break;
153 case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break;
154 case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break;
155 case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break;
156 case 0x501: prio = BOOK3S_IRQPRIO_EXTERNAL_LEVEL; break;
157 case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break;
158 case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break;
159 case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break;
160 case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break;
161 case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break;
162 case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break;
163 case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break;
164 case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break;
165 case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break;
166 default: prio = BOOK3S_IRQPRIO_MAX; break;
167 }
168
169 return prio;
170}
171
172void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
173 unsigned int vec)
174{
175 unsigned long old_pending = vcpu->arch.pending_exceptions;
176
177 clear_bit(kvmppc_book3s_vec2irqprio(vec),
178 &vcpu->arch.pending_exceptions);
179
180 kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions,
181 old_pending);
182}
183
184void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
185{
186 vcpu->stat.queue_intr++;
187
188 set_bit(kvmppc_book3s_vec2irqprio(vec),
189 &vcpu->arch.pending_exceptions);
190#ifdef EXIT_DEBUG
191 printk(KERN_INFO "Queueing interrupt %x\n", vec);
192#endif
193}
194EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio);
195
196void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
197{
198 /* might as well deliver this straight away */
199 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags);
200}
201EXPORT_SYMBOL_GPL(kvmppc_core_queue_program);
202
203void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu)
204{
205 /* might as well deliver this straight away */
206 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, 0);
207}
208
209void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu)
210{
211 /* might as well deliver this straight away */
212 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_ALTIVEC, 0);
213}
214
215void kvmppc_core_queue_vsx_unavail(struct kvm_vcpu *vcpu)
216{
217 /* might as well deliver this straight away */
218 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_VSX, 0);
219}
220
221void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
222{
223 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
224}
225EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec);
226
227int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
228{
229 return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
230}
231EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec);
232
233void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
234{
235 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
236}
237EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec);
238
239void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
240 struct kvm_interrupt *irq)
241{
242 unsigned int vec = BOOK3S_INTERRUPT_EXTERNAL;
243
244 if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
245 vec = BOOK3S_INTERRUPT_EXTERNAL_LEVEL;
246
247 kvmppc_book3s_queue_irqprio(vcpu, vec);
248}
249
250void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
251{
252 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
253 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
254}
255
256void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar,
257 ulong flags)
258{
259 kvmppc_set_dar(vcpu, dar);
260 kvmppc_set_dsisr(vcpu, flags);
261 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE, 0);
262}
263EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage);
264
265void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags)
266{
267 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_INST_STORAGE, flags);
268}
269EXPORT_SYMBOL_GPL(kvmppc_core_queue_inst_storage);
270
271static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu,
272 unsigned int priority)
273{
274 int deliver = 1;
275 int vec = 0;
276 bool crit = kvmppc_critical_section(vcpu);
277
278 switch (priority) {
279 case BOOK3S_IRQPRIO_DECREMENTER:
280 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
281 vec = BOOK3S_INTERRUPT_DECREMENTER;
282 break;
283 case BOOK3S_IRQPRIO_EXTERNAL:
284 case BOOK3S_IRQPRIO_EXTERNAL_LEVEL:
285 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
286 vec = BOOK3S_INTERRUPT_EXTERNAL;
287 break;
288 case BOOK3S_IRQPRIO_SYSTEM_RESET:
289 vec = BOOK3S_INTERRUPT_SYSTEM_RESET;
290 break;
291 case BOOK3S_IRQPRIO_MACHINE_CHECK:
292 vec = BOOK3S_INTERRUPT_MACHINE_CHECK;
293 break;
294 case BOOK3S_IRQPRIO_DATA_STORAGE:
295 vec = BOOK3S_INTERRUPT_DATA_STORAGE;
296 break;
297 case BOOK3S_IRQPRIO_INST_STORAGE:
298 vec = BOOK3S_INTERRUPT_INST_STORAGE;
299 break;
300 case BOOK3S_IRQPRIO_DATA_SEGMENT:
301 vec = BOOK3S_INTERRUPT_DATA_SEGMENT;
302 break;
303 case BOOK3S_IRQPRIO_INST_SEGMENT:
304 vec = BOOK3S_INTERRUPT_INST_SEGMENT;
305 break;
306 case BOOK3S_IRQPRIO_ALIGNMENT:
307 vec = BOOK3S_INTERRUPT_ALIGNMENT;
308 break;
309 case BOOK3S_IRQPRIO_PROGRAM:
310 vec = BOOK3S_INTERRUPT_PROGRAM;
311 break;
312 case BOOK3S_IRQPRIO_VSX:
313 vec = BOOK3S_INTERRUPT_VSX;
314 break;
315 case BOOK3S_IRQPRIO_ALTIVEC:
316 vec = BOOK3S_INTERRUPT_ALTIVEC;
317 break;
318 case BOOK3S_IRQPRIO_FP_UNAVAIL:
319 vec = BOOK3S_INTERRUPT_FP_UNAVAIL;
320 break;
321 case BOOK3S_IRQPRIO_SYSCALL:
322 vec = BOOK3S_INTERRUPT_SYSCALL;
323 break;
324 case BOOK3S_IRQPRIO_DEBUG:
325 vec = BOOK3S_INTERRUPT_TRACE;
326 break;
327 case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR:
328 vec = BOOK3S_INTERRUPT_PERFMON;
329 break;
330 case BOOK3S_IRQPRIO_FAC_UNAVAIL:
331 vec = BOOK3S_INTERRUPT_FAC_UNAVAIL;
332 break;
333 default:
334 deliver = 0;
335 printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority);
336 break;
337 }
338
339#if 0
340 printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver);
341#endif
342
343 if (deliver)
344 kvmppc_inject_interrupt(vcpu, vec, 0);
345
346 return deliver;
347}
348
349/*
350 * This function determines if an irqprio should be cleared once issued.
351 */
352static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)
353{
354 switch (priority) {
355 case BOOK3S_IRQPRIO_DECREMENTER:
356 /* DEC interrupts get cleared by mtdec */
357 return false;
358 case BOOK3S_IRQPRIO_EXTERNAL_LEVEL:
359 /* External interrupts get cleared by userspace */
360 return false;
361 }
362
363 return true;
364}
365
366int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
367{
368 unsigned long *pending = &vcpu->arch.pending_exceptions;
369 unsigned long old_pending = vcpu->arch.pending_exceptions;
370 unsigned int priority;
371
372#ifdef EXIT_DEBUG
373 if (vcpu->arch.pending_exceptions)
374 printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions);
375#endif
376 priority = __ffs(*pending);
377 while (priority < BOOK3S_IRQPRIO_MAX) {
378 if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
379 clear_irqprio(vcpu, priority)) {
380 clear_bit(priority, &vcpu->arch.pending_exceptions);
381 break;
382 }
383
384 priority = find_next_bit(pending,
385 BITS_PER_BYTE * sizeof(*pending),
386 priority + 1);
387 }
388
389 /* Tell the guest about our interrupt status */
390 kvmppc_update_int_pending(vcpu, *pending, old_pending);
391
392 return 0;
393}
394EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);
395
396kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing,
397 bool *writable)
398{
399 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM;
400 gfn_t gfn = gpa >> PAGE_SHIFT;
401
402 if (!(kvmppc_get_msr(vcpu) & MSR_SF))
403 mp_pa = (uint32_t)mp_pa;
404
405 /* Magic page override */
406 gpa &= ~0xFFFULL;
407 if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) {
408 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
409 kvm_pfn_t pfn;
410
411 pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT;
412 get_page(pfn_to_page(pfn));
413 if (writable)
414 *writable = true;
415 return pfn;
416 }
417
418 return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable);
419}
420EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn);
421
422int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
423 enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
424{
425 bool data = (xlid == XLATE_DATA);
426 bool iswrite = (xlrw == XLATE_WRITE);
427 int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR));
428 int r;
429
430 if (relocated) {
431 r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite);
432 } else {
433 pte->eaddr = eaddr;
434 pte->raddr = eaddr & KVM_PAM;
435 pte->vpage = VSID_REAL | eaddr >> 12;
436 pte->may_read = true;
437 pte->may_write = true;
438 pte->may_execute = true;
439 r = 0;
440
441 if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR &&
442 !data) {
443 if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
444 ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
445 pte->raddr &= ~SPLIT_HACK_MASK;
446 }
447 }
448
449 return r;
450}
451
452int kvmppc_load_last_inst(struct kvm_vcpu *vcpu,
453 enum instruction_fetch_type type, u32 *inst)
454{
455 ulong pc = kvmppc_get_pc(vcpu);
456 int r;
457
458 if (type == INST_SC)
459 pc -= 4;
460
461 r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false);
462 if (r == EMULATE_DONE)
463 return r;
464 else
465 return EMULATE_AGAIN;
466}
467EXPORT_SYMBOL_GPL(kvmppc_load_last_inst);
468
469int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
470{
471 return 0;
472}
473
474int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
475{
476 return 0;
477}
478
479void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
480{
481}
482
483int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
484 struct kvm_sregs *sregs)
485{
486 int ret;
487
488 vcpu_load(vcpu);
489 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
490 vcpu_put(vcpu);
491
492 return ret;
493}
494
495int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
496 struct kvm_sregs *sregs)
497{
498 int ret;
499
500 vcpu_load(vcpu);
501 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
502 vcpu_put(vcpu);
503
504 return ret;
505}
506
507int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
508{
509 int i;
510
511 regs->pc = kvmppc_get_pc(vcpu);
512 regs->cr = kvmppc_get_cr(vcpu);
513 regs->ctr = kvmppc_get_ctr(vcpu);
514 regs->lr = kvmppc_get_lr(vcpu);
515 regs->xer = kvmppc_get_xer(vcpu);
516 regs->msr = kvmppc_get_msr(vcpu);
517 regs->srr0 = kvmppc_get_srr0(vcpu);
518 regs->srr1 = kvmppc_get_srr1(vcpu);
519 regs->pid = vcpu->arch.pid;
520 regs->sprg0 = kvmppc_get_sprg0(vcpu);
521 regs->sprg1 = kvmppc_get_sprg1(vcpu);
522 regs->sprg2 = kvmppc_get_sprg2(vcpu);
523 regs->sprg3 = kvmppc_get_sprg3(vcpu);
524 regs->sprg4 = kvmppc_get_sprg4(vcpu);
525 regs->sprg5 = kvmppc_get_sprg5(vcpu);
526 regs->sprg6 = kvmppc_get_sprg6(vcpu);
527 regs->sprg7 = kvmppc_get_sprg7(vcpu);
528
529 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
530 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
531
532 return 0;
533}
534
535int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
536{
537 int i;
538
539 kvmppc_set_pc(vcpu, regs->pc);
540 kvmppc_set_cr(vcpu, regs->cr);
541 kvmppc_set_ctr(vcpu, regs->ctr);
542 kvmppc_set_lr(vcpu, regs->lr);
543 kvmppc_set_xer(vcpu, regs->xer);
544 kvmppc_set_msr(vcpu, regs->msr);
545 kvmppc_set_srr0(vcpu, regs->srr0);
546 kvmppc_set_srr1(vcpu, regs->srr1);
547 kvmppc_set_sprg0(vcpu, regs->sprg0);
548 kvmppc_set_sprg1(vcpu, regs->sprg1);
549 kvmppc_set_sprg2(vcpu, regs->sprg2);
550 kvmppc_set_sprg3(vcpu, regs->sprg3);
551 kvmppc_set_sprg4(vcpu, regs->sprg4);
552 kvmppc_set_sprg5(vcpu, regs->sprg5);
553 kvmppc_set_sprg6(vcpu, regs->sprg6);
554 kvmppc_set_sprg7(vcpu, regs->sprg7);
555
556 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
557 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
558
559 return 0;
560}
561
562int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
563{
564 return -ENOTSUPP;
565}
566
567int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
568{
569 return -ENOTSUPP;
570}
571
572int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
573 union kvmppc_one_reg *val)
574{
575 int r = 0;
576 long int i;
577
578 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
579 if (r == -EINVAL) {
580 r = 0;
581 switch (id) {
582 case KVM_REG_PPC_DAR:
583 *val = get_reg_val(id, kvmppc_get_dar(vcpu));
584 break;
585 case KVM_REG_PPC_DSISR:
586 *val = get_reg_val(id, kvmppc_get_dsisr(vcpu));
587 break;
588 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
589 i = id - KVM_REG_PPC_FPR0;
590 *val = get_reg_val(id, VCPU_FPR(vcpu, i));
591 break;
592 case KVM_REG_PPC_FPSCR:
593 *val = get_reg_val(id, vcpu->arch.fp.fpscr);
594 break;
595#ifdef CONFIG_VSX
596 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
597 if (cpu_has_feature(CPU_FTR_VSX)) {
598 i = id - KVM_REG_PPC_VSR0;
599 val->vsxval[0] = vcpu->arch.fp.fpr[i][0];
600 val->vsxval[1] = vcpu->arch.fp.fpr[i][1];
601 } else {
602 r = -ENXIO;
603 }
604 break;
605#endif /* CONFIG_VSX */
606 case KVM_REG_PPC_DEBUG_INST:
607 *val = get_reg_val(id, INS_TW);
608 break;
609#ifdef CONFIG_KVM_XICS
610 case KVM_REG_PPC_ICP_STATE:
611 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
612 r = -ENXIO;
613 break;
614 }
615 if (xive_enabled())
616 *val = get_reg_val(id, kvmppc_xive_get_icp(vcpu));
617 else
618 *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu));
619 break;
620#endif /* CONFIG_KVM_XICS */
621 case KVM_REG_PPC_FSCR:
622 *val = get_reg_val(id, vcpu->arch.fscr);
623 break;
624 case KVM_REG_PPC_TAR:
625 *val = get_reg_val(id, vcpu->arch.tar);
626 break;
627 case KVM_REG_PPC_EBBHR:
628 *val = get_reg_val(id, vcpu->arch.ebbhr);
629 break;
630 case KVM_REG_PPC_EBBRR:
631 *val = get_reg_val(id, vcpu->arch.ebbrr);
632 break;
633 case KVM_REG_PPC_BESCR:
634 *val = get_reg_val(id, vcpu->arch.bescr);
635 break;
636 case KVM_REG_PPC_IC:
637 *val = get_reg_val(id, vcpu->arch.ic);
638 break;
639 default:
640 r = -EINVAL;
641 break;
642 }
643 }
644
645 return r;
646}
647
648int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
649 union kvmppc_one_reg *val)
650{
651 int r = 0;
652 long int i;
653
654 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
655 if (r == -EINVAL) {
656 r = 0;
657 switch (id) {
658 case KVM_REG_PPC_DAR:
659 kvmppc_set_dar(vcpu, set_reg_val(id, *val));
660 break;
661 case KVM_REG_PPC_DSISR:
662 kvmppc_set_dsisr(vcpu, set_reg_val(id, *val));
663 break;
664 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
665 i = id - KVM_REG_PPC_FPR0;
666 VCPU_FPR(vcpu, i) = set_reg_val(id, *val);
667 break;
668 case KVM_REG_PPC_FPSCR:
669 vcpu->arch.fp.fpscr = set_reg_val(id, *val);
670 break;
671#ifdef CONFIG_VSX
672 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
673 if (cpu_has_feature(CPU_FTR_VSX)) {
674 i = id - KVM_REG_PPC_VSR0;
675 vcpu->arch.fp.fpr[i][0] = val->vsxval[0];
676 vcpu->arch.fp.fpr[i][1] = val->vsxval[1];
677 } else {
678 r = -ENXIO;
679 }
680 break;
681#endif /* CONFIG_VSX */
682#ifdef CONFIG_KVM_XICS
683 case KVM_REG_PPC_ICP_STATE:
684 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
685 r = -ENXIO;
686 break;
687 }
688 if (xive_enabled())
689 r = kvmppc_xive_set_icp(vcpu, set_reg_val(id, *val));
690 else
691 r = kvmppc_xics_set_icp(vcpu, set_reg_val(id, *val));
692 break;
693#endif /* CONFIG_KVM_XICS */
694 case KVM_REG_PPC_FSCR:
695 vcpu->arch.fscr = set_reg_val(id, *val);
696 break;
697 case KVM_REG_PPC_TAR:
698 vcpu->arch.tar = set_reg_val(id, *val);
699 break;
700 case KVM_REG_PPC_EBBHR:
701 vcpu->arch.ebbhr = set_reg_val(id, *val);
702 break;
703 case KVM_REG_PPC_EBBRR:
704 vcpu->arch.ebbrr = set_reg_val(id, *val);
705 break;
706 case KVM_REG_PPC_BESCR:
707 vcpu->arch.bescr = set_reg_val(id, *val);
708 break;
709 case KVM_REG_PPC_IC:
710 vcpu->arch.ic = set_reg_val(id, *val);
711 break;
712 default:
713 r = -EINVAL;
714 break;
715 }
716 }
717
718 return r;
719}
720
721void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
722{
723 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
724}
725
726void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
727{
728 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
729}
730
731void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
732{
733 vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr);
734}
735EXPORT_SYMBOL_GPL(kvmppc_set_msr);
736
737int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
738{
739 return vcpu->kvm->arch.kvm_ops->vcpu_run(kvm_run, vcpu);
740}
741
742int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
743 struct kvm_translation *tr)
744{
745 return 0;
746}
747
748int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
749 struct kvm_guest_debug *dbg)
750{
751 vcpu_load(vcpu);
752 vcpu->guest_debug = dbg->control;
753 vcpu_put(vcpu);
754 return 0;
755}
756
757void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
758{
759 kvmppc_core_queue_dec(vcpu);
760 kvm_vcpu_kick(vcpu);
761}
762
763struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
764{
765 return kvm->arch.kvm_ops->vcpu_create(kvm, id);
766}
767
768void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
769{
770 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
771}
772
773int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
774{
775 return vcpu->kvm->arch.kvm_ops->check_requests(vcpu);
776}
777
778int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
779{
780 return kvm->arch.kvm_ops->get_dirty_log(kvm, log);
781}
782
783void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
784 struct kvm_memory_slot *dont)
785{
786 kvm->arch.kvm_ops->free_memslot(free, dont);
787}
788
789int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
790 unsigned long npages)
791{
792 return kvm->arch.kvm_ops->create_memslot(slot, npages);
793}
794
795void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
796{
797 kvm->arch.kvm_ops->flush_memslot(kvm, memslot);
798}
799
800int kvmppc_core_prepare_memory_region(struct kvm *kvm,
801 struct kvm_memory_slot *memslot,
802 const struct kvm_userspace_memory_region *mem)
803{
804 return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem);
805}
806
807void kvmppc_core_commit_memory_region(struct kvm *kvm,
808 const struct kvm_userspace_memory_region *mem,
809 const struct kvm_memory_slot *old,
810 const struct kvm_memory_slot *new)
811{
812 kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old, new);
813}
814
815int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
816{
817 return kvm->arch.kvm_ops->unmap_hva_range(kvm, start, end);
818}
819
820int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
821{
822 return kvm->arch.kvm_ops->age_hva(kvm, start, end);
823}
824
825int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
826{
827 return kvm->arch.kvm_ops->test_age_hva(kvm, hva);
828}
829
830void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
831{
832 kvm->arch.kvm_ops->set_spte_hva(kvm, hva, pte);
833}
834
835void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
836{
837 vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu);
838}
839
840int kvmppc_core_init_vm(struct kvm *kvm)
841{
842
843#ifdef CONFIG_PPC64
844 INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables);
845 INIT_LIST_HEAD(&kvm->arch.rtas_tokens);
846 mutex_init(&kvm->arch.rtas_token_lock);
847#endif
848
849 return kvm->arch.kvm_ops->init_vm(kvm);
850}
851
852void kvmppc_core_destroy_vm(struct kvm *kvm)
853{
854 kvm->arch.kvm_ops->destroy_vm(kvm);
855
856#ifdef CONFIG_PPC64
857 kvmppc_rtas_tokens_free(kvm);
858 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
859#endif
860}
861
862int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu)
863{
864 unsigned long size = kvmppc_get_gpr(vcpu, 4);
865 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
866 u64 buf;
867 int srcu_idx;
868 int ret;
869
870 if (!is_power_of_2(size) || (size > sizeof(buf)))
871 return H_TOO_HARD;
872
873 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
874 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf);
875 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
876 if (ret != 0)
877 return H_TOO_HARD;
878
879 switch (size) {
880 case 1:
881 kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf);
882 break;
883
884 case 2:
885 kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf));
886 break;
887
888 case 4:
889 kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf));
890 break;
891
892 case 8:
893 kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf));
894 break;
895
896 default:
897 BUG();
898 }
899
900 return H_SUCCESS;
901}
902EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load);
903
904int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu)
905{
906 unsigned long size = kvmppc_get_gpr(vcpu, 4);
907 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
908 unsigned long val = kvmppc_get_gpr(vcpu, 6);
909 u64 buf;
910 int srcu_idx;
911 int ret;
912
913 switch (size) {
914 case 1:
915 *(u8 *)&buf = val;
916 break;
917
918 case 2:
919 *(__be16 *)&buf = cpu_to_be16(val);
920 break;
921
922 case 4:
923 *(__be32 *)&buf = cpu_to_be32(val);
924 break;
925
926 case 8:
927 *(__be64 *)&buf = cpu_to_be64(val);
928 break;
929
930 default:
931 return H_TOO_HARD;
932 }
933
934 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
935 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf);
936 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
937 if (ret != 0)
938 return H_TOO_HARD;
939
940 return H_SUCCESS;
941}
942EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store);
943
944int kvmppc_core_check_processor_compat(void)
945{
946 /*
947 * We always return 0 for book3s. We check
948 * for compatibility while loading the HV
949 * or PR module
950 */
951 return 0;
952}
953
954int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall)
955{
956 return kvm->arch.kvm_ops->hcall_implemented(hcall);
957}
958
959#ifdef CONFIG_KVM_XICS
960int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level,
961 bool line_status)
962{
963 if (xive_enabled())
964 return kvmppc_xive_set_irq(kvm, irq_source_id, irq, level,
965 line_status);
966 else
967 return kvmppc_xics_set_irq(kvm, irq_source_id, irq, level,
968 line_status);
969}
970
971int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry,
972 struct kvm *kvm, int irq_source_id,
973 int level, bool line_status)
974{
975 return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi,
976 level, line_status);
977}
978static int kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry *e,
979 struct kvm *kvm, int irq_source_id, int level,
980 bool line_status)
981{
982 return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status);
983}
984
985int kvm_irq_map_gsi(struct kvm *kvm,
986 struct kvm_kernel_irq_routing_entry *entries, int gsi)
987{
988 entries->gsi = gsi;
989 entries->type = KVM_IRQ_ROUTING_IRQCHIP;
990 entries->set = kvmppc_book3s_set_irq;
991 entries->irqchip.irqchip = 0;
992 entries->irqchip.pin = gsi;
993 return 1;
994}
995
996int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin)
997{
998 return pin;
999}
1000
1001#endif /* CONFIG_KVM_XICS */
1002
1003static int kvmppc_book3s_init(void)
1004{
1005 int r;
1006
1007 r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1008 if (r)
1009 return r;
1010#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1011 r = kvmppc_book3s_init_pr();
1012#endif
1013
1014#ifdef CONFIG_KVM_XICS
1015#ifdef CONFIG_KVM_XIVE
1016 if (xive_enabled()) {
1017 kvmppc_xive_init_module();
1018 kvm_register_device_ops(&kvm_xive_ops, KVM_DEV_TYPE_XICS);
1019 } else
1020#endif
1021 kvm_register_device_ops(&kvm_xics_ops, KVM_DEV_TYPE_XICS);
1022#endif
1023 return r;
1024}
1025
1026static void kvmppc_book3s_exit(void)
1027{
1028#ifdef CONFIG_KVM_XICS
1029 if (xive_enabled())
1030 kvmppc_xive_exit_module();
1031#endif
1032#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1033 kvmppc_book3s_exit_pr();
1034#endif
1035 kvm_exit();
1036}
1037
1038module_init(kvmppc_book3s_init);
1039module_exit(kvmppc_book3s_exit);
1040
1041/* On 32bit this is our one and only kernel module */
1042#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1043MODULE_ALIAS_MISCDEV(KVM_MINOR);
1044MODULE_ALIAS("devname:kvm");
1045#endif