| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | /*: |
| 2 | * Address mappings and base address for OMAP4 interconnects |
| 3 | * and peripherals. |
| 4 | * |
| 5 | * Copyright (C) 2009 Texas Instruments |
| 6 | * |
| 7 | * Author: Santosh Shilimkar <santosh.shilimkar@ti.com> |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | */ |
| 13 | #ifndef __ASM_ARCH_OMAP44XX_H |
| 14 | #define __ASM_ARCH_OMAP44XX_H |
| 15 | |
| 16 | /* |
| 17 | * Please place only base defines here and put the rest in device |
| 18 | * specific headers. |
| 19 | */ |
| 20 | #define L4_44XX_BASE 0x4a000000 |
| 21 | #define L4_WK_44XX_BASE 0x4a300000 |
| 22 | #define L4_PER_44XX_BASE 0x48000000 |
| 23 | #define L4_EMU_44XX_BASE 0x54000000 |
| 24 | #define L3_44XX_BASE 0x44000000 |
| 25 | #define OMAP44XX_EMIF1_BASE 0x4c000000 |
| 26 | #define OMAP44XX_EMIF2_BASE 0x4d000000 |
| 27 | #define OMAP44XX_DMM_BASE 0x4e000000 |
| 28 | #define OMAP4430_32KSYNCT_BASE 0x4a304000 |
| 29 | #define OMAP4430_CM1_BASE 0x4a004000 |
| 30 | #define OMAP4430_CM_BASE OMAP4430_CM1_BASE |
| 31 | #define OMAP4430_CM2_BASE 0x4a008000 |
| 32 | #define OMAP4430_PRM_BASE 0x4a306000 |
| 33 | #define OMAP4430_PRCM_MPU_BASE 0x48243000 |
| 34 | #define OMAP44XX_GPMC_BASE 0x50000000 |
| 35 | #define OMAP443X_SCM_BASE 0x4a002000 |
| 36 | #define OMAP443X_CTRL_BASE 0x4a100000 |
| 37 | #define OMAP44XX_IC_BASE 0x48200000 |
| 38 | #define OMAP44XX_IVA_INTC_BASE 0x40000000 |
| 39 | #define IRQ_SIR_IRQ 0x0040 |
| 40 | #define OMAP44XX_GIC_DIST_BASE 0x48241000 |
| 41 | #define OMAP44XX_GIC_CPU_BASE 0x48240100 |
| 42 | #define OMAP44XX_IRQ_GIC_START 32 |
| 43 | #define OMAP44XX_LOCAL_TWD_BASE 0x48240600 |
| 44 | #define OMAP44XX_L2CACHE_BASE 0x48242000 |
| 45 | #define OMAP44XX_WKUPGEN_BASE 0x48281000 |
| 46 | #define OMAP44XX_MCPDM_BASE 0x40132000 |
| 47 | #define OMAP44XX_SAR_RAM_BASE 0x4a326000 |
| 48 | |
| 49 | #define OMAP44XX_MAILBOX_BASE (L4_44XX_BASE + 0xF4000) |
| 50 | #define OMAP44XX_HSUSB_OTG_BASE (L4_44XX_BASE + 0xAB000) |
| 51 | |
| 52 | #define OMAP4_MMU1_BASE 0x55082000 |
| 53 | #define OMAP4_MMU2_BASE 0x4A066000 |
| 54 | |
| 55 | #define OMAP44XX_USBTLL_BASE (L4_44XX_BASE + 0x62000) |
| 56 | #define OMAP44XX_UHH_CONFIG_BASE (L4_44XX_BASE + 0x64000) |
| 57 | #define OMAP44XX_HSUSB_OHCI_BASE (L4_44XX_BASE + 0x64800) |
| 58 | #define OMAP44XX_HSUSB_EHCI_BASE (L4_44XX_BASE + 0x64C00) |
| 59 | |
| 60 | #endif /* __ASM_ARCH_OMAP44XX_H */ |
| 61 | |