| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | /* |
| 2 | * TI Syscon Reset definitions |
| 3 | * |
| 4 | * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | */ |
| 16 | |
| 17 | #ifndef __DT_BINDINGS_RESET_TI_SYSCON_H__ |
| 18 | #define __DT_BINDINGS_RESET_TI_SYSCON_H__ |
| 19 | |
| 20 | /* |
| 21 | * The reset does not support the feature and corresponding |
| 22 | * values are not valid |
| 23 | */ |
| 24 | #define ASSERT_NONE (1 << 0) |
| 25 | #define DEASSERT_NONE (1 << 1) |
| 26 | #define STATUS_NONE (1 << 2) |
| 27 | |
| 28 | /* When set this function is activated by setting(vs clearing) this bit */ |
| 29 | #define ASSERT_SET (1 << 3) |
| 30 | #define DEASSERT_SET (1 << 4) |
| 31 | #define STATUS_SET (1 << 5) |
| 32 | |
| 33 | /* The following are the inverse of the above and are added for consistency */ |
| 34 | #define ASSERT_CLEAR (0 << 3) |
| 35 | #define DEASSERT_CLEAR (0 << 4) |
| 36 | #define STATUS_CLEAR (0 << 5) |
| 37 | |
| 38 | #endif |