| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 | 
 | 2 | // | 
 | 3 | // Copyright 2008 Openmoko, Inc. | 
 | 4 | // Copyright 2008 Simtec Electronics | 
 | 5 | //	Ben Dooks <ben@simtec.co.uk> | 
 | 6 | //	http://armlinux.simtec.co.uk/ | 
 | 7 |  | 
 | 8 | #include <linux/kernel.h> | 
 | 9 | #include <linux/types.h> | 
 | 10 | #include <linux/interrupt.h> | 
 | 11 | #include <linux/list.h> | 
 | 12 | #include <linux/timer.h> | 
 | 13 | #include <linux/init.h> | 
 | 14 | #include <linux/input.h> | 
 | 15 | #include <linux/serial_core.h> | 
 | 16 | #include <linux/serial_s3c.h> | 
 | 17 | #include <linux/platform_device.h> | 
 | 18 | #include <linux/io.h> | 
 | 19 | #include <linux/i2c.h> | 
 | 20 | #include <linux/leds.h> | 
 | 21 | #include <linux/fb.h> | 
 | 22 | #include <linux/gpio.h> | 
 | 23 | #include <linux/delay.h> | 
 | 24 | #include <linux/smsc911x.h> | 
 | 25 | #include <linux/regulator/fixed.h> | 
 | 26 | #include <linux/regulator/machine.h> | 
 | 27 | #include <linux/pwm.h> | 
 | 28 | #include <linux/pwm_backlight.h> | 
 | 29 | #include <linux/platform_data/s3c-hsotg.h> | 
 | 30 |  | 
 | 31 | #ifdef CONFIG_SMDK6410_WM1190_EV1 | 
 | 32 | #include <linux/mfd/wm8350/core.h> | 
 | 33 | #include <linux/mfd/wm8350/pmic.h> | 
 | 34 | #endif | 
 | 35 |  | 
 | 36 | #ifdef CONFIG_SMDK6410_WM1192_EV1 | 
 | 37 | #include <linux/mfd/wm831x/core.h> | 
 | 38 | #include <linux/mfd/wm831x/pdata.h> | 
 | 39 | #endif | 
 | 40 |  | 
 | 41 | #include <video/platform_lcd.h> | 
 | 42 | #include <video/samsung_fimd.h> | 
 | 43 |  | 
 | 44 | #include <asm/mach/arch.h> | 
 | 45 | #include <asm/mach/map.h> | 
 | 46 | #include <asm/mach/irq.h> | 
 | 47 |  | 
 | 48 | #include <mach/hardware.h> | 
 | 49 | #include <mach/irqs.h> | 
 | 50 | #include <mach/map.h> | 
 | 51 |  | 
 | 52 | #include <asm/irq.h> | 
 | 53 | #include <asm/mach-types.h> | 
 | 54 |  | 
 | 55 | #include <mach/regs-gpio.h> | 
 | 56 | #include <mach/gpio-samsung.h> | 
 | 57 | #include <linux/platform_data/ata-samsung_cf.h> | 
 | 58 | #include <linux/platform_data/i2c-s3c2410.h> | 
 | 59 | #include <plat/fb.h> | 
 | 60 | #include <plat/gpio-cfg.h> | 
 | 61 |  | 
 | 62 | #include <plat/devs.h> | 
 | 63 | #include <plat/cpu.h> | 
 | 64 | #include <plat/adc.h> | 
 | 65 | #include <linux/platform_data/touchscreen-s3c2410.h> | 
 | 66 | #include <plat/keypad.h> | 
 | 67 | #include <plat/samsung-time.h> | 
 | 68 |  | 
 | 69 | #include "backlight.h" | 
 | 70 | #include "common.h" | 
 | 71 | #include "regs-modem.h" | 
 | 72 | #include "regs-srom.h" | 
 | 73 | #include "regs-sys.h" | 
 | 74 |  | 
 | 75 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK | 
 | 76 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | 
 | 77 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | 
 | 78 |  | 
 | 79 | static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = { | 
 | 80 | 	[0] = { | 
 | 81 | 		.hwport	     = 0, | 
 | 82 | 		.flags	     = 0, | 
 | 83 | 		.ucon	     = UCON, | 
 | 84 | 		.ulcon	     = ULCON, | 
 | 85 | 		.ufcon	     = UFCON, | 
 | 86 | 	}, | 
 | 87 | 	[1] = { | 
 | 88 | 		.hwport	     = 1, | 
 | 89 | 		.flags	     = 0, | 
 | 90 | 		.ucon	     = UCON, | 
 | 91 | 		.ulcon	     = ULCON, | 
 | 92 | 		.ufcon	     = UFCON, | 
 | 93 | 	}, | 
 | 94 | 	[2] = { | 
 | 95 | 		.hwport	     = 2, | 
 | 96 | 		.flags	     = 0, | 
 | 97 | 		.ucon	     = UCON, | 
 | 98 | 		.ulcon	     = ULCON, | 
 | 99 | 		.ufcon	     = UFCON, | 
 | 100 | 	}, | 
 | 101 | 	[3] = { | 
 | 102 | 		.hwport	     = 3, | 
 | 103 | 		.flags	     = 0, | 
 | 104 | 		.ucon	     = UCON, | 
 | 105 | 		.ulcon	     = ULCON, | 
 | 106 | 		.ufcon	     = UFCON, | 
 | 107 | 	}, | 
 | 108 | }; | 
 | 109 |  | 
 | 110 | /* framebuffer and LCD setup. */ | 
 | 111 |  | 
 | 112 | /* GPF15 = LCD backlight control | 
 | 113 |  * GPF13 => Panel power | 
 | 114 |  * GPN5 = LCD nRESET signal | 
 | 115 |  * PWM_TOUT1 => backlight brightness | 
 | 116 |  */ | 
 | 117 |  | 
 | 118 | static void smdk6410_lcd_power_set(struct plat_lcd_data *pd, | 
 | 119 | 				   unsigned int power) | 
 | 120 | { | 
 | 121 | 	if (power) { | 
 | 122 | 		gpio_direction_output(S3C64XX_GPF(13), 1); | 
 | 123 |  | 
 | 124 | 		/* fire nRESET on power up */ | 
 | 125 | 		gpio_direction_output(S3C64XX_GPN(5), 0); | 
 | 126 | 		msleep(10); | 
 | 127 | 		gpio_direction_output(S3C64XX_GPN(5), 1); | 
 | 128 | 		msleep(1); | 
 | 129 | 	} else { | 
 | 130 | 		gpio_direction_output(S3C64XX_GPF(13), 0); | 
 | 131 | 	} | 
 | 132 | } | 
 | 133 |  | 
 | 134 | static struct plat_lcd_data smdk6410_lcd_power_data = { | 
 | 135 | 	.set_power	= smdk6410_lcd_power_set, | 
 | 136 | }; | 
 | 137 |  | 
 | 138 | static struct platform_device smdk6410_lcd_powerdev = { | 
 | 139 | 	.name			= "platform-lcd", | 
 | 140 | 	.dev.parent		= &s3c_device_fb.dev, | 
 | 141 | 	.dev.platform_data	= &smdk6410_lcd_power_data, | 
 | 142 | }; | 
 | 143 |  | 
 | 144 | static struct s3c_fb_pd_win smdk6410_fb_win0 = { | 
 | 145 | 	.max_bpp	= 32, | 
 | 146 | 	.default_bpp	= 16, | 
 | 147 | 	.xres		= 800, | 
 | 148 | 	.yres		= 480, | 
 | 149 | 	.virtual_y	= 480 * 2, | 
 | 150 | 	.virtual_x	= 800, | 
 | 151 | }; | 
 | 152 |  | 
 | 153 | static struct fb_videomode smdk6410_lcd_timing = { | 
 | 154 | 	.left_margin	= 8, | 
 | 155 | 	.right_margin	= 13, | 
 | 156 | 	.upper_margin	= 7, | 
 | 157 | 	.lower_margin	= 5, | 
 | 158 | 	.hsync_len	= 3, | 
 | 159 | 	.vsync_len	= 1, | 
 | 160 | 	.xres		= 800, | 
 | 161 | 	.yres		= 480, | 
 | 162 | }; | 
 | 163 |  | 
 | 164 | /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */ | 
 | 165 | static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = { | 
 | 166 | 	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp, | 
 | 167 | 	.vtiming	= &smdk6410_lcd_timing, | 
 | 168 | 	.win[0]		= &smdk6410_fb_win0, | 
 | 169 | 	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, | 
 | 170 | 	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, | 
 | 171 | }; | 
 | 172 |  | 
 | 173 | /* | 
 | 174 |  * Configuring Ethernet on SMDK6410 | 
 | 175 |  * | 
 | 176 |  * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6. | 
 | 177 |  * The constant address below corresponds to nCS1 | 
 | 178 |  * | 
 | 179 |  *  1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet" | 
 | 180 |  *  2) CFG6 needs to be switched to "LAN9115" side | 
 | 181 |  */ | 
 | 182 |  | 
 | 183 | static struct resource smdk6410_smsc911x_resources[] = { | 
 | 184 | 	[0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, SZ_64K), | 
 | 185 | 	[1] = DEFINE_RES_NAMED(S3C_EINT(10), 1, NULL, IORESOURCE_IRQ \ | 
 | 186 | 					| IRQ_TYPE_LEVEL_LOW), | 
 | 187 | }; | 
 | 188 |  | 
 | 189 | static struct smsc911x_platform_config smdk6410_smsc911x_pdata = { | 
 | 190 | 	.irq_polarity  = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | 
 | 191 | 	.irq_type      = SMSC911X_IRQ_TYPE_OPEN_DRAIN, | 
 | 192 | 	.flags         = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY, | 
 | 193 | 	.phy_interface = PHY_INTERFACE_MODE_MII, | 
 | 194 | }; | 
 | 195 |  | 
 | 196 |  | 
 | 197 | static struct platform_device smdk6410_smsc911x = { | 
 | 198 | 	.name          = "smsc911x", | 
 | 199 | 	.id            = -1, | 
 | 200 | 	.num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources), | 
 | 201 | 	.resource      = &smdk6410_smsc911x_resources[0], | 
 | 202 | 	.dev = { | 
 | 203 | 		.platform_data = &smdk6410_smsc911x_pdata, | 
 | 204 | 	}, | 
 | 205 | }; | 
 | 206 |  | 
 | 207 | #ifdef CONFIG_REGULATOR | 
 | 208 | static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = { | 
 | 209 | 	REGULATOR_SUPPLY("PVDD", "0-001b"), | 
 | 210 | 	REGULATOR_SUPPLY("AVDD", "0-001b"), | 
 | 211 | }; | 
 | 212 |  | 
 | 213 | static struct regulator_init_data __maybe_unused smdk6410_b_pwr_5v_data = { | 
 | 214 | 	.constraints = { | 
 | 215 | 		.always_on = 1, | 
 | 216 | 	}, | 
 | 217 | 	.num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers), | 
 | 218 | 	.consumer_supplies = smdk6410_b_pwr_5v_consumers, | 
 | 219 | }; | 
 | 220 |  | 
 | 221 | static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = { | 
 | 222 | 	.supply_name = "B_PWR_5V", | 
 | 223 | 	.microvolts = 5000000, | 
 | 224 | 	.init_data = &smdk6410_b_pwr_5v_data, | 
 | 225 | 	.gpio = -EINVAL, | 
 | 226 | }; | 
 | 227 |  | 
 | 228 | static struct platform_device smdk6410_b_pwr_5v = { | 
 | 229 | 	.name          = "reg-fixed-voltage", | 
 | 230 | 	.id            = -1, | 
 | 231 | 	.dev = { | 
 | 232 | 		.platform_data = &smdk6410_b_pwr_5v_pdata, | 
 | 233 | 	}, | 
 | 234 | }; | 
 | 235 | #endif | 
 | 236 |  | 
 | 237 | static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = { | 
 | 238 | 	.setup_gpio	= s3c64xx_ide_setup_gpio, | 
 | 239 | }; | 
 | 240 |  | 
 | 241 | static uint32_t smdk6410_keymap[] __initdata = { | 
 | 242 | 	/* KEY(row, col, keycode) */ | 
 | 243 | 	KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3), | 
 | 244 | 	KEY(0, 6, KEY_4), KEY(0, 7, KEY_5), | 
 | 245 | 	KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C), | 
 | 246 | 	KEY(1, 6, KEY_D), KEY(1, 7, KEY_E) | 
 | 247 | }; | 
 | 248 |  | 
 | 249 | static struct matrix_keymap_data smdk6410_keymap_data __initdata = { | 
 | 250 | 	.keymap		= smdk6410_keymap, | 
 | 251 | 	.keymap_size	= ARRAY_SIZE(smdk6410_keymap), | 
 | 252 | }; | 
 | 253 |  | 
 | 254 | static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = { | 
 | 255 | 	.keymap_data	= &smdk6410_keymap_data, | 
 | 256 | 	.rows		= 2, | 
 | 257 | 	.cols		= 8, | 
 | 258 | }; | 
 | 259 |  | 
 | 260 | static struct map_desc smdk6410_iodesc[] = {}; | 
 | 261 |  | 
 | 262 | static struct platform_device *smdk6410_devices[] __initdata = { | 
 | 263 | #ifdef CONFIG_SMDK6410_SD_CH0 | 
 | 264 | 	&s3c_device_hsmmc0, | 
 | 265 | #endif | 
 | 266 | #ifdef CONFIG_SMDK6410_SD_CH1 | 
 | 267 | 	&s3c_device_hsmmc1, | 
 | 268 | #endif | 
 | 269 | 	&s3c_device_i2c0, | 
 | 270 | 	&s3c_device_i2c1, | 
 | 271 | 	&s3c_device_fb, | 
 | 272 | 	&s3c_device_ohci, | 
 | 273 | 	&samsung_device_pwm, | 
 | 274 | 	&s3c_device_usb_hsotg, | 
 | 275 | 	&s3c64xx_device_iisv4, | 
 | 276 | 	&samsung_device_keypad, | 
 | 277 |  | 
 | 278 | #ifdef CONFIG_REGULATOR | 
 | 279 | 	&smdk6410_b_pwr_5v, | 
 | 280 | #endif | 
 | 281 | 	&smdk6410_lcd_powerdev, | 
 | 282 |  | 
 | 283 | 	&smdk6410_smsc911x, | 
 | 284 | 	&s3c_device_adc, | 
 | 285 | 	&s3c_device_cfcon, | 
 | 286 | 	&s3c_device_rtc, | 
 | 287 | 	&s3c_device_wdt, | 
 | 288 | }; | 
 | 289 |  | 
 | 290 | #ifdef CONFIG_REGULATOR | 
 | 291 | /* ARM core */ | 
 | 292 | static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = { | 
 | 293 | 	REGULATOR_SUPPLY("vddarm", NULL), | 
 | 294 | }; | 
 | 295 |  | 
 | 296 | /* VDDARM, BUCK1 on J5 */ | 
 | 297 | static struct regulator_init_data __maybe_unused smdk6410_vddarm = { | 
 | 298 | 	.constraints = { | 
 | 299 | 		.name = "PVDD_ARM", | 
 | 300 | 		.min_uV = 1000000, | 
 | 301 | 		.max_uV = 1300000, | 
 | 302 | 		.always_on = 1, | 
 | 303 | 		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | 
 | 304 | 	}, | 
 | 305 | 	.num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers), | 
 | 306 | 	.consumer_supplies = smdk6410_vddarm_consumers, | 
 | 307 | }; | 
 | 308 |  | 
 | 309 | /* VDD_INT, BUCK2 on J5 */ | 
 | 310 | static struct regulator_init_data __maybe_unused smdk6410_vddint = { | 
 | 311 | 	.constraints = { | 
 | 312 | 		.name = "PVDD_INT", | 
 | 313 | 		.min_uV = 1000000, | 
 | 314 | 		.max_uV = 1200000, | 
 | 315 | 		.always_on = 1, | 
 | 316 | 		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | 
 | 317 | 	}, | 
 | 318 | }; | 
 | 319 |  | 
 | 320 | /* VDD_HI, LDO3 on J5 */ | 
 | 321 | static struct regulator_init_data __maybe_unused smdk6410_vddhi = { | 
 | 322 | 	.constraints = { | 
 | 323 | 		.name = "PVDD_HI", | 
 | 324 | 		.always_on = 1, | 
 | 325 | 	}, | 
 | 326 | }; | 
 | 327 |  | 
 | 328 | /* VDD_PLL, LDO2 on J5 */ | 
 | 329 | static struct regulator_init_data __maybe_unused smdk6410_vddpll = { | 
 | 330 | 	.constraints = { | 
 | 331 | 		.name = "PVDD_PLL", | 
 | 332 | 		.always_on = 1, | 
 | 333 | 	}, | 
 | 334 | }; | 
 | 335 |  | 
 | 336 | /* VDD_UH_MMC, LDO5 on J5 */ | 
 | 337 | static struct regulator_init_data __maybe_unused smdk6410_vdduh_mmc = { | 
 | 338 | 	.constraints = { | 
 | 339 | 		.name = "PVDD_UH+PVDD_MMC", | 
 | 340 | 		.always_on = 1, | 
 | 341 | 	}, | 
 | 342 | }; | 
 | 343 |  | 
 | 344 | /* VCCM3BT, LDO8 on J5 */ | 
 | 345 | static struct regulator_init_data __maybe_unused smdk6410_vccmc3bt = { | 
 | 346 | 	.constraints = { | 
 | 347 | 		.name = "PVCCM3BT", | 
 | 348 | 		.always_on = 1, | 
 | 349 | 	}, | 
 | 350 | }; | 
 | 351 |  | 
 | 352 | /* VCCM2MTV, LDO11 on J5 */ | 
 | 353 | static struct regulator_init_data __maybe_unused smdk6410_vccm2mtv = { | 
 | 354 | 	.constraints = { | 
 | 355 | 		.name = "PVCCM2MTV", | 
 | 356 | 		.always_on = 1, | 
 | 357 | 	}, | 
 | 358 | }; | 
 | 359 |  | 
 | 360 | /* VDD_LCD, LDO12 on J5 */ | 
 | 361 | static struct regulator_init_data __maybe_unused smdk6410_vddlcd = { | 
 | 362 | 	.constraints = { | 
 | 363 | 		.name = "PVDD_LCD", | 
 | 364 | 		.always_on = 1, | 
 | 365 | 	}, | 
 | 366 | }; | 
 | 367 |  | 
 | 368 | /* VDD_OTGI, LDO9 on J5 */ | 
 | 369 | static struct regulator_init_data __maybe_unused smdk6410_vddotgi = { | 
 | 370 | 	.constraints = { | 
 | 371 | 		.name = "PVDD_OTGI", | 
 | 372 | 		.always_on = 1, | 
 | 373 | 	}, | 
 | 374 | }; | 
 | 375 |  | 
 | 376 | /* VDD_OTG, LDO14 on J5 */ | 
 | 377 | static struct regulator_init_data __maybe_unused smdk6410_vddotg = { | 
 | 378 | 	.constraints = { | 
 | 379 | 		.name = "PVDD_OTG", | 
 | 380 | 		.always_on = 1, | 
 | 381 | 	}, | 
 | 382 | }; | 
 | 383 |  | 
 | 384 | /* VDD_ALIVE, LDO15 on J5 */ | 
 | 385 | static struct regulator_init_data __maybe_unused smdk6410_vddalive = { | 
 | 386 | 	.constraints = { | 
 | 387 | 		.name = "PVDD_ALIVE", | 
 | 388 | 		.always_on = 1, | 
 | 389 | 	}, | 
 | 390 | }; | 
 | 391 |  | 
 | 392 | /* VDD_AUDIO, VLDO_AUDIO on J5 */ | 
 | 393 | static struct regulator_init_data __maybe_unused smdk6410_vddaudio = { | 
 | 394 | 	.constraints = { | 
 | 395 | 		.name = "PVDD_AUDIO", | 
 | 396 | 		.always_on = 1, | 
 | 397 | 	}, | 
 | 398 | }; | 
 | 399 | #endif | 
 | 400 |  | 
 | 401 | #ifdef CONFIG_SMDK6410_WM1190_EV1 | 
 | 402 | /* S3C64xx internal logic & PLL */ | 
 | 403 | static struct regulator_init_data __maybe_unused wm8350_dcdc1_data = { | 
 | 404 | 	.constraints = { | 
 | 405 | 		.name = "PVDD_INT+PVDD_PLL", | 
 | 406 | 		.min_uV = 1200000, | 
 | 407 | 		.max_uV = 1200000, | 
 | 408 | 		.always_on = 1, | 
 | 409 | 		.apply_uV = 1, | 
 | 410 | 	}, | 
 | 411 | }; | 
 | 412 |  | 
 | 413 | /* Memory */ | 
 | 414 | static struct regulator_init_data __maybe_unused wm8350_dcdc3_data = { | 
 | 415 | 	.constraints = { | 
 | 416 | 		.name = "PVDD_MEM", | 
 | 417 | 		.min_uV = 1800000, | 
 | 418 | 		.max_uV = 1800000, | 
 | 419 | 		.always_on = 1, | 
 | 420 | 		.state_mem = { | 
 | 421 | 			 .uV = 1800000, | 
 | 422 | 			 .mode = REGULATOR_MODE_NORMAL, | 
 | 423 | 			 .enabled = 1, | 
 | 424 | 		}, | 
 | 425 | 		.initial_state = PM_SUSPEND_MEM, | 
 | 426 | 	}, | 
 | 427 | }; | 
 | 428 |  | 
 | 429 | /* USB, EXT, PCM, ADC/DAC, USB, MMC */ | 
 | 430 | static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = { | 
 | 431 | 	REGULATOR_SUPPLY("DVDD", "0-001b"), | 
 | 432 | }; | 
 | 433 |  | 
 | 434 | static struct regulator_init_data __maybe_unused wm8350_dcdc4_data = { | 
 | 435 | 	.constraints = { | 
 | 436 | 		.name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV", | 
 | 437 | 		.min_uV = 3000000, | 
 | 438 | 		.max_uV = 3000000, | 
 | 439 | 		.always_on = 1, | 
 | 440 | 	}, | 
 | 441 | 	.num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers), | 
 | 442 | 	.consumer_supplies = wm8350_dcdc4_consumers, | 
 | 443 | }; | 
 | 444 |  | 
 | 445 | /* OTGi/1190-EV1 HPVDD & AVDD */ | 
 | 446 | static struct regulator_init_data __maybe_unused wm8350_ldo4_data = { | 
 | 447 | 	.constraints = { | 
 | 448 | 		.name = "PVDD_OTGI+HPVDD+AVDD", | 
 | 449 | 		.min_uV = 1200000, | 
 | 450 | 		.max_uV = 1200000, | 
 | 451 | 		.apply_uV = 1, | 
 | 452 | 		.always_on = 1, | 
 | 453 | 	}, | 
 | 454 | }; | 
 | 455 |  | 
 | 456 | static struct { | 
 | 457 | 	int regulator; | 
 | 458 | 	struct regulator_init_data *initdata; | 
 | 459 | } wm1190_regulators[] = { | 
 | 460 | 	{ WM8350_DCDC_1, &wm8350_dcdc1_data }, | 
 | 461 | 	{ WM8350_DCDC_3, &wm8350_dcdc3_data }, | 
 | 462 | 	{ WM8350_DCDC_4, &wm8350_dcdc4_data }, | 
 | 463 | 	{ WM8350_DCDC_6, &smdk6410_vddarm }, | 
 | 464 | 	{ WM8350_LDO_1, &smdk6410_vddalive }, | 
 | 465 | 	{ WM8350_LDO_2, &smdk6410_vddotg }, | 
 | 466 | 	{ WM8350_LDO_3, &smdk6410_vddlcd }, | 
 | 467 | 	{ WM8350_LDO_4, &wm8350_ldo4_data }, | 
 | 468 | }; | 
 | 469 |  | 
 | 470 | static int __init smdk6410_wm8350_init(struct wm8350 *wm8350) | 
 | 471 | { | 
 | 472 | 	int i; | 
 | 473 |  | 
 | 474 | 	/* Configure the IRQ line */ | 
 | 475 | 	s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP); | 
 | 476 |  | 
 | 477 | 	/* Instantiate the regulators */ | 
 | 478 | 	for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++) | 
 | 479 | 		wm8350_register_regulator(wm8350, | 
 | 480 | 					  wm1190_regulators[i].regulator, | 
 | 481 | 					  wm1190_regulators[i].initdata); | 
 | 482 |  | 
 | 483 | 	return 0; | 
 | 484 | } | 
 | 485 |  | 
 | 486 | static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = { | 
 | 487 | 	.init = smdk6410_wm8350_init, | 
 | 488 | 	.irq_high = 1, | 
 | 489 | 	.irq_base = IRQ_BOARD_START, | 
 | 490 | }; | 
 | 491 | #endif | 
 | 492 |  | 
 | 493 | #ifdef CONFIG_SMDK6410_WM1192_EV1 | 
 | 494 | static struct gpio_led wm1192_pmic_leds[] = { | 
 | 495 | 	{ | 
 | 496 | 		.name = "PMIC:red:power", | 
 | 497 | 		.gpio = GPIO_BOARD_START + 3, | 
 | 498 | 		.default_state = LEDS_GPIO_DEFSTATE_ON, | 
 | 499 | 	}, | 
 | 500 | }; | 
 | 501 |  | 
 | 502 | static struct gpio_led_platform_data wm1192_pmic_led = { | 
 | 503 | 	.num_leds = ARRAY_SIZE(wm1192_pmic_leds), | 
 | 504 | 	.leds = wm1192_pmic_leds, | 
 | 505 | }; | 
 | 506 |  | 
 | 507 | static struct platform_device wm1192_pmic_led_dev = { | 
 | 508 | 	.name          = "leds-gpio", | 
 | 509 | 	.id            = -1, | 
 | 510 | 	.dev = { | 
 | 511 | 		.platform_data = &wm1192_pmic_led, | 
 | 512 | 	}, | 
 | 513 | }; | 
 | 514 |  | 
 | 515 | static int wm1192_pre_init(struct wm831x *wm831x) | 
 | 516 | { | 
 | 517 | 	int ret; | 
 | 518 |  | 
 | 519 | 	/* Configure the IRQ line */ | 
 | 520 | 	s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP); | 
 | 521 |  | 
 | 522 | 	ret = platform_device_register(&wm1192_pmic_led_dev); | 
 | 523 | 	if (ret != 0) | 
 | 524 | 		dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret); | 
 | 525 |  | 
 | 526 | 	return 0; | 
 | 527 | } | 
 | 528 |  | 
 | 529 | static struct wm831x_backlight_pdata wm1192_backlight_pdata = { | 
 | 530 | 	.isink = 1, | 
 | 531 | 	.max_uA = 27554, | 
 | 532 | }; | 
 | 533 |  | 
 | 534 | static struct regulator_init_data __maybe_unused wm1192_dcdc3 = { | 
 | 535 | 	.constraints = { | 
 | 536 | 		.name = "PVDD_MEM+PVDD_GPS", | 
 | 537 | 		.always_on = 1, | 
 | 538 | 	}, | 
 | 539 | }; | 
 | 540 |  | 
 | 541 | static struct regulator_consumer_supply wm1192_ldo1_consumers[] = { | 
 | 542 | 	REGULATOR_SUPPLY("DVDD", "0-001b"),   /* WM8580 */ | 
 | 543 | }; | 
 | 544 |  | 
 | 545 | static struct regulator_init_data __maybe_unused wm1192_ldo1 = { | 
 | 546 | 	.constraints = { | 
 | 547 | 		.name = "PVDD_LCD+PVDD_EXT", | 
 | 548 | 		.always_on = 1, | 
 | 549 | 	}, | 
 | 550 | 	.consumer_supplies = wm1192_ldo1_consumers, | 
 | 551 | 	.num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers), | 
 | 552 | }; | 
 | 553 |  | 
 | 554 | static struct wm831x_status_pdata wm1192_led7_pdata = { | 
 | 555 | 	.name = "LED7:green:", | 
 | 556 | }; | 
 | 557 |  | 
 | 558 | static struct wm831x_status_pdata wm1192_led8_pdata = { | 
 | 559 | 	.name = "LED8:green:", | 
 | 560 | }; | 
 | 561 |  | 
 | 562 | static struct wm831x_pdata smdk6410_wm1192_pdata = { | 
 | 563 | 	.pre_init = wm1192_pre_init, | 
 | 564 |  | 
 | 565 | 	.backlight = &wm1192_backlight_pdata, | 
 | 566 | 	.dcdc = { | 
 | 567 | 		&smdk6410_vddarm,  /* DCDC1 */ | 
 | 568 | 		&smdk6410_vddint,  /* DCDC2 */ | 
 | 569 | 		&wm1192_dcdc3, | 
 | 570 | 	}, | 
 | 571 | 	.gpio_base = GPIO_BOARD_START, | 
 | 572 | 	.ldo = { | 
 | 573 | 		 &wm1192_ldo1,        /* LDO1 */ | 
 | 574 | 		 &smdk6410_vdduh_mmc, /* LDO2 */ | 
 | 575 | 		 NULL,                /* LDO3 NC */ | 
 | 576 | 		 &smdk6410_vddotgi,   /* LDO4 */ | 
 | 577 | 		 &smdk6410_vddotg,    /* LDO5 */ | 
 | 578 | 		 &smdk6410_vddhi,     /* LDO6 */ | 
 | 579 | 		 &smdk6410_vddaudio,  /* LDO7 */ | 
 | 580 | 		 &smdk6410_vccm2mtv,  /* LDO8 */ | 
 | 581 | 		 &smdk6410_vddpll,    /* LDO9 */ | 
 | 582 | 		 &smdk6410_vccmc3bt,  /* LDO10 */ | 
 | 583 | 		 &smdk6410_vddalive,  /* LDO11 */ | 
 | 584 | 	}, | 
 | 585 | 	.status = { | 
 | 586 | 		&wm1192_led7_pdata, | 
 | 587 | 		&wm1192_led8_pdata, | 
 | 588 | 	}, | 
 | 589 | }; | 
 | 590 | #endif | 
 | 591 |  | 
 | 592 | static struct i2c_board_info i2c_devs0[] __initdata = { | 
 | 593 | 	{ I2C_BOARD_INFO("24c08", 0x50), }, | 
 | 594 | 	{ I2C_BOARD_INFO("wm8580", 0x1b), }, | 
 | 595 |  | 
 | 596 | #ifdef CONFIG_SMDK6410_WM1192_EV1 | 
 | 597 | 	{ I2C_BOARD_INFO("wm8312", 0x34), | 
 | 598 | 	  .platform_data = &smdk6410_wm1192_pdata, | 
 | 599 | 	  .irq = S3C_EINT(12), | 
 | 600 | 	}, | 
 | 601 | #endif | 
 | 602 |  | 
 | 603 | #ifdef CONFIG_SMDK6410_WM1190_EV1 | 
 | 604 | 	{ I2C_BOARD_INFO("wm8350", 0x1a), | 
 | 605 | 	  .platform_data = &smdk6410_wm8350_pdata, | 
 | 606 | 	  .irq = S3C_EINT(12), | 
 | 607 | 	}, | 
 | 608 | #endif | 
 | 609 | }; | 
 | 610 |  | 
 | 611 | static struct i2c_board_info i2c_devs1[] __initdata = { | 
 | 612 | 	{ I2C_BOARD_INFO("24c128", 0x57), },	/* Samsung S524AD0XD1 */ | 
 | 613 | }; | 
 | 614 |  | 
 | 615 | /* LCD Backlight data */ | 
 | 616 | static struct samsung_bl_gpio_info smdk6410_bl_gpio_info = { | 
 | 617 | 	.no = S3C64XX_GPF(15), | 
 | 618 | 	.func = S3C_GPIO_SFN(2), | 
 | 619 | }; | 
 | 620 |  | 
 | 621 | static struct pwm_lookup smdk6410_pwm_lookup[] = { | 
 | 622 | 	PWM_LOOKUP("samsung-pwm", 1, "pwm-backlight.0", NULL, 78770, | 
 | 623 | 		   PWM_POLARITY_NORMAL), | 
 | 624 | }; | 
 | 625 |  | 
 | 626 | static struct platform_pwm_backlight_data smdk6410_bl_data = { | 
 | 627 | 	.enable_gpio = -1, | 
 | 628 | }; | 
 | 629 |  | 
 | 630 | static struct dwc2_hsotg_plat smdk6410_hsotg_pdata; | 
 | 631 |  | 
 | 632 | static void __init smdk6410_map_io(void) | 
 | 633 | { | 
 | 634 | 	u32 tmp; | 
 | 635 |  | 
 | 636 | 	s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc)); | 
 | 637 | 	s3c64xx_set_xtal_freq(12000000); | 
 | 638 | 	s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs)); | 
 | 639 | 	samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); | 
 | 640 |  | 
 | 641 | 	/* set the LCD type */ | 
 | 642 |  | 
 | 643 | 	tmp = __raw_readl(S3C64XX_SPCON); | 
 | 644 | 	tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK; | 
 | 645 | 	tmp |= S3C64XX_SPCON_LCD_SEL_RGB; | 
 | 646 | 	__raw_writel(tmp, S3C64XX_SPCON); | 
 | 647 |  | 
 | 648 | 	/* remove the lcd bypass */ | 
 | 649 | 	tmp = __raw_readl(S3C64XX_MODEM_MIFPCON); | 
 | 650 | 	tmp &= ~MIFPCON_LCD_BYPASS; | 
 | 651 | 	__raw_writel(tmp, S3C64XX_MODEM_MIFPCON); | 
 | 652 | } | 
 | 653 |  | 
 | 654 | static void __init smdk6410_machine_init(void) | 
 | 655 | { | 
 | 656 | 	u32 cs1; | 
 | 657 |  | 
 | 658 | 	s3c_i2c0_set_platdata(NULL); | 
 | 659 | 	s3c_i2c1_set_platdata(NULL); | 
 | 660 | 	s3c_fb_set_platdata(&smdk6410_lcd_pdata); | 
 | 661 | 	dwc2_hsotg_set_platdata(&smdk6410_hsotg_pdata); | 
 | 662 |  | 
 | 663 | 	samsung_keypad_set_platdata(&smdk6410_keypad_data); | 
 | 664 |  | 
 | 665 | 	s3c64xx_ts_set_platdata(NULL); | 
 | 666 |  | 
 | 667 | 	/* configure nCS1 width to 16 bits */ | 
 | 668 |  | 
 | 669 | 	cs1 = __raw_readl(S3C64XX_SROM_BW) & | 
 | 670 | 		    ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT); | 
 | 671 | 	cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) | | 
 | 672 | 		(1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) | | 
 | 673 | 		(1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) << | 
 | 674 | 						   S3C64XX_SROM_BW__NCS1__SHIFT; | 
 | 675 | 	__raw_writel(cs1, S3C64XX_SROM_BW); | 
 | 676 |  | 
 | 677 | 	/* set timing for nCS1 suitable for ethernet chip */ | 
 | 678 |  | 
 | 679 | 	__raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) | | 
 | 680 | 		     (6 << S3C64XX_SROM_BCX__TACP__SHIFT) | | 
 | 681 | 		     (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) | | 
 | 682 | 		     (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) | | 
 | 683 | 		     (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) | | 
 | 684 | 		     (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) | | 
 | 685 | 		     (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1); | 
 | 686 |  | 
 | 687 | 	gpio_request(S3C64XX_GPN(5), "LCD power"); | 
 | 688 | 	gpio_request(S3C64XX_GPF(13), "LCD power"); | 
 | 689 |  | 
 | 690 | 	i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); | 
 | 691 | 	i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); | 
 | 692 |  | 
 | 693 | 	s3c_ide_set_platdata(&smdk6410_ide_pdata); | 
 | 694 |  | 
 | 695 | 	platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices)); | 
 | 696 |  | 
 | 697 | 	pwm_add_table(smdk6410_pwm_lookup, ARRAY_SIZE(smdk6410_pwm_lookup)); | 
 | 698 | 	samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data); | 
 | 699 | } | 
 | 700 |  | 
 | 701 | MACHINE_START(SMDK6410, "SMDK6410") | 
 | 702 | 	/* Maintainer: Ben Dooks <ben-linux@fluff.org> */ | 
 | 703 | 	.atag_offset	= 0x100, | 
 | 704 | 	.nr_irqs	= S3C64XX_NR_IRQS, | 
 | 705 | 	.init_irq	= s3c6410_init_irq, | 
 | 706 | 	.map_io		= smdk6410_map_io, | 
 | 707 | 	.init_machine	= smdk6410_machine_init, | 
 | 708 | 	.init_time	= samsung_timer_init, | 
 | 709 | 	.restart	= s3c64xx_restart, | 
 | 710 | MACHINE_END |