| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | /* | 
 | 2 |  * Copyright 2014 Oleksij Rempel <linux@rempel-privat.de> | 
 | 3 |  * | 
 | 4 |  * This software is licensed under the terms of the GNU General Public | 
 | 5 |  * License version 2, as published by the Free Software Foundation, and | 
 | 6 |  * may be copied, distributed, and modified under those terms. | 
 | 7 |  * | 
 | 8 |  * This program is distributed in the hope that it will be useful, | 
 | 9 |  * but WITHOUT ANY WARRANTY; without even the implied warranty of | 
 | 10 |  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the | 
 | 11 |  * GNU General Public License for more details. | 
 | 12 |  */ | 
 | 13 |  | 
 | 14 | #ifndef _DT_BINDINGS_CLK_ASM9260_H | 
 | 15 | #define _DT_BINDINGS_CLK_ASM9260_H | 
 | 16 |  | 
 | 17 | /* ahb gate */ | 
 | 18 | #define CLKID_AHB_ROM		0 | 
 | 19 | #define CLKID_AHB_RAM		1 | 
 | 20 | #define CLKID_AHB_GPIO		2 | 
 | 21 | #define CLKID_AHB_MAC		3 | 
 | 22 | #define CLKID_AHB_EMI		4 | 
 | 23 | #define CLKID_AHB_USB0		5 | 
 | 24 | #define CLKID_AHB_USB1		6 | 
 | 25 | #define CLKID_AHB_DMA0		7 | 
 | 26 | #define CLKID_AHB_DMA1		8 | 
 | 27 | #define CLKID_AHB_UART0		9 | 
 | 28 | #define CLKID_AHB_UART1		10 | 
 | 29 | #define CLKID_AHB_UART2		11 | 
 | 30 | #define CLKID_AHB_UART3		12 | 
 | 31 | #define CLKID_AHB_UART4		13 | 
 | 32 | #define CLKID_AHB_UART5		14 | 
 | 33 | #define CLKID_AHB_UART6		15 | 
 | 34 | #define CLKID_AHB_UART7		16 | 
 | 35 | #define CLKID_AHB_UART8		17 | 
 | 36 | #define CLKID_AHB_UART9		18 | 
 | 37 | #define CLKID_AHB_I2S0		19 | 
 | 38 | #define CLKID_AHB_I2C0		20 | 
 | 39 | #define CLKID_AHB_I2C1		21 | 
 | 40 | #define CLKID_AHB_SSP0		22 | 
 | 41 | #define CLKID_AHB_IOCONFIG	23 | 
 | 42 | #define CLKID_AHB_WDT		24 | 
 | 43 | #define CLKID_AHB_CAN0		25 | 
 | 44 | #define CLKID_AHB_CAN1		26 | 
 | 45 | #define CLKID_AHB_MPWM		27 | 
 | 46 | #define CLKID_AHB_SPI0		28 | 
 | 47 | #define CLKID_AHB_SPI1		29 | 
 | 48 | #define CLKID_AHB_QEI		30 | 
 | 49 | #define CLKID_AHB_QUADSPI0	31 | 
 | 50 | #define CLKID_AHB_CAMIF		32 | 
 | 51 | #define CLKID_AHB_LCDIF		33 | 
 | 52 | #define CLKID_AHB_TIMER0	34 | 
 | 53 | #define CLKID_AHB_TIMER1	35 | 
 | 54 | #define CLKID_AHB_TIMER2	36 | 
 | 55 | #define CLKID_AHB_TIMER3	37 | 
 | 56 | #define CLKID_AHB_IRQ		38 | 
 | 57 | #define CLKID_AHB_RTC		39 | 
 | 58 | #define CLKID_AHB_NAND		40 | 
 | 59 | #define CLKID_AHB_ADC0		41 | 
 | 60 | #define CLKID_AHB_LED		42 | 
 | 61 | #define CLKID_AHB_DAC0		43 | 
 | 62 | #define CLKID_AHB_LCD		44 | 
 | 63 | #define CLKID_AHB_I2S1		45 | 
 | 64 | #define CLKID_AHB_MAC1		46 | 
 | 65 |  | 
 | 66 | /* devider */ | 
 | 67 | #define CLKID_SYS_CPU		47 | 
 | 68 | #define CLKID_SYS_AHB		48 | 
 | 69 | #define CLKID_SYS_I2S0M		49 | 
 | 70 | #define CLKID_SYS_I2S0S		50 | 
 | 71 | #define CLKID_SYS_I2S1M		51 | 
 | 72 | #define CLKID_SYS_I2S1S		52 | 
 | 73 | #define CLKID_SYS_UART0		53 | 
 | 74 | #define CLKID_SYS_UART1		54 | 
 | 75 | #define CLKID_SYS_UART2		55 | 
 | 76 | #define CLKID_SYS_UART3		56 | 
 | 77 | #define CLKID_SYS_UART4		56 | 
 | 78 | #define CLKID_SYS_UART5		57 | 
 | 79 | #define CLKID_SYS_UART6		58 | 
 | 80 | #define CLKID_SYS_UART7		59 | 
 | 81 | #define CLKID_SYS_UART8		60 | 
 | 82 | #define CLKID_SYS_UART9		61 | 
 | 83 | #define CLKID_SYS_SPI0		62 | 
 | 84 | #define CLKID_SYS_SPI1		63 | 
 | 85 | #define CLKID_SYS_QUADSPI	64 | 
 | 86 | #define CLKID_SYS_SSP0		65 | 
 | 87 | #define CLKID_SYS_NAND		66 | 
 | 88 | #define CLKID_SYS_TRACE		67 | 
 | 89 | #define CLKID_SYS_CAMM		68 | 
 | 90 | #define CLKID_SYS_WDT		69 | 
 | 91 | #define CLKID_SYS_CLKOUT	70 | 
 | 92 | #define CLKID_SYS_MAC		71 | 
 | 93 | #define CLKID_SYS_LCD		72 | 
 | 94 | #define CLKID_SYS_ADCANA	73 | 
 | 95 |  | 
 | 96 | #define MAX_CLKS		74 | 
 | 97 | #endif |