| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | /* |
| 2 | * OMAP3/4 Voltage Controller (VC) structure and macro definitions |
| 3 | * |
| 4 | * Copyright (C) 2007, 2010 Texas Instruments, Inc. |
| 5 | * Rajendra Nayak <rnayak@ti.com> |
| 6 | * Lesly A M <x0080970@ti.com> |
| 7 | * Thara Gopinath <thara@ti.com> |
| 8 | * |
| 9 | * Copyright (C) 2008, 2011 Nokia Corporation |
| 10 | * Kalle Jokiniemi |
| 11 | * Paul Walmsley |
| 12 | * |
| 13 | * This program is free software; you can redistribute it and/or |
| 14 | * modify it under the terms of the GNU General Public License version |
| 15 | * 2 as published by the Free Software Foundation. |
| 16 | */ |
| 17 | #ifndef __ARCH_ARM_MACH_OMAP2_VC_H |
| 18 | #define __ARCH_ARM_MACH_OMAP2_VC_H |
| 19 | |
| 20 | #include <linux/kernel.h> |
| 21 | |
| 22 | struct voltagedomain; |
| 23 | |
| 24 | /** |
| 25 | * struct omap_vc_common - per-VC register/bitfield data |
| 26 | * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register |
| 27 | * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register |
| 28 | * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start |
| 29 | * @data_shift: DATA field shift in PRM_VC_BYPASS_VAL register |
| 30 | * @slaveaddr_shift: SLAVEADDR field shift in PRM_VC_BYPASS_VAL register |
| 31 | * @regaddr_shift: REGADDR field shift in PRM_VC_BYPASS_VAL register |
| 32 | * @cmd_on_shift: ON field shift in PRM_VC_CMD_VAL_* register |
| 33 | * @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register |
| 34 | * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register |
| 35 | * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register |
| 36 | * @i2c_cfg_reg: I2C configuration register offset |
| 37 | * @i2c_cfg_clear_mask: high-speed mode bit clear mask in I2C config register |
| 38 | * @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register |
| 39 | * @i2c_mcode_mask: MCODE field mask for I2C config register |
| 40 | * |
| 41 | * XXX One of cmd_on_mask and cmd_on_shift are not needed |
| 42 | * XXX VALID should probably be a shift, not a mask |
| 43 | */ |
| 44 | struct omap_vc_common { |
| 45 | u32 cmd_on_mask; |
| 46 | u32 valid; |
| 47 | u8 bypass_val_reg; |
| 48 | u8 data_shift; |
| 49 | u8 slaveaddr_shift; |
| 50 | u8 regaddr_shift; |
| 51 | u8 cmd_on_shift; |
| 52 | u8 cmd_onlp_shift; |
| 53 | u8 cmd_ret_shift; |
| 54 | u8 cmd_off_shift; |
| 55 | u8 i2c_cfg_reg; |
| 56 | u8 i2c_cfg_clear_mask; |
| 57 | u8 i2c_cfg_hsen_mask; |
| 58 | u8 i2c_mcode_mask; |
| 59 | }; |
| 60 | |
| 61 | /* omap_vc_channel.flags values */ |
| 62 | #define OMAP_VC_CHANNEL_DEFAULT BIT(0) |
| 63 | #define OMAP_VC_CHANNEL_CFG_MUTANT BIT(1) |
| 64 | |
| 65 | /** |
| 66 | * struct omap_vc_channel - VC per-instance data |
| 67 | * @i2c_slave_addr: I2C slave address of PMIC for this VC channel |
| 68 | * @volt_reg_addr: voltage configuration register address |
| 69 | * @cmd_reg_addr: command configuration register address |
| 70 | * @setup_time: setup time (in sys_clk cycles) of regulator for this channel |
| 71 | * @cfg_channel: current value of VC channel configuration register |
| 72 | * @i2c_high_speed: whether or not to use I2C high-speed mode |
| 73 | * |
| 74 | * @common: pointer to VC common data for this platform |
| 75 | * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register |
| 76 | * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register |
| 77 | * @smps_cmdra_mask: CMDRA* bitmask in the PRM_VC_CMD_RA register |
| 78 | * @cmdval_reg: register for on/ret/off voltage level values for this channel |
| 79 | * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start |
| 80 | * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start |
| 81 | * @smps_cmdra_reg: Offset of PRM_VC_SMPS_CMD_RA reg from PRM start |
| 82 | * @cfg_channel_reg: VC channel configuration register |
| 83 | * @cfg_channel_sa_shift: bit shift for slave address cfg_channel register |
| 84 | * @flags: VC channel-specific flags (optional) |
| 85 | */ |
| 86 | struct omap_vc_channel { |
| 87 | /* channel state */ |
| 88 | u16 i2c_slave_addr; |
| 89 | u16 volt_reg_addr; |
| 90 | u16 cmd_reg_addr; |
| 91 | u8 cfg_channel; |
| 92 | bool i2c_high_speed; |
| 93 | |
| 94 | /* register access data */ |
| 95 | const struct omap_vc_common *common; |
| 96 | u32 smps_sa_mask; |
| 97 | u32 smps_volra_mask; |
| 98 | u32 smps_cmdra_mask; |
| 99 | u8 cmdval_reg; |
| 100 | u8 smps_sa_reg; |
| 101 | u8 smps_volra_reg; |
| 102 | u8 smps_cmdra_reg; |
| 103 | u8 cfg_channel_reg; |
| 104 | u8 cfg_channel_sa_shift; |
| 105 | u8 flags; |
| 106 | }; |
| 107 | |
| 108 | extern struct omap_vc_channel omap3_vc_mpu; |
| 109 | extern struct omap_vc_channel omap3_vc_core; |
| 110 | |
| 111 | extern struct omap_vc_channel omap4_vc_mpu; |
| 112 | extern struct omap_vc_channel omap4_vc_iva; |
| 113 | extern struct omap_vc_channel omap4_vc_core; |
| 114 | |
| 115 | extern struct omap_vc_param omap3_mpu_vc_data; |
| 116 | extern struct omap_vc_param omap3_core_vc_data; |
| 117 | |
| 118 | extern struct omap_vc_param omap4_mpu_vc_data; |
| 119 | extern struct omap_vc_param omap4_iva_vc_data; |
| 120 | extern struct omap_vc_param omap4_core_vc_data; |
| 121 | |
| 122 | void omap3_vc_set_pmic_signaling(int core_next_state); |
| 123 | |
| 124 | |
| 125 | void omap_vc_init_channel(struct voltagedomain *voltdm); |
| 126 | int omap_vc_pre_scale(struct voltagedomain *voltdm, |
| 127 | unsigned long target_volt, |
| 128 | u8 *target_vsel, u8 *current_vsel); |
| 129 | void omap_vc_post_scale(struct voltagedomain *voltdm, |
| 130 | unsigned long target_volt, |
| 131 | u8 target_vsel, u8 current_vsel); |
| 132 | int omap_vc_bypass_scale(struct voltagedomain *voltdm, |
| 133 | unsigned long target_volt); |
| 134 | |
| 135 | #endif |
| 136 | |