| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | /** | 
 | 2 |  * omap-usb-tll.c - The USB TLL driver for OMAP EHCI & OHCI | 
 | 3 |  * | 
 | 4 |  * Copyright (C) 2012-2013 Texas Instruments Incorporated - http://www.ti.com | 
 | 5 |  * Author: Keshava Munegowda <keshava_mgowda@ti.com> | 
 | 6 |  * Author: Roger Quadros <rogerq@ti.com> | 
 | 7 |  * | 
 | 8 |  * This program is free software: you can redistribute it and/or modify | 
 | 9 |  * it under the terms of the GNU General Public License version 2  of | 
 | 10 |  * the License as published by the Free Software Foundation. | 
 | 11 |  * | 
 | 12 |  * This program is distributed in the hope that it will be useful, | 
 | 13 |  * but WITHOUT ANY WARRANTY; without even the implied warranty of | 
 | 14 |  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the | 
 | 15 |  * GNU General Public License for more details. | 
 | 16 |  * | 
 | 17 |  * You should have received a copy of the GNU General Public License | 
 | 18 |  * along with this program.  If not, see <http://www.gnu.org/licenses/>. | 
 | 19 |  */ | 
 | 20 | #include <linux/kernel.h> | 
 | 21 | #include <linux/module.h> | 
 | 22 | #include <linux/types.h> | 
 | 23 | #include <linux/slab.h> | 
 | 24 | #include <linux/spinlock.h> | 
 | 25 | #include <linux/platform_device.h> | 
 | 26 | #include <linux/clk.h> | 
 | 27 | #include <linux/io.h> | 
 | 28 | #include <linux/err.h> | 
 | 29 | #include <linux/pm_runtime.h> | 
 | 30 | #include <linux/platform_data/usb-omap.h> | 
 | 31 | #include <linux/of.h> | 
 | 32 |  | 
 | 33 | #include "omap-usb.h" | 
 | 34 |  | 
 | 35 | #define USBTLL_DRIVER_NAME	"usbhs_tll" | 
 | 36 |  | 
 | 37 | /* TLL Register Set */ | 
 | 38 | #define	OMAP_USBTLL_REVISION				(0x00) | 
 | 39 | #define	OMAP_USBTLL_SYSCONFIG				(0x10) | 
 | 40 | #define	OMAP_USBTLL_SYSCONFIG_CACTIVITY			(1 << 8) | 
 | 41 | #define	OMAP_USBTLL_SYSCONFIG_SIDLEMODE			(1 << 3) | 
 | 42 | #define	OMAP_USBTLL_SYSCONFIG_ENAWAKEUP			(1 << 2) | 
 | 43 | #define	OMAP_USBTLL_SYSCONFIG_SOFTRESET			(1 << 1) | 
 | 44 | #define	OMAP_USBTLL_SYSCONFIG_AUTOIDLE			(1 << 0) | 
 | 45 |  | 
 | 46 | #define	OMAP_USBTLL_SYSSTATUS				(0x14) | 
 | 47 | #define	OMAP_USBTLL_SYSSTATUS_RESETDONE			(1 << 0) | 
 | 48 |  | 
 | 49 | #define	OMAP_USBTLL_IRQSTATUS				(0x18) | 
 | 50 | #define	OMAP_USBTLL_IRQENABLE				(0x1C) | 
 | 51 |  | 
 | 52 | #define	OMAP_TLL_SHARED_CONF				(0x30) | 
 | 53 | #define	OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN		(1 << 6) | 
 | 54 | #define	OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN		(1 << 5) | 
 | 55 | #define	OMAP_TLL_SHARED_CONF_USB_DIVRATION		(1 << 2) | 
 | 56 | #define	OMAP_TLL_SHARED_CONF_FCLK_REQ			(1 << 1) | 
 | 57 | #define	OMAP_TLL_SHARED_CONF_FCLK_IS_ON			(1 << 0) | 
 | 58 |  | 
 | 59 | #define	OMAP_TLL_CHANNEL_CONF(num)			(0x040 + 0x004 * num) | 
 | 60 | #define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT		24 | 
 | 61 | #define OMAP_TLL_CHANNEL_CONF_DRVVBUS			(1 << 16) | 
 | 62 | #define OMAP_TLL_CHANNEL_CONF_CHRGVBUS			(1 << 15) | 
 | 63 | #define	OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF		(1 << 11) | 
 | 64 | #define	OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE		(1 << 10) | 
 | 65 | #define	OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE		(1 << 9) | 
 | 66 | #define	OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE		(1 << 8) | 
 | 67 | #define OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI	(2 << 1) | 
 | 68 | #define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS		(1 << 1) | 
 | 69 | #define	OMAP_TLL_CHANNEL_CONF_CHANEN			(1 << 0) | 
 | 70 |  | 
 | 71 | #define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0		0x0 | 
 | 72 | #define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM		0x1 | 
 | 73 | #define OMAP_TLL_FSLSMODE_3PIN_PHY			0x2 | 
 | 74 | #define OMAP_TLL_FSLSMODE_4PIN_PHY			0x3 | 
 | 75 | #define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0		0x4 | 
 | 76 | #define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM		0x5 | 
 | 77 | #define OMAP_TLL_FSLSMODE_3PIN_TLL			0x6 | 
 | 78 | #define OMAP_TLL_FSLSMODE_4PIN_TLL			0x7 | 
 | 79 | #define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0		0xA | 
 | 80 | #define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM		0xB | 
 | 81 |  | 
 | 82 | #define	OMAP_TLL_ULPI_FUNCTION_CTRL(num)		(0x804 + 0x100 * num) | 
 | 83 | #define	OMAP_TLL_ULPI_INTERFACE_CTRL(num)		(0x807 + 0x100 * num) | 
 | 84 | #define	OMAP_TLL_ULPI_OTG_CTRL(num)			(0x80A + 0x100 * num) | 
 | 85 | #define	OMAP_TLL_ULPI_INT_EN_RISE(num)			(0x80D + 0x100 * num) | 
 | 86 | #define	OMAP_TLL_ULPI_INT_EN_FALL(num)			(0x810 + 0x100 * num) | 
 | 87 | #define	OMAP_TLL_ULPI_INT_STATUS(num)			(0x813 + 0x100 * num) | 
 | 88 | #define	OMAP_TLL_ULPI_INT_LATCH(num)			(0x814 + 0x100 * num) | 
 | 89 | #define	OMAP_TLL_ULPI_DEBUG(num)			(0x815 + 0x100 * num) | 
 | 90 | #define	OMAP_TLL_ULPI_SCRATCH_REGISTER(num)		(0x816 + 0x100 * num) | 
 | 91 |  | 
 | 92 | #define OMAP_REV2_TLL_CHANNEL_COUNT			2 | 
 | 93 | #define OMAP_TLL_CHANNEL_COUNT				3 | 
 | 94 | #define OMAP_TLL_CHANNEL_1_EN_MASK			(1 << 0) | 
 | 95 | #define OMAP_TLL_CHANNEL_2_EN_MASK			(1 << 1) | 
 | 96 | #define OMAP_TLL_CHANNEL_3_EN_MASK			(1 << 2) | 
 | 97 |  | 
 | 98 | /* Values of USBTLL_REVISION - Note: these are not given in the TRM */ | 
 | 99 | #define OMAP_USBTLL_REV1		0x00000015	/* OMAP3 */ | 
 | 100 | #define OMAP_USBTLL_REV2		0x00000018	/* OMAP 3630 */ | 
 | 101 | #define OMAP_USBTLL_REV3		0x00000004	/* OMAP4 */ | 
 | 102 | #define OMAP_USBTLL_REV4		0x00000006	/* OMAP5 */ | 
 | 103 |  | 
 | 104 | #define is_ehci_tll_mode(x)	(x == OMAP_EHCI_PORT_MODE_TLL) | 
 | 105 |  | 
 | 106 | /* only PHY and UNUSED modes don't need TLL */ | 
 | 107 | #define omap_usb_mode_needs_tll(x)	((x) != OMAP_USBHS_PORT_MODE_UNUSED &&\ | 
 | 108 | 					 (x) != OMAP_EHCI_PORT_MODE_PHY) | 
 | 109 |  | 
 | 110 | struct usbtll_omap { | 
 | 111 | 	void __iomem	*base; | 
 | 112 | 	int		nch;		/* num. of channels */ | 
 | 113 | 	struct clk	*ch_clk[0];	/* must be the last member */ | 
 | 114 | }; | 
 | 115 |  | 
 | 116 | /*-------------------------------------------------------------------------*/ | 
 | 117 |  | 
 | 118 | static const char usbtll_driver_name[] = USBTLL_DRIVER_NAME; | 
 | 119 | static struct device	*tll_dev; | 
 | 120 | static DEFINE_SPINLOCK(tll_lock);	/* serialize access to tll_dev */ | 
 | 121 |  | 
 | 122 | /*-------------------------------------------------------------------------*/ | 
 | 123 |  | 
 | 124 | static inline void usbtll_write(void __iomem *base, u32 reg, u32 val) | 
 | 125 | { | 
 | 126 | 	writel_relaxed(val, base + reg); | 
 | 127 | } | 
 | 128 |  | 
 | 129 | static inline u32 usbtll_read(void __iomem *base, u32 reg) | 
 | 130 | { | 
 | 131 | 	return readl_relaxed(base + reg); | 
 | 132 | } | 
 | 133 |  | 
 | 134 | static inline void usbtll_writeb(void __iomem *base, u32 reg, u8 val) | 
 | 135 | { | 
 | 136 | 	writeb_relaxed(val, base + reg); | 
 | 137 | } | 
 | 138 |  | 
 | 139 | static inline u8 usbtll_readb(void __iomem *base, u32 reg) | 
 | 140 | { | 
 | 141 | 	return readb_relaxed(base + reg); | 
 | 142 | } | 
 | 143 |  | 
 | 144 | /*-------------------------------------------------------------------------*/ | 
 | 145 |  | 
 | 146 | static bool is_ohci_port(enum usbhs_omap_port_mode pmode) | 
 | 147 | { | 
 | 148 | 	switch (pmode) { | 
 | 149 | 	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: | 
 | 150 | 	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM: | 
 | 151 | 	case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0: | 
 | 152 | 	case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM: | 
 | 153 | 	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0: | 
 | 154 | 	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM: | 
 | 155 | 	case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0: | 
 | 156 | 	case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM: | 
 | 157 | 	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0: | 
 | 158 | 	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM: | 
 | 159 | 		return true; | 
 | 160 |  | 
 | 161 | 	default: | 
 | 162 | 		return false; | 
 | 163 | 	} | 
 | 164 | } | 
 | 165 |  | 
 | 166 | /* | 
 | 167 |  * convert the port-mode enum to a value we can use in the FSLSMODE | 
 | 168 |  * field of USBTLL_CHANNEL_CONF | 
 | 169 |  */ | 
 | 170 | static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode) | 
 | 171 | { | 
 | 172 | 	switch (mode) { | 
 | 173 | 	case OMAP_USBHS_PORT_MODE_UNUSED: | 
 | 174 | 	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: | 
 | 175 | 		return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0; | 
 | 176 |  | 
 | 177 | 	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM: | 
 | 178 | 		return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM; | 
 | 179 |  | 
 | 180 | 	case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0: | 
 | 181 | 		return OMAP_TLL_FSLSMODE_3PIN_PHY; | 
 | 182 |  | 
 | 183 | 	case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM: | 
 | 184 | 		return OMAP_TLL_FSLSMODE_4PIN_PHY; | 
 | 185 |  | 
 | 186 | 	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0: | 
 | 187 | 		return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0; | 
 | 188 |  | 
 | 189 | 	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM: | 
 | 190 | 		return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM; | 
 | 191 |  | 
 | 192 | 	case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0: | 
 | 193 | 		return OMAP_TLL_FSLSMODE_3PIN_TLL; | 
 | 194 |  | 
 | 195 | 	case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM: | 
 | 196 | 		return OMAP_TLL_FSLSMODE_4PIN_TLL; | 
 | 197 |  | 
 | 198 | 	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0: | 
 | 199 | 		return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0; | 
 | 200 |  | 
 | 201 | 	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM: | 
 | 202 | 		return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM; | 
 | 203 | 	default: | 
 | 204 | 		pr_warn("Invalid port mode, using default\n"); | 
 | 205 | 		return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0; | 
 | 206 | 	} | 
 | 207 | } | 
 | 208 |  | 
 | 209 | /** | 
 | 210 |  * usbtll_omap_probe - initialize TI-based HCDs | 
 | 211 |  * | 
 | 212 |  * Allocates basic resources for this USB host controller. | 
 | 213 |  */ | 
 | 214 | static int usbtll_omap_probe(struct platform_device *pdev) | 
 | 215 | { | 
 | 216 | 	struct device				*dev =  &pdev->dev; | 
 | 217 | 	struct resource				*res; | 
 | 218 | 	struct usbtll_omap			*tll; | 
 | 219 | 	void __iomem				*base; | 
 | 220 | 	int					i, nch, ver; | 
 | 221 |  | 
 | 222 | 	dev_dbg(dev, "starting TI HSUSB TLL Controller\n"); | 
 | 223 |  | 
 | 224 | 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 
 | 225 | 	base = devm_ioremap_resource(dev, res); | 
 | 226 | 	if (IS_ERR(base)) | 
 | 227 | 		return PTR_ERR(base); | 
 | 228 |  | 
 | 229 | 	pm_runtime_enable(dev); | 
 | 230 | 	pm_runtime_get_sync(dev); | 
 | 231 |  | 
 | 232 | 	ver = usbtll_read(base, OMAP_USBTLL_REVISION); | 
 | 233 | 	switch (ver) { | 
 | 234 | 	case OMAP_USBTLL_REV1: | 
 | 235 | 	case OMAP_USBTLL_REV4: | 
 | 236 | 		nch = OMAP_TLL_CHANNEL_COUNT; | 
 | 237 | 		break; | 
 | 238 | 	case OMAP_USBTLL_REV2: | 
 | 239 | 	case OMAP_USBTLL_REV3: | 
 | 240 | 		nch = OMAP_REV2_TLL_CHANNEL_COUNT; | 
 | 241 | 		break; | 
 | 242 | 	default: | 
 | 243 | 		nch = OMAP_TLL_CHANNEL_COUNT; | 
 | 244 | 		dev_dbg(dev, "rev 0x%x not recognized, assuming %d channels\n", | 
 | 245 | 			ver, nch); | 
 | 246 | 		break; | 
 | 247 | 	} | 
 | 248 |  | 
 | 249 | 	tll = devm_kzalloc(dev, sizeof(*tll) + sizeof(tll->ch_clk[nch]), | 
 | 250 | 			   GFP_KERNEL); | 
 | 251 | 	if (!tll) { | 
 | 252 | 		pm_runtime_put_sync(dev); | 
 | 253 | 		pm_runtime_disable(dev); | 
 | 254 | 		return -ENOMEM; | 
 | 255 | 	} | 
 | 256 |  | 
 | 257 | 	tll->base = base; | 
 | 258 | 	tll->nch = nch; | 
 | 259 | 	platform_set_drvdata(pdev, tll); | 
 | 260 |  | 
 | 261 | 	for (i = 0; i < nch; i++) { | 
 | 262 | 		char clkname[] = "usb_tll_hs_usb_chx_clk"; | 
 | 263 |  | 
 | 264 | 		snprintf(clkname, sizeof(clkname), | 
 | 265 | 					"usb_tll_hs_usb_ch%d_clk", i); | 
 | 266 | 		tll->ch_clk[i] = clk_get(dev, clkname); | 
 | 267 |  | 
 | 268 | 		if (IS_ERR(tll->ch_clk[i])) | 
 | 269 | 			dev_dbg(dev, "can't get clock : %s\n", clkname); | 
 | 270 | 		else | 
 | 271 | 			clk_prepare(tll->ch_clk[i]); | 
 | 272 | 	} | 
 | 273 |  | 
 | 274 | 	pm_runtime_put_sync(dev); | 
 | 275 | 	/* only after this can omap_tll_enable/disable work */ | 
 | 276 | 	spin_lock(&tll_lock); | 
 | 277 | 	tll_dev = dev; | 
 | 278 | 	spin_unlock(&tll_lock); | 
 | 279 |  | 
 | 280 | 	return 0; | 
 | 281 | } | 
 | 282 |  | 
 | 283 | /** | 
 | 284 |  * usbtll_omap_remove - shutdown processing for UHH & TLL HCDs | 
 | 285 |  * @pdev: USB Host Controller being removed | 
 | 286 |  * | 
 | 287 |  * Reverses the effect of usbtll_omap_probe(). | 
 | 288 |  */ | 
 | 289 | static int usbtll_omap_remove(struct platform_device *pdev) | 
 | 290 | { | 
 | 291 | 	struct usbtll_omap *tll = platform_get_drvdata(pdev); | 
 | 292 | 	int i; | 
 | 293 |  | 
 | 294 | 	spin_lock(&tll_lock); | 
 | 295 | 	tll_dev = NULL; | 
 | 296 | 	spin_unlock(&tll_lock); | 
 | 297 |  | 
 | 298 | 	for (i = 0; i < tll->nch; i++) { | 
 | 299 | 		if (!IS_ERR(tll->ch_clk[i])) { | 
 | 300 | 			clk_unprepare(tll->ch_clk[i]); | 
 | 301 | 			clk_put(tll->ch_clk[i]); | 
 | 302 | 		} | 
 | 303 | 	} | 
 | 304 |  | 
 | 305 | 	pm_runtime_disable(&pdev->dev); | 
 | 306 | 	return 0; | 
 | 307 | } | 
 | 308 |  | 
 | 309 | static const struct of_device_id usbtll_omap_dt_ids[] = { | 
 | 310 | 	{ .compatible = "ti,usbhs-tll" }, | 
 | 311 | 	{ } | 
 | 312 | }; | 
 | 313 |  | 
 | 314 | MODULE_DEVICE_TABLE(of, usbtll_omap_dt_ids); | 
 | 315 |  | 
 | 316 | static struct platform_driver usbtll_omap_driver = { | 
 | 317 | 	.driver = { | 
 | 318 | 		.name		= (char *)usbtll_driver_name, | 
 | 319 | 		.of_match_table = usbtll_omap_dt_ids, | 
 | 320 | 	}, | 
 | 321 | 	.probe		= usbtll_omap_probe, | 
 | 322 | 	.remove		= usbtll_omap_remove, | 
 | 323 | }; | 
 | 324 |  | 
 | 325 | int omap_tll_init(struct usbhs_omap_platform_data *pdata) | 
 | 326 | { | 
 | 327 | 	int i; | 
 | 328 | 	bool needs_tll; | 
 | 329 | 	unsigned reg; | 
 | 330 | 	struct usbtll_omap *tll; | 
 | 331 |  | 
 | 332 | 	if (!tll_dev) | 
 | 333 | 		return -ENODEV; | 
 | 334 |  | 
 | 335 | 	pm_runtime_get_sync(tll_dev); | 
 | 336 |  | 
 | 337 | 	spin_lock(&tll_lock); | 
 | 338 | 	tll = dev_get_drvdata(tll_dev); | 
 | 339 | 	needs_tll = false; | 
 | 340 | 	for (i = 0; i < tll->nch; i++) | 
 | 341 | 		needs_tll |= omap_usb_mode_needs_tll(pdata->port_mode[i]); | 
 | 342 |  | 
 | 343 | 	if (needs_tll) { | 
 | 344 | 		void __iomem *base = tll->base; | 
 | 345 |  | 
 | 346 | 		/* Program Common TLL register */ | 
 | 347 | 		reg = usbtll_read(base, OMAP_TLL_SHARED_CONF); | 
 | 348 | 		reg |= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON | 
 | 349 | 			| OMAP_TLL_SHARED_CONF_USB_DIVRATION); | 
 | 350 | 		reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN; | 
 | 351 | 		reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN; | 
 | 352 |  | 
 | 353 | 		usbtll_write(base, OMAP_TLL_SHARED_CONF, reg); | 
 | 354 |  | 
 | 355 | 		/* Enable channels now */ | 
 | 356 | 		for (i = 0; i < tll->nch; i++) { | 
 | 357 | 			reg = usbtll_read(base,	OMAP_TLL_CHANNEL_CONF(i)); | 
 | 358 |  | 
 | 359 | 			if (is_ohci_port(pdata->port_mode[i])) { | 
 | 360 | 				reg |= ohci_omap3_fslsmode(pdata->port_mode[i]) | 
 | 361 | 				<< OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT; | 
 | 362 | 				reg |= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS; | 
 | 363 | 			} else if (pdata->port_mode[i] == | 
 | 364 | 					OMAP_EHCI_PORT_MODE_TLL) { | 
 | 365 | 				/* | 
 | 366 | 				 * Disable UTMI AutoIdle, BitStuffing | 
 | 367 | 				 * and use SDR Mode. Enable ULPI AutoIdle. | 
 | 368 | 				 */ | 
 | 369 | 				reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE | 
 | 370 | 					| OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE); | 
 | 371 | 				reg |= OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF; | 
 | 372 | 				reg |= OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE; | 
 | 373 | 			} else if (pdata->port_mode[i] == | 
 | 374 | 					OMAP_EHCI_PORT_MODE_HSIC) { | 
 | 375 | 				/* | 
 | 376 | 				 * HSIC Mode requires UTMI port configurations | 
 | 377 | 				 */ | 
 | 378 | 				reg |= OMAP_TLL_CHANNEL_CONF_DRVVBUS | 
 | 379 | 				 | OMAP_TLL_CHANNEL_CONF_CHRGVBUS | 
 | 380 | 				 | OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI | 
 | 381 | 				 | OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF; | 
 | 382 | 			} else { | 
 | 383 | 				continue; | 
 | 384 | 			} | 
 | 385 | 			reg |= OMAP_TLL_CHANNEL_CONF_CHANEN; | 
 | 386 | 			usbtll_write(base, OMAP_TLL_CHANNEL_CONF(i), reg); | 
 | 387 |  | 
 | 388 | 			usbtll_writeb(base, | 
 | 389 | 				      OMAP_TLL_ULPI_SCRATCH_REGISTER(i), | 
 | 390 | 				      0xbe); | 
 | 391 | 		} | 
 | 392 | 	} | 
 | 393 |  | 
 | 394 | 	spin_unlock(&tll_lock); | 
 | 395 | 	pm_runtime_put_sync(tll_dev); | 
 | 396 |  | 
 | 397 | 	return 0; | 
 | 398 | } | 
 | 399 | EXPORT_SYMBOL_GPL(omap_tll_init); | 
 | 400 |  | 
 | 401 | int omap_tll_enable(struct usbhs_omap_platform_data *pdata) | 
 | 402 | { | 
 | 403 | 	int i; | 
 | 404 | 	struct usbtll_omap *tll; | 
 | 405 |  | 
 | 406 | 	if (!tll_dev) | 
 | 407 | 		return -ENODEV; | 
 | 408 |  | 
 | 409 | 	pm_runtime_get_sync(tll_dev); | 
 | 410 |  | 
 | 411 | 	spin_lock(&tll_lock); | 
 | 412 | 	tll = dev_get_drvdata(tll_dev); | 
 | 413 |  | 
 | 414 | 	for (i = 0; i < tll->nch; i++) { | 
 | 415 | 		if (omap_usb_mode_needs_tll(pdata->port_mode[i])) { | 
 | 416 | 			int r; | 
 | 417 |  | 
 | 418 | 			if (IS_ERR(tll->ch_clk[i])) | 
 | 419 | 				continue; | 
 | 420 |  | 
 | 421 | 			r = clk_enable(tll->ch_clk[i]); | 
 | 422 | 			if (r) { | 
 | 423 | 				dev_err(tll_dev, | 
 | 424 | 				 "Error enabling ch %d clock: %d\n", i, r); | 
 | 425 | 			} | 
 | 426 | 		} | 
 | 427 | 	} | 
 | 428 |  | 
 | 429 | 	spin_unlock(&tll_lock); | 
 | 430 |  | 
 | 431 | 	return 0; | 
 | 432 | } | 
 | 433 | EXPORT_SYMBOL_GPL(omap_tll_enable); | 
 | 434 |  | 
 | 435 | int omap_tll_disable(struct usbhs_omap_platform_data *pdata) | 
 | 436 | { | 
 | 437 | 	int i; | 
 | 438 | 	struct usbtll_omap *tll; | 
 | 439 |  | 
 | 440 | 	if (!tll_dev) | 
 | 441 | 		return -ENODEV; | 
 | 442 |  | 
 | 443 | 	spin_lock(&tll_lock); | 
 | 444 | 	tll = dev_get_drvdata(tll_dev); | 
 | 445 |  | 
 | 446 | 	for (i = 0; i < tll->nch; i++) { | 
 | 447 | 		if (omap_usb_mode_needs_tll(pdata->port_mode[i])) { | 
 | 448 | 			if (!IS_ERR(tll->ch_clk[i])) | 
 | 449 | 				clk_disable(tll->ch_clk[i]); | 
 | 450 | 		} | 
 | 451 | 	} | 
 | 452 |  | 
 | 453 | 	spin_unlock(&tll_lock); | 
 | 454 | 	pm_runtime_put_sync(tll_dev); | 
 | 455 |  | 
 | 456 | 	return 0; | 
 | 457 | } | 
 | 458 | EXPORT_SYMBOL_GPL(omap_tll_disable); | 
 | 459 |  | 
 | 460 | MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>"); | 
 | 461 | MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>"); | 
 | 462 | MODULE_ALIAS("platform:" USBHS_DRIVER_NAME); | 
 | 463 | MODULE_LICENSE("GPL v2"); | 
 | 464 | MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers"); | 
 | 465 |  | 
 | 466 | static int __init omap_usbtll_drvinit(void) | 
 | 467 | { | 
 | 468 | 	return platform_driver_register(&usbtll_omap_driver); | 
 | 469 | } | 
 | 470 |  | 
 | 471 | /* | 
 | 472 |  * init before usbhs core driver; | 
 | 473 |  * The usbtll driver should be initialized before | 
 | 474 |  * the usbhs core driver probe function is called. | 
 | 475 |  */ | 
 | 476 | fs_initcall(omap_usbtll_drvinit); | 
 | 477 |  | 
 | 478 | static void __exit omap_usbtll_drvexit(void) | 
 | 479 | { | 
 | 480 | 	platform_driver_unregister(&usbtll_omap_driver); | 
 | 481 | } | 
 | 482 | module_exit(omap_usbtll_drvexit); |