| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | /* | 
|  | 2 | * Copyright (C) 2013 Broadcom Corporation | 
|  | 3 | * Copyright 2013 Linaro Limited | 
|  | 4 | * | 
|  | 5 | * This program is free software; you can redistribute it and/or | 
|  | 6 | * modify it under the terms of the GNU General Public License as | 
|  | 7 | * published by the Free Software Foundation version 2. | 
|  | 8 | * | 
|  | 9 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | 
|  | 10 | * kind, whether express or implied; without even the implied warranty | 
|  | 11 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the | 
|  | 12 | * GNU General Public License for more details. | 
|  | 13 | */ | 
|  | 14 |  | 
|  | 15 | #ifndef _CLOCK_BCM21664_H | 
|  | 16 | #define _CLOCK_BCM21664_H | 
|  | 17 |  | 
|  | 18 | /* | 
|  | 19 | * This file defines the values used to specify clocks provided by | 
|  | 20 | * the clock control units (CCUs) on Broadcom BCM21664 family SoCs. | 
|  | 21 | */ | 
|  | 22 |  | 
|  | 23 | /* bcm21664 CCU device tree "compatible" strings */ | 
|  | 24 | #define BCM21664_DT_ROOT_CCU_COMPAT	"brcm,bcm21664-root-ccu" | 
|  | 25 | #define BCM21664_DT_AON_CCU_COMPAT	"brcm,bcm21664-aon-ccu" | 
|  | 26 | #define BCM21664_DT_MASTER_CCU_COMPAT	"brcm,bcm21664-master-ccu" | 
|  | 27 | #define BCM21664_DT_SLAVE_CCU_COMPAT	"brcm,bcm21664-slave-ccu" | 
|  | 28 |  | 
|  | 29 | /* root CCU clock ids */ | 
|  | 30 |  | 
|  | 31 | #define BCM21664_ROOT_CCU_FRAC_1M		0 | 
|  | 32 | #define BCM21664_ROOT_CCU_CLOCK_COUNT		1 | 
|  | 33 |  | 
|  | 34 | /* aon CCU clock ids */ | 
|  | 35 |  | 
|  | 36 | #define BCM21664_AON_CCU_HUB_TIMER		0 | 
|  | 37 | #define BCM21664_AON_CCU_CLOCK_COUNT		1 | 
|  | 38 |  | 
|  | 39 | /* master CCU clock ids */ | 
|  | 40 |  | 
|  | 41 | #define BCM21664_MASTER_CCU_SDIO1		0 | 
|  | 42 | #define BCM21664_MASTER_CCU_SDIO2		1 | 
|  | 43 | #define BCM21664_MASTER_CCU_SDIO3		2 | 
|  | 44 | #define BCM21664_MASTER_CCU_SDIO4		3 | 
|  | 45 | #define BCM21664_MASTER_CCU_SDIO1_SLEEP		4 | 
|  | 46 | #define BCM21664_MASTER_CCU_SDIO2_SLEEP		5 | 
|  | 47 | #define BCM21664_MASTER_CCU_SDIO3_SLEEP		6 | 
|  | 48 | #define BCM21664_MASTER_CCU_SDIO4_SLEEP		7 | 
|  | 49 | #define BCM21664_MASTER_CCU_CLOCK_COUNT		8 | 
|  | 50 |  | 
|  | 51 | /* slave CCU clock ids */ | 
|  | 52 |  | 
|  | 53 | #define BCM21664_SLAVE_CCU_UARTB		0 | 
|  | 54 | #define BCM21664_SLAVE_CCU_UARTB2		1 | 
|  | 55 | #define BCM21664_SLAVE_CCU_UARTB3		2 | 
|  | 56 | #define BCM21664_SLAVE_CCU_BSC1			3 | 
|  | 57 | #define BCM21664_SLAVE_CCU_BSC2			4 | 
|  | 58 | #define BCM21664_SLAVE_CCU_BSC3			5 | 
|  | 59 | #define BCM21664_SLAVE_CCU_BSC4			6 | 
|  | 60 | #define BCM21664_SLAVE_CCU_CLOCK_COUNT		7 | 
|  | 61 |  | 
|  | 62 | #endif /* _CLOCK_BCM21664_H */ |