| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | /* | 
|  | 2 | * Copyright (c) 2014 Tomasz Figa <tomasz.figa@gmail.com> | 
|  | 3 | * | 
|  | 4 | * This program is free software; you can redistribute it and/or modify | 
|  | 5 | * it under the terms of the GNU General Public License version 2 as | 
|  | 6 | * published by the Free Software Foundation. | 
|  | 7 | * | 
|  | 8 | * This header provides constants for Samsung audio subsystem | 
|  | 9 | * clock controller. | 
|  | 10 | * | 
|  | 11 | * The constants defined in this header are being used in dts | 
|  | 12 | * and s5pv210 audss driver. | 
|  | 13 | */ | 
|  | 14 |  | 
|  | 15 | #ifndef _DT_BINDINGS_CLOCK_S5PV210_AUDSS_H | 
|  | 16 | #define _DT_BINDINGS_CLOCK_S5PV210_AUDSS_H | 
|  | 17 |  | 
|  | 18 | #define CLK_MOUT_AUDSS		0 | 
|  | 19 | #define CLK_MOUT_I2S_A		1 | 
|  | 20 |  | 
|  | 21 | #define CLK_DOUT_AUD_BUS	2 | 
|  | 22 | #define CLK_DOUT_I2S_A		3 | 
|  | 23 |  | 
|  | 24 | #define CLK_I2S			4 | 
|  | 25 | #define CLK_HCLK_I2S		5 | 
|  | 26 | #define CLK_HCLK_UART		6 | 
|  | 27 | #define CLK_HCLK_HWA		7 | 
|  | 28 | #define CLK_HCLK_DMA		8 | 
|  | 29 | #define CLK_HCLK_BUF		9 | 
|  | 30 | #define CLK_HCLK_RP		10 | 
|  | 31 |  | 
|  | 32 | #define AUDSS_MAX_CLKS		11 | 
|  | 33 |  | 
|  | 34 | #endif |