| xj | b04a402 | 2021-11-25 15:01:52 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Driver for Teranetics PHY |
| 3 | * |
| 4 | * Author: Shaohui Xie <Shaohui.Xie@freescale.com> |
| 5 | * |
| 6 | * Copyright 2015 Freescale Semiconductor, Inc. |
| 7 | * |
| 8 | * This file is licensed under the terms of the GNU General Public License |
| 9 | * version 2. This program is licensed "as is" without any warranty of any |
| 10 | * kind, whether express or implied. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/mii.h> |
| 16 | #include <linux/ethtool.h> |
| 17 | #include <linux/mdio.h> |
| 18 | #include <linux/phy.h> |
| 19 | |
| 20 | MODULE_DESCRIPTION("Teranetics PHY driver"); |
| 21 | MODULE_AUTHOR("Shaohui Xie <Shaohui.Xie@freescale.com>"); |
| 22 | MODULE_LICENSE("GPL v2"); |
| 23 | |
| 24 | #define PHY_ID_TN2020 0x00a19410 |
| 25 | #define MDIO_PHYXS_LNSTAT_SYNC0 0x0001 |
| 26 | #define MDIO_PHYXS_LNSTAT_SYNC1 0x0002 |
| 27 | #define MDIO_PHYXS_LNSTAT_SYNC2 0x0004 |
| 28 | #define MDIO_PHYXS_LNSTAT_SYNC3 0x0008 |
| 29 | #define MDIO_PHYXS_LNSTAT_ALIGN 0x1000 |
| 30 | |
| 31 | #define MDIO_PHYXS_LANE_READY (MDIO_PHYXS_LNSTAT_SYNC0 | \ |
| 32 | MDIO_PHYXS_LNSTAT_SYNC1 | \ |
| 33 | MDIO_PHYXS_LNSTAT_SYNC2 | \ |
| 34 | MDIO_PHYXS_LNSTAT_SYNC3 | \ |
| 35 | MDIO_PHYXS_LNSTAT_ALIGN) |
| 36 | |
| 37 | static int teranetics_aneg_done(struct phy_device *phydev) |
| 38 | { |
| 39 | /* auto negotiation state can only be checked when using copper |
| 40 | * port, if using fiber port, just lie it's done. |
| 41 | */ |
| 42 | if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93)) |
| 43 | return genphy_c45_aneg_done(phydev); |
| 44 | |
| 45 | return 1; |
| 46 | } |
| 47 | |
| 48 | static int teranetics_read_status(struct phy_device *phydev) |
| 49 | { |
| 50 | int reg; |
| 51 | |
| 52 | phydev->link = 1; |
| 53 | |
| 54 | phydev->speed = SPEED_10000; |
| 55 | phydev->duplex = DUPLEX_FULL; |
| 56 | |
| 57 | if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93)) { |
| 58 | reg = phy_read_mmd(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_LNSTAT); |
| 59 | if (reg < 0 || |
| 60 | !((reg & MDIO_PHYXS_LANE_READY) == MDIO_PHYXS_LANE_READY)) { |
| 61 | phydev->link = 0; |
| 62 | return 0; |
| 63 | } |
| 64 | |
| 65 | reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); |
| 66 | if (reg < 0 || !(reg & MDIO_STAT1_LSTATUS)) |
| 67 | phydev->link = 0; |
| 68 | } |
| 69 | |
| 70 | return 0; |
| 71 | } |
| 72 | |
| 73 | static int teranetics_match_phy_device(struct phy_device *phydev) |
| 74 | { |
| 75 | return phydev->c45_ids.device_ids[3] == PHY_ID_TN2020; |
| 76 | } |
| 77 | |
| 78 | static struct phy_driver teranetics_driver[] = { |
| 79 | { |
| 80 | .phy_id = PHY_ID_TN2020, |
| 81 | .phy_id_mask = 0xffffffff, |
| 82 | .name = "Teranetics TN2020", |
| 83 | .soft_reset = gen10g_no_soft_reset, |
| 84 | .aneg_done = teranetics_aneg_done, |
| 85 | .config_init = gen10g_config_init, |
| 86 | .config_aneg = gen10g_config_aneg, |
| 87 | .read_status = teranetics_read_status, |
| 88 | .match_phy_device = teranetics_match_phy_device, |
| 89 | }, |
| 90 | }; |
| 91 | |
| 92 | module_phy_driver(teranetics_driver); |
| 93 | |
| 94 | static struct mdio_device_id __maybe_unused teranetics_tbl[] = { |
| 95 | { PHY_ID_TN2020, 0xffffffff }, |
| 96 | { } |
| 97 | }; |
| 98 | |
| 99 | MODULE_DEVICE_TABLE(mdio, teranetics_tbl); |