| /***************************************************************************** |
| * Copyright Statement: |
| * -------------------- |
| * This software is protected by Copyright and the information contained |
| * herein is confidential. The software may not be copied and the information |
| * contained herein may not be used or disclosed except with the written |
| * permission of MediaTek Inc. (C) 2005 |
| * |
| * BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES |
| * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") |
| * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON |
| * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, |
| * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF |
| * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT. |
| * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE |
| * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR |
| * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH |
| * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO |
| * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S |
| * SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM. |
| * |
| * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE |
| * LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, |
| * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, |
| * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO |
| * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE. |
| * |
| * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE |
| * WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF |
| * LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND |
| * RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER |
| * THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC). |
| * |
| *****************************************************************************/ |
| |
| /***************************************************************************** |
| * |
| * Filename: |
| * --------- |
| * uhlhwsim_struct.h |
| * |
| * Project: |
| * -------- |
| * U4G adaptor |
| * |
| * Description: |
| * ------------ |
| * File that contains UMTS high-level (VRf) data structure for HWSIM. This file |
| * is used by uhlhwsim.h. |
| * |
| * Author: |
| * ------- |
| * ------- |
| * |
| *============================================================================ |
| * HISTORY |
| * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
| *------------------------------------------------------------------------------ |
| * |
| *------------------------------------------------------------------------------ |
| * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
| *============================================================================ |
| ****************************************************************************/ |
| /******************************************************************************* |
| * Included header files |
| *******************************************************************************/ |
| #ifndef _UHLHWSIM_STRUCT_H |
| #define _UHLHWSIM_STRUCT_H |
| |
| #include "kal_public_api.h" |
| |
| /***************************************************************************** |
| * Definitions |
| *****************************************************************************/ |
| //#define TTS_OF_2MS TTS_OF_A_ECHIP*30720/500 |
| #define TTS_OF_2MS 307200/5 |
| #define TTS_OF_10MS 307200 |
| |
| /* These are temporary defined as there exist no IRQ codes for C2K */ |
| #define IRQ_EVENT_TIMER_CODE OSC_ISR_SRC_CUSTOM7 |
| |
| #define U3G_SLOT_MAX_WRAP_VALUE 16 |
| #define UHLHWSIM_MAX_PCCPCH_DATA_SIZE 39 |
| #define UHLHWSIM_MAX_FOUND_CELLS 8 |
| #define UHLHWSIM_MAX_UL_CELLS 2 |
| #define UHLHWSIM_MAX_TRCH 8 |
| #define UHLHWSIM_MAX_SCCPCH 5 |
| #define UHLHWSIM_MAX_DL_UARFCNS 4 |
| #ifdef __UE_SIMULATOR__ |
| #define UHLHWSIM_MAX_UL_DATA 829 /* Maximum UL transport block array size. Matches ul1_cnst.h in mcu/interface/ul1_interface */ |
| #else |
| /* Used in UL1B unit test only.*/ |
| #define UHLHWSIM_MAX_UL_DATA (829/4) |
| #endif |
| #define UHLHWSIM_MAX_SFN 4096 |
| #define UHLHWSIM_MAX_SUB_FRAME 5 |
| #ifdef __UE_SIMULATOR__ |
| #define UHLHWSIM_MAX_HS_PDU_SIZE_IN_BITS (42192) |
| #else |
| /* Used in UL1B unit test only.*/ |
| #define UHLHWSIM_MAX_HS_PDU_SIZE_IN_BITS (42192/16) |
| #endif |
| #define UHLHWSIM_MAX_HS_PDU_SIZE_IN_BYTES (((UHLHWSIM_MAX_HS_PDU_SIZE_IN_BITS+32+31)/32)*4) /* 42192/8 = 5274 Bytes */ |
| #define UHLHWSIM_MAX_EDCH_TB_SIZE (23000/8) /* s according to HW spec max tb size is 22996 bits (Rel-8)*/ |
| #ifdef __UE_SIMULATOR__ |
| #define UHLHWSIM_MAX_DL_DATA_SIZE 1150 |
| #else |
| /* Used in UL1B unit test only.*/ |
| /* MSCComposer crashed when uhlhwsim_dl_data_ind_struct size too big.*/ |
| #define UHLHWSIM_MAX_DL_DATA_SIZE 575/2 |
| #endif |
| |
| |
| /******************************************************************************* |
| * Global Declarations |
| ******************************************************************************/ |
| typedef kal_uint16 uhlhwsim_dl_uarfcn_t; |
| typedef kal_uint16 uhlhwsim_num_uarfcn_t; |
| typedef kal_uint16 uhlhwsim_num_cell_obj_t; |
| typedef kal_int32 uhlhwsim_dl_power_t; |
| typedef kal_uint16 uhlhwsim_cell_psc_t; |
| typedef kal_uint16 uhlhwsim_sfn_t; |
| typedef kal_uint8 uhlhwsim_tb_data_t; |
| typedef kal_uint8 uhlhwsim_sccpch_num_t; |
| |
| typedef kal_int32 uhlhwsim_ul_power_t; |
| typedef kal_uint16 uhlhwsim_ul_uarfcn_t; |
| typedef kal_uint16 uhlhwsim_ul_tfci_t; |
| typedef kal_uint16 uhlhwsim_ul_trch_id_t; |
| typedef kal_uint32 uhlhwsim_ul_tb_size_t; |
| typedef kal_uint32 uhlhwsim_ul_tb_cnt; |
| typedef kal_uint16 uhlhwsim_ul_code_type_t; |
| typedef kal_uint16 uhlhwsim_ul_tti_t; |
| typedef kal_uint16 uhlhwsim_ul_crc_size_t; |
| typedef kal_uint16 uhlhwsim_no_frames_t; |
| typedef kal_uint16 uhlhwsim_ul_num_trch_t; |
| |
| typedef kal_uint16 uhlhwsim_dl_tti_t; |
| typedef kal_uint16 uhlhwsim_dl_trch_id_t; |
| typedef kal_uint32 uhlhwsim_dl_tb_cnt_t; |
| typedef kal_uint16 uhlhwsim_dl_tb_size_t; |
| typedef kal_uint8 uhlhwsim_dl_tfci_t; |
| typedef kal_uint8 uhlhwsim_no_of_trch_t; |
| typedef kal_uint8 uhlhwsim_data_t; |
| typedef kal_uint16 uhlhwsim_num_data_t; |
| typedef kal_uint16 uhlhwsim_cfn_t; |
| |
| typedef kal_uint8 uhlhwsim_sub_frame_t; |
| typedef kal_uint8 uhlhwsim_cqi_t; |
| typedef kal_uint16 uhlhwsim_hrnti_t; |
| typedef kal_uint32 uhlhwsim_ovsf_t; |
| typedef kal_uint8 uhlhwsim_sf_t; |
| |
| typedef kal_uint8 uhlhwsim_tb_size_index_t; /**< Transport-block size information (6 bits) 25.212 sec 4.6 */ |
| typedef kal_uint8 uhlhwsim_special_inform_type_t; /**< Special Information type (6 bits) 25.212 sec 4.6A */ |
| typedef kal_uint8 uhlhwsim_special_inform_t; /**< Special Information (7 bits) 25.212 sec 4.6A */ |
| |
| typedef kal_uint16 uhlhwsim_ul_etfci_t; |
| typedef kal_uint8 uhlhwsim_ag_value_t; |
| typedef kal_bool uhlhwsim_cqi_valid_t; |
| typedef kal_uint8 uhlhwsim_prach_signature_t; |
| typedef kal_uint8 uhlhwsim_prach_access_slot_t; |
| |
| typedef enum |
| { |
| UHLHWSIM_NOT_PRESENT = 0, |
| UHLHWSIM_PRESENT = 1 |
| } uhlhwsim_present_t; |
| |
| typedef enum |
| { |
| UHLHWSIM_FRAME_3G_10MS, |
| UHLHWSIM_FRAME_HSPA_2MS |
| } uhlhwsim_frame_duration_t; |
| |
| typedef enum |
| { |
| UHLHWSIM_DISABLED = 0, |
| UHLHWSIM_ENABLED = 1 |
| } uhlhwsim_trch_enabled_t; |
| |
| typedef enum |
| { |
| UHLHWSIM_DL_CRC_OK = 0, |
| UHLHWSIM_DL_CRC_ERROR = 1 |
| } uhlhwsim_crc_statuc_t; |
| |
| |
| typedef enum |
| { |
| UHLHWSIM_HARQ_NACK = 0, |
| UHLHWSIM_HARQ_ACK = 1 |
| }uhlhwsim_ack_nack_info_t; |
| |
| typedef enum |
| { |
| UHLHWSIM_HARQ_INVALID = 0, |
| UHLHWSIM_HARQ_VALID = 1 |
| }uhlhwsim_harq_valid_t; |
| |
| typedef enum |
| { |
| UHLHWSIM_DL_OK_CRC_ERROR = 0, |
| UHLHWSIM_DL_OK_CRC_OK = 1 |
| } uhlhwsim_crc_ok_statuc_t; |
| |
| typedef enum |
| { |
| UHLHWSIM_HSDPA_SSCH_TYPE1, |
| UHLHWSIM_HSDPA_SSCH_TYPE2, |
| UHLHWSIM_HSDPA_SSCH_TYPE3 |
| } uhlhwsim_hsdpa_scch_type_t; |
| |
| typedef enum |
| { |
| UHLHWSIM_HSDPA_TYPE_ONE_QPSK, |
| UHLHWSIM_HSDPA_TYPE_ONE_16QAM, |
| UHLHWSIM_HSDPA_TYPE_ONE_64QAM |
| } uhlhwsim_hsdpa_mod_schem_type_one_t; |
| |
| typedef enum |
| { |
| UHLHWSIM_HSDPA_TYPE_TWO_QPSK, |
| UHLHWSIM_HSDPA_TYPE_TWO_OTHERWISE |
| } uhlhwsim_hsdpa_mod_schem_type_two_t; |
| |
| |
| typedef enum |
| { |
| UHLHWSIM_HSDPA_HARQ_PROCESS_ID_0, |
| UHLHWSIM_HSDPA_HARQ_PROCESS_ID_1, |
| UHLHWSIM_HSDPA_HARQ_PROCESS_ID_2, |
| UHLHWSIM_HSDPA_HARQ_PROCESS_ID_3, |
| UHLHWSIM_HSDPA_HARQ_PROCESS_ID_4, |
| UHLHWSIM_HSDPA_HARQ_PROCESS_ID_5, |
| UHLHWSIM_HSDPA_HARQ_PROCESS_ID_6, |
| UHLHWSIM_HSDPA_HARQ_PROCESS_ID_7, |
| UHLHWSIM_HSDPA_HARQ_PROCESS_ID_INVALID |
| } uhlhwsim_hsdpa_harq_process_id_t; |
| |
| |
| |
| typedef enum |
| { |
| UHLHWSIM_HSDPA__REDUNDAN_VER_0, |
| UHLHWSIM_HSDPA_REDUNDAN_VER_1, |
| UHLHWSIM_HSDPA_REDUNDAN_VER_2, |
| UHLHWSIM_HSDPA_REDUNDAN_VER_3, |
| UHLHWSIM_HSDPA_REDUNDAN_VER_4, |
| UHLHWSIM_HSDPA_REDUNDAN_VER_5, |
| UHLHWSIM_HSDPA_REDUNDAN_VER_6, |
| UHLHWSIM_HSDPA_REDUNDAN_VER_7, |
| UHLHWSIM_HSDPA_REDUNDAN_VER_INVALID |
| }uhlhwsim_hsdpa_rv_t; |
| |
| typedef enum |
| { |
| UHLHWSIM_HSDPA_NEW_DATA_TOGGLE_0, |
| UHLHWSIM_HSDPA_NEW_DATA_TOGGLE_1, |
| UHLHWSIM_HSDPA_NEW_DATA_INVALID |
| }uhlhwsim_hsdpa_new_data_t; |
| |
| |
| typedef enum { |
| UHLHWSIM_EDCH_INITIAL_TRANS, |
| UHLHWSIM_EDCH_FIRST_RETRANS, |
| UHLHWSIM_EDCH_SECOND_RETRANS, |
| UHLHWSIM_EDCH_SUBSEQUENT_RETRANS |
| } uhlhwsim_edch_rsn_t; |
| |
| |
| typedef enum |
| { |
| UHLHWSIM_EDCH__NOT_HAPPY = 0, /**< NOT OK!!!! */ |
| UHLHWSIM_EDCH__HAPPY = 1 /**< OK :-) */ |
| } uhlhwsim_edch_happy_bit_t; |
| |
| typedef enum |
| { |
| UHLHWSIM__ALL_HARQ_PROCESSES = 0, |
| UHLHWSIM__PER_HARQ_PROCESS = 1 |
| } uhlhwsim_ag_scope_t; |
| |
| |
| |
| typedef enum |
| { |
| UHLHWSIM_EHICH_HARQ_NACK_NON_SERVING = 0, |
| UHLHWSIM_EHICH_HARQ_ACK = 1, |
| UHLHWSIM_EHICH_HARQ_NACK_SERVING = 0xffffffff /* -1 to make ATEC decode */ |
| } uhlhwsim_harq_indcator_type_t; |
| |
| |
| typedef struct uhlhwsim_sibTag_tag |
| { |
| kal_uint32 seg_Rep; |
| kal_uint32 seg_Pos; |
| } uhlhwsim_sibTag_t; |
| |
| typedef struct |
| { |
| uhlhwsim_ovsf_t ccs; /**< Channelization-code-set information (7 bits) 25.212 sec 4.6 */ |
| uhlhwsim_hsdpa_mod_schem_type_one_t modulation_scheme; /**< Modulation scheme information (1 bit) 25.212 sec 4.6 */ |
| uhlhwsim_tb_size_index_t tb_size_index; /**< Transport-block size information (6 bits) 25.212 sec 4.6 */ |
| uhlhwsim_hsdpa_harq_process_id_t harq_process_id; /**< Hybrid-ARQ process information (3 bits) 25.212 sec 4.6 */ |
| uhlhwsim_hsdpa_rv_t redundancy_ver; /**< Redundancy and constellation version (3 bits) 25.212 sec 4.6 */ |
| uhlhwsim_hsdpa_new_data_t new_data; /**< New Data indicator (1 bit) 25.212 sec 4.6 */ |
| } uhlhwsim_hsdpa_scch_data_type1_t; |
| |
| typedef struct |
| { |
| uhlhwsim_ovsf_t ccs; /**< Channelization-code-set information (7 bits) 25.212 sec 4.6A */ |
| uhlhwsim_hsdpa_mod_schem_type_two_t modulation_scheme; /**< Modulation scheme information (1 bit) 25.212 sec 4.6A */ |
| uhlhwsim_special_inform_type_t special_info_type; /**< Special Information type (6 bits) 25.212 sec 4.6A */ |
| uhlhwsim_special_inform_t special_info; /**< Special Information (7 bits) 25.212 sec 4.6A */ |
| } uhlhwsim_hsdpa_scch_data_type2_t; |
| |
| typedef union |
| { |
| uhlhwsim_hsdpa_scch_data_type1_t data_type1; |
| uhlhwsim_hsdpa_scch_data_type2_t data_type2; |
| } uhlhwsim_hsdpa_scch_data_t; |
| |
| |
| typedef struct uhlhwsim_dl_resource_req_tag |
| { |
| /*if num_dl_uarfcn is unknown and set to 0, no matching will be done at the NW and all available UARFCN will be returned */ |
| uhlhwsim_num_uarfcn_t num_dl_uarfcn; |
| uhlhwsim_dl_uarfcn_t dl_uarfcn[UHLHWSIM_MAX_DL_UARFCNS]; |
| } uhlhwsim_dl_resource_req_t; |
| |
| |
| typedef struct uhlhwsim_cell_info_tag |
| { |
| uhlhwsim_dl_uarfcn_t dl_uarfcn; |
| uhlhwsim_cell_psc_t psc; |
| uhlhwsim_dl_power_t rssi; |
| uhlhwsim_dl_power_t rscp; |
| uhlhwsim_sfn_t sfn; |
| |
| |
| struct { |
| uhlhwsim_present_t status_pccpch_present; |
| uhlhwsim_sibTag_t sib_tag_info; |
| uhlhwsim_tb_data_t sib_data[UHLHWSIM_MAX_PCCPCH_DATA_SIZE]; |
| } pccpchCnf; |
| |
| uhlhwsim_sccpch_num_t no_sccpch; |
| |
| struct |
| { |
| uhlhwsim_dl_tfci_t tfci; |
| uhlhwsim_sf_t sf; |
| uhlhwsim_ovsf_t ovsf; |
| uhlhwsim_no_of_trch_t no_of_trch; |
| struct |
| { |
| uhlhwsim_trch_enabled_t status_trch_enabled; |
| uhlhwsim_crc_statuc_t crc_status; |
| uhlhwsim_dl_tti_t tti; |
| uhlhwsim_dl_trch_id_t trch_id; |
| uhlhwsim_dl_tb_cnt_t tb_cnt; |
| uhlhwsim_dl_tb_size_t tb_size; |
| } trch[UHLHWSIM_MAX_TRCH]; |
| uhlhwsim_num_data_t num_data; |
| uhlhwsim_data_t data[UHLHWSIM_MAX_DL_DATA_SIZE]; |
| } sccpch[UHLHWSIM_MAX_SCCPCH]; |
| |
| struct |
| { |
| uhlhwsim_dl_tfci_t tfci; |
| uhlhwsim_cfn_t cfn; |
| uhlhwsim_no_of_trch_t no_of_trch; |
| struct |
| { |
| uhlhwsim_trch_enabled_t status_trch_enabled; |
| uhlhwsim_crc_statuc_t crc_status; |
| uhlhwsim_dl_tti_t tti; |
| uhlhwsim_dl_trch_id_t trch_id; |
| uhlhwsim_dl_tb_cnt_t tb_cnt; |
| uhlhwsim_dl_tb_size_t tb_size; |
| uhlhwsim_data_t tb_data[UHLHWSIM_MAX_DL_DATA_SIZE]; |
| } trch[UHLHWSIM_MAX_TRCH]; |
| } dpch; |
| |
| } uhlhwsim_cell_info_t; |
| |
| typedef struct uhlhwsim__rxCellObj_tag |
| { |
| uhlhwsim_cell_info_t cell_info; |
| } uhlhwsim_rx_cell_obj_t; |
| |
| typedef struct uhlhwsim_hspa_cell_info_tag |
| { |
| uhlhwsim_dl_uarfcn_t dl_uarfcn; |
| uhlhwsim_cell_psc_t psc; |
| uhlhwsim_dl_power_t rssi; |
| uhlhwsim_dl_power_t rscp; |
| uhlhwsim_sfn_t sfn; |
| |
| struct |
| { |
| uhlhwsim_present_t status_hsdsch_present; |
| uhlhwsim_sfn_t sfn; //Frame Number |
| uhlhwsim_sub_frame_t sub_frame; //Subframe Number |
| |
| uhlhwsim_hrnti_t h_rnti; |
| |
| |
| uhlhwsim_ovsf_t ovsf; |
| uhlhwsim_hsdpa_scch_type_t hsscch_type; /**< Type of HS-SCCH */ |
| uhlhwsim_hsdpa_scch_data_t hsscch_data; /**< Data carried on the HS-SCCH */ |
| |
| uhlhwsim_crc_ok_statuc_t crc_ok; // True=correct. False=wrong. |
| uhlhwsim_dl_tb_size_t tb_size; |
| uhlhwsim_data_t data[UHLHWSIM_MAX_HS_PDU_SIZE_IN_BYTES]; |
| } hsdsch; |
| |
| struct |
| { |
| uhlhwsim_present_t status_eagch_present; |
| uhlhwsim_sfn_t sfn; //Frame Number |
| uhlhwsim_sub_frame_t sub_frame; //Subframe Number |
| uhlhwsim_ag_value_t ag_value; |
| uhlhwsim_ag_scope_t ag_scope; |
| uhlhwsim_hsdpa_harq_process_id_t harq_process_id; |
| } eagch; |
| |
| struct |
| { |
| uhlhwsim_present_t status_ehich_present; |
| uhlhwsim_harq_indcator_type_t harq_indcator; |
| uhlhwsim_hsdpa_harq_process_id_t harq_process_id; |
| } ehich; |
| |
| struct |
| { |
| uhlhwsim_present_t status_fdpch_present; |
| } fdpch; |
| |
| |
| } uhlhwsim_hspa_cell_info_t; |
| |
| typedef struct uhlhwsim__rxHspaCellObj_tag |
| { |
| uhlhwsim_hspa_cell_info_t hspa_cell_info; |
| } uhlhwsim_rx_hspa_cell_obj_t; |
| |
| |
| |
| typedef struct uhlhwsim_dl_data_tag |
| { |
| uhlhwsim_num_cell_obj_t num_cell_obj; |
| uhlhwsim_rx_cell_obj_t cell_obj[UHLHWSIM_MAX_FOUND_CELLS]; |
| uhlhwsim_rx_hspa_cell_obj_t hspa_cell_obj[UHLHWSIM_MAX_FOUND_CELLS]; |
| } uhlhwsim_dl_data_t; |
| |
| |
| typedef struct _uhlhwsim_dl_data_ind_struct |
| { |
| uhlhwsim_dl_data_t dl_data; |
| } uhlhwsim_dl_data_ind_struct; |
| |
| |
| typedef struct |
| { |
| uhlhwsim_ul_uarfcn_t ul_arfcn; |
| uhlhwsim_ul_power_t ul_power; |
| uhlhwsim_cell_psc_t psc; |
| uhlhwsim_ul_tfci_t tfci; |
| uhlhwsim_sfn_t sfn; |
| //uhlhwsim_frame_duration_t frame_duration; |
| uhlhwsim_no_frames_t no_frames; |
| struct |
| { |
| uhlhwsim_ul_trch_id_t trch_id; |
| uhlhwsim_ul_tb_size_t tb_size; |
| uhlhwsim_ul_tb_cnt tb_cnt; |
| uhlhwsim_ul_code_type_t code_type; |
| uhlhwsim_ul_tti_t tti; |
| uhlhwsim_ul_crc_size_t crc_size; |
| uhlhwsim_tb_data_t tb_data[UHLHWSIM_MAX_UL_DATA]; |
| } tbs; |
| } uhlhwsim_prach_t; |
| |
| typedef struct |
| { |
| uhlhwsim_ul_uarfcn_t ul_arfcn; |
| uhlhwsim_ul_power_t ul_power; |
| uhlhwsim_cell_psc_t psc; |
| uhlhwsim_ul_tfci_t tfci; |
| uhlhwsim_cfn_t cfn; |
| uhlhwsim_cfn_t sfn; |
| //uhlhwsim_frame_duration_t frame_duration; |
| uhlhwsim_ul_num_trch_t num_trch; |
| struct |
| { |
| uhlhwsim_ul_trch_id_t trch_id; |
| uhlhwsim_ul_tb_size_t tb_size; |
| uhlhwsim_ul_tb_cnt tb_cnt; |
| uhlhwsim_ul_tti_t tti; |
| uhlhwsim_tb_data_t tb_data[UHLHWSIM_MAX_UL_DATA]; |
| } trch[UHLHWSIM_MAX_TRCH]; |
| } uhlhwsim_pdpch_t; |
| |
| typedef struct |
| { |
| uhlhwsim_ul_uarfcn_t ul_arfcn; |
| uhlhwsim_cfn_t cfn; |
| uhlhwsim_sub_frame_t sub_frame; |
| uhlhwsim_cqi_valid_t cqi_valid; |
| uhlhwsim_cqi_t primary_cqi_value; |
| uhlhwsim_cqi_t secondary_cqi_value; |
| uhlhwsim_harq_valid_t primary_harq_info_valid; |
| uhlhwsim_ack_nack_info_t primary_harq_info_ind; |
| uhlhwsim_harq_valid_t secondary_harq_info_valid; |
| uhlhwsim_ack_nack_info_t secondary_harq_info_ind; |
| }uhlhwsim_hs_dpcch_t; |
| |
| |
| typedef struct |
| { |
| uhlhwsim_ul_uarfcn_t prach_ul_arfcn; |
| uhlhwsim_prach_signature_t prach_signature; |
| uhlhwsim_prach_access_slot_t prach_access_slot; |
| } uhlhwsim_prach_preamble_t; |
| typedef struct |
| { |
| uhlhwsim_ul_uarfcn_t ul_arfcn; |
| uhlhwsim_ul_power_t ul_power; |
| uhlhwsim_cfn_t cfn; |
| uhlhwsim_sub_frame_t sub_frame; |
| |
| uhlhwsim_edch_happy_bit_t happy_bit; |
| uhlhwsim_edch_rsn_t rsn; |
| uhlhwsim_ul_tti_t tti; |
| uhlhwsim_ul_etfci_t e_tfci; |
| uhlhwsim_ul_tb_size_t tb_size; |
| uhlhwsim_tb_data_t tb_data[UHLHWSIM_MAX_EDCH_TB_SIZE]; |
| } uhlhwsim_edch_t; |
| |
| typedef struct |
| { |
| uhlhwsim_present_t prach_present; |
| uhlhwsim_prach_t prach_data; |
| uhlhwsim_present_t pdpch_present; |
| uhlhwsim_pdpch_t pdpch_data; |
| uhlhwsim_present_t hs_dpcch_present; |
| uhlhwsim_hs_dpcch_t hs_dpcch_data; |
| uhlhwsim_present_t prach_preamble_present; |
| uhlhwsim_prach_preamble_t prach_preamble; |
| |
| uhlhwsim_present_t edch_present; |
| uhlhwsim_edch_t edch_data; |
| } uhlhwsim_tx_cell_obj_t; |
| |
| |
| typedef struct uhlhwsim_ul_data_tag |
| { |
| uhlhwsim_num_cell_obj_t num_cell_obj; |
| uhlhwsim_tx_cell_obj_t cell_obj[UHLHWSIM_MAX_UL_CELLS]; |
| } uhlhwsim_ul_data_t; |
| |
| |
| typedef struct _uhlhwsim_ul_data_req_struct |
| { |
| uhlhwsim_ul_data_t ul_data; |
| } uhlhwsim_ul_data_req_struct; |
| |
| #endif /* _UHLHWSIM_STRUCT_H */ |