blob: 4f2f5127f6654de6572b124ce2e77f09524bb457 [file] [log] [blame]
/*******************************************************************************
* Filename:
* ---------
* prbm_conf.h
*
* Project:
* --------
* UMOLYA
*
* Description:
* ------------
* PRBM configuration header file
*
* Author:
* -------
* -------
*
* ==========================================================================
* $Log$
*
* 11 10 2020 wen-zhi.huang
* [MOLY00591398] [MT6833][Palmer][Q0][MP7][SQC][Log profiling] SA DL 2CC profiling
* [SA DL 2CC profiling] Copro log reduction
*
* 06 29 2020 wen-zhi.huang
* [MOLY00536882] [MDFPM] Dynamic switch check in
* log reduction for MDDP-WH
*
* 03 25 2020 chi-yen.yu
* [MOLY00507144] [MT6875][Margaux][Q0][MP3][SQC][China][Kunming][5GMM][NSA][Internal][FT][CT][IS:CT][Static][NSA_Self-Cer_FT_01_026][ASSERT]file:dsp3/coresonic/msonic/modem/brp/nr/nr_brp/src/nr_brp_top_irq.c line:925
* For log reduction
*
* 09 18 2019 chi-yen.yu
* [MOLY00437845] [Gen97][SMO][UTF2.5] Please move out trace from dpcopro_internal.h
* Increase UL USB PRB size
* .
*
* 07 30 2019 wen-zhi.huang
* [MOLY00423298] [MDDP][GEN97] patch back MDDP-WH
* .merge MDDPWH code to VMOLY TRUNK
*
* 07 04 2019 chi-yen.yu
* [MOLY00396869] [MODIS HW Copro] Work on making Modis to run with ESL HW models and Uplane with ESL
* Fix build error
*
* 07 04 2019 chi-yen.yu
* [MOLY00396869] [MODIS HW Copro] Work on making Modis to run with ESL HW models and Uplane with ESL
* Add compile flag for DPMAIF PRB
*
* 06 26 2019 chi-yen.yu
* [MOLY00396869] [MODIS HW Copro] Work on making Modis to run with ESL HW models and Uplane with ESL
* Add IMS PRB type
*
* 05 09 2019 hsin-hao.huang
* [MOLY00401354] [MT6297][Phone Call][NSA FullStack][Huawei][Shanghai][5G][VMOLY]Assert fail: el2_sec_utility.c 327 - IPCORE
* .LHIF/DPMAIF reorder ehance interface
*
* 10 08 2018 chi-yen.yu
* [MOLY00344818] NRL2 merge back to VMOLY
* Add PRBM type for 97 DPMAIF USB
*
* 10 04 2018 chi-yen.yu
* [MOLY00328022] GEN97 NRL2 driver build error
* Refine inline usage
*
* 09 27 2018 chi-yen.yu
* [MOLY00344818] NRL2 merge back to VMOLY
* Merge back from UMOLYE truck
*
* 09 18 2018 chi-yen.yu
* [MOLY00344818] NRL2 merge back to VMOLY
* Fix code gen error
*
* 08 20 2018 wen-zhi.huang
* [MOLY00252913] MT6295 MML2 driver porting
* [VMOLY] merge driver code back with UMOLYE.TRUNK & 97.DEV
*
* 08 15 2018 chi-yen.yu
* [MOLY00252913] MT6295 MML2 driver porting
* .
*
* 08 08 2018 chi-yen.yu
* [MOLY00328022] GEN97 NRL2 driver build error
* Patch for NRL2 DVT
*
* 08 07 2018 chi-yen.yu
* [MOLY00328022] GEN97 NRL2 driver build error
* Patch cache operation API for VRB
*
* 07 24 2018 chi-yen.yu
* [MOLY00328022] GEN97 NRL2 driver build error
* Add PRB DL DPMAIF
*
* 05 24 2018 chi-yen.yu
* [MOLY00328022] GEN97 NRL2 driver build error
* Fix build error
*
* 04 11 2018 chi-yen.yu
* [MOLY00252913] MT6295 MML2 driver porting
* Extend VRB release to support 32bit length
*
* 03 20 2018 chi-yen.yu
* [MOLY00252913] MT6295 MML2 driver porting
* Patch for 95 MML2 router DVT test
*
* 03 09 2018 chi-yen.yu
* [MOLY00252913] MT6295 MML2 driver porting
* Integrate 95 MML2 router DVT related test
*
* 02 13 2018 chi-yen.yu
* [MOLY00252913] MT6295 MML2 driver porting
* Enhance DMA trigger flow for reduce mask interrupt duration
*
* 11 13 2017 chi-yen.yu
* [MOLY00252913] MT6295 MML2 driver porting
* Merge from 95 DEV branch
*
* 11 13 2017 chao-hung.hsu
* [MOLY00252913] MT6295 MML2 driver porting
* . dpcopro 95 DEV code sync back to R3/TRUNK
*
* 11 10 2017 wei-hao.kuo
* [MOLY00252913] MT6295 MML2 driver porting
* Enable PRB_TYPE_DL_USB for _HIF_USB_SUPPORT_ load
*
* 08 21 2017 chi-yen.yu
* [MOLY00252913] MT6295 MML2 driver porting
* Reduce PRBM size for MT6739
*
* 08 16 2017 chi-yen.yu
* [MOLY00179693] [Bianco_SMT][Bianco Bring-up]MT6293 Copro driver integration
* PRBM full recover
*
* 07 20 2017 chi-yen.yu
* [MOLY00179693] [Bianco_SMT][Bianco Bring-up]MT6293 Copro driver integration
* Merge UMOLYA TRUCK code to R2
*
* 07 17 2017 chi-yen.yu
* [MOLY00252913] MT6295 MML2 driver porting
* Merege 95 MML2 driver to truck
*
* 07 13 2017 chi-yen.yu
* [MOLY00252913] MT6295 MML2 driver porting
* .
*
* 06 29 2017 chi-yen.yu
* [MOLY00252913] MT6295 MML2 driver porting
* Port for 95 FPGA
*
* 03 06 2017 chi-yen.yu
* [MOLY00226321] [6293]DCM & Sleep Flow Integration and Verification
* .
*
* 03 06 2017 chi-yen.yu
* [MOLY00232231] [MT6763_234G_Sanity]93 DPCOPRO driver integration
* .
*
* 03 02 2017 chi-yen.yu
* [MOLY00232231] [MT6763_234G_Sanity]93 DPCOPRO driver integration
* .
*
* 01 20 2017 chao-hung.hsu
* [MOLY00226032] [Bianco Bring-up][DPCopro]
* . driver porting
*
* 01 10 2017 chi-yen.yu
* [MOLY00179693] MT6293 Copro driver integration
* .
*
* 10 31 2016 chi-yen.yu
* [MOLY00179693] MT6293 Copro driver integration
* .
*
* 10 06 2016 chi-yen.yu
* [MOLY00179693] MT6293 Copro driver integration
* .
*
* 09 13 2016 chi-yen.yu
* [MOLY00179693] MT6293 Copro driver integration
* .
*
* 09 07 2016 chi-yen.yu
* [MOLY00179693] MT6293 Copro driver integration
* .
*
* 08 24 2016 chi-yen.yu
* [MOLY00179693] MT6293 Copro driver integration
* .
*
* 08 09 2016 chi-yen.yu
* [MOLY00179693] MT6293 Copro driver integration
* .
*
* 08 05 2016 chi-yen.yu
* [MOLY00179693] MT6293 Copro driver integration
* .
*
* 07 19 2016 chi-yen.yu
* [MOLY00179693] MT6293 Copro driver integration
* .
*
* 07 12 2016 chi-yen.yu
* [MOLY00179693] MT6293 Copro driver integration
* .
*
* 07 11 2016 chi-yen.yu
* [MOLY00179693] MT6293 Copro driver integration
* .
*
* 06 30 2016 chi-yen.yu
* [MOLY00179693] MT6293 Copro driver integration
* .
*
* 06 07 2016 chi-yen.yu
* [MOLY00179693] MT6293 Copro driver integration
* .
*
* 05 25 2016 chi-yen.yu
* [MOLY00179693] MT6293 Copro driver integration
* .
*
****************************************************************************/
#ifndef __PRBM_H__
#define __PRBM_H__
#ifndef __MTK_TARGET__
#define inline
#endif
typedef struct{
kal_uint32 prb_base;
kal_uint32 prb_size;
kal_uint16 prb_page_num;
kal_uint8 prb_id;
kal_uint8 prb_wrap_buf_unit;// unit:128 bytes
kal_uint32 prb_alloc_align:4;//0: no-align, 1: 2 byte align, 2: 4 byte align, 3: 8 align,...,5: 32 byte align,6: 64 byte align
//prb_psize_cfg:0 => page size= 16 byte
//prb_psize_cfg:1 => page size= 32 byte
//prb_psize_cfg:2 => page size= 64 byte
//prb_psize_cfg:3 => page size= 128 byte
//...
//prb_page_size:N => page size= 2^(4+prb_psize_cfg) byte
kal_uint32 prb_psize_cfg:4;
//when no_seq_rel=0, PRB is sequence release,
//When no_seq_rel=1, PRB is no-sequence release,
kal_uint32 rel_type:4;
kal_uint32 wrap_full_cover:1;
kal_uint32 multi_task_aloc:1;
kal_uint32 resv:18;
}prbm_config_t;
typedef enum
{
PRB_TYPE_UL_ROHC=0,
PRB_TYPE_DL_ROHC,
PRB_TYPE_DL_IPHC,
PRB_TYPE_DL_CIPHER_META,
PRB_TYPE_DL_IP_FRAG, // 4
//=====start of HW PRB
PRB_TYPE_AP_UL_Q1,
PRB_TYPE_SHARE,
#ifndef __MD93__
PRB_TYPE_DL_IPF,
#endif
#if !defined(__MD93__) && !defined(__TEMP_MDDP_WH_SUPPORT__)
PRB_TYPE_DL_NAT_SHRAM,
#endif
#ifdef ATEST_DPCOPRO_EN
PRB_TYPE_DPC_UT_CFG,
#endif
//Due to only MODEM only load has MODEM USB function
//only enable DL USB buffer in MODEM only load
//#ifdef __MODEM_ONLY__
//L1S_L1DISABLE also has MODEM USB function. PRB_TYPE_DL_USB is needed as long as __HIF_USB_SUPPORT__ is defined.
PRB_TYPE_IMS,
#ifdef __HIF_USB_SUPPORT__
PRB_TYPE_DL_USB,
#endif
#ifdef __MD97__
PRB_TYPE_DL_LHIF,
PRB_TYPE_DL_DPMAIF,
#endif
PRB_TYPE_AP_UL_ACK,
#ifdef __HIF_DPMAIF_DP_SUPPORT__
PRB_TYPE_DL_DPMAIF_BAT,
PRB_TYPE_DL_DPMAIF_FRAGBAT,
#endif
#ifdef __TEMP_MDDP_WH_SUPPORT__
#if defined(__MDDP_USB_SUPPORT__) || defined(__MDDP_WH_SUPPORT__)
PRB_TYPE_DL_NAT_SHRAM,
#endif
#endif
PRB_TYPE_NUM
}prbm_type;
// PRB_TYPE_UL_IPHC, // not used in 2/3G
// PRB_TYPE_DL_FLC, // not used in 2/3G
enum{
PRB_PSIZE_CFG_16=0,
PRB_PSIZE_CFG_32,
PRB_PSIZE_CFG_64,
PRB_PSIZE_CFG_128,
PRB_PSIZE_CFG_256,
PRB_PSIZE_CFG_512,
PRB_PSIZE_CFG_1024,
PRB_PSIZE_CFG_2048,
PRB_PSIZE_CFG_4096,
PRB_PSIZE_CFG_NUM,
};
enum{
PRB_ALLOC_ALIGN_1=0,
PRB_ALLOC_ALIGN_2,
PRB_ALLOC_ALIGN_4,
PRB_ALLOC_ALIGN_8,
PRB_ALLOC_ALIGN_16,
PRB_ALLOC_ALIGN_32,
PRB_ALLOC_ALIGN_64,
PRB_ALLOC_ALIGN_NUM,
};
enum{
PRB_REL_TYPE_SEQ=0,
PRB_REL_TYPE_NOSEQ,
PRB_REL_TYPE_HW_ALOC,
PRB_REL_TYPE_NUM,
};
#define PRB_FULL_RESERVE_SIZE 4
#define PRBM_INIT_REM_SIZE(_prb_size) ((_prb_size)-PRB_FULL_RESERVE_SIZE)
#define PRBM_WRAP_BUF_UNIT (128)
#define PSZIE_CFG_BIT_NUM(psize_cfg) ((kal_uint32)(psize_cfg)+4)
#define PSIZE_CFG_SIZE(psize_cfg) (1<<PSZIE_CFG_BIT_NUM(psize_cfg))
//#define PRB_GET_MEM_SIZE(P_SIZE,P_NUM, REL_TYPE) (PSIZE_CFG_SIZE(P_SIZE)*P_NUM)+(REL_TYPE*(sizeof(kal_uint16)*P_NUM))
#define PRBM_PT_SIZE(P_NUM) (sizeof(kal_uint16)*(P_NUM))
#define PRB_GET_MEM_SIZE(PAGE_SIZE_CFG,WRAP_SIZE_CFG,PAGE_NUM, REL_TYPE) ((PSIZE_CFG_SIZE(PAGE_SIZE_CFG)*(PAGE_NUM))+(WRAP_SIZE_CFG*PRBM_WRAP_BUF_UNIT)+((REL_TYPE>0)*PRBM_PT_SIZE(PAGE_NUM)))
typedef kal_uint32(*HW_ALOC_OFS_CB)(void);//CB function to get write offset for HW ALLOC type
typedef kal_uint32(*HW_ADD_REM_SIZE_CB)(kal_uint32);//CB function to add remain buffer size to HW & return current remain buffer size
void _do_prbm_output_rel_merge_log(void);
kal_bool prbm_get_def_cfg(prbm_config_t *cfg,kal_uint8 prbm_id);
kal_bool prbm_set_def_cfg(prbm_config_t *cfg,kal_uint8 prbm_id);
kal_uint32 prbm_get_def_mem_size(kal_uint8 prbm_id);
void prbm_get_cfg(prbm_config_t *cfg,kal_uint8 prb_id);
void prbm_get_cfg_for_hw_aloc_type(prbm_config_t *cfg,HW_ALOC_OFS_CB aloc_cb,HW_ADD_REM_SIZE_CB add_rem_size_cb,kal_uint8 prb_id);
void prbm_init_cfg(prbm_config_t *prbm_cfg,HW_ALOC_OFS_CB wofs_cb,HW_ADD_REM_SIZE_CB add_rem_size_cb,kal_uint8 prbid);
void prbm_reconfig(kal_uint32 base_addr,kal_uint32 size,kal_uint8 page_size_cfg,kal_uint32 page_num_unit,kal_uint32 max_pkt_size,kal_uint8 rel_type,kal_uint8 prbm_id);
void prbm_init(void);
kal_uint8* prbm_get_base(kal_uint8 prb_id);
kal_uint8* prbm_allocate(kal_uint32 aloc_size, kal_uint8 prb_id);
kal_uint32 prbm_release(void* addr, kal_uint32 rel_size, kal_uint8 prb_id);
kal_uint32 prbm_get_remain_size(kal_uint8 prb_id);
kal_uint32 prbm_get_alloc_size(kal_uint8 prb_id);
kal_bool prbm_check_region(kal_uint32 addr, kal_uint32 len,kal_uint8 prb_id);
#ifdef __TEMP_MDDP_WH_SUPPORT__
kal_uint32 prbm_get_rel_ofs(kal_uint8 prb_id);
#endif
//in order to make packet in end of buffer in PRBM to be continuously
//copy data from base of PRBM to wrap buffer region
kal_bool prbm_wrap_buf_handle(kal_uint8 *pkt_addr, kal_uint16 pkt_len,kal_uint8 prb_id,kal_uint8 hw_write);
typedef struct{
kal_uint32 buf_add_size:24;
kal_uint32 prbm_id:7;
kal_uint32 do_rel:1;
}PRBM_TRY_REL_T;
PRBM_TRY_REL_T _prbm_try_release(kal_uint32 addr, kal_uint32 rel_size);
typedef kal_bool (*prb_rel_cb_t)(void*, kal_uint32);
kal_uint8* prbm_usb_init(prb_rel_cb_t rel_cb);
void prbm_wifi_init(prb_rel_cb_t rel_cb);
#define PRB_SIZE_UL_USB (1*1024*1024)
#endif